KR20000051481A - Method for manufacturing barrier rib of Plasma Display Panel - Google Patents

Abstract

PURPOSE: A method for forming a partition wall of a plasma display panel is provided to stabilize the applying of an address pulse and a sustain pulse to a boundary part of an adjacent basic section. CONSTITUTION: A plasma display panel includes: a first plasma driving block(100) including a part of a plurality of bottom electrodes(110) formed continuously in a column direction, a plurality of first top electrodes(120,121) formed continuously in a row direction orthogonal to the bottom electrode and a part of a plurality of partition walls(130) formed in parallel with the bottom electrode between the bottom electrodes; a second plasma driving block(100') including other part except the part of the bottom electrode included in the first plasma driving block, a plurality of second top electrodes(120',121') formed continuously in a row direction to be orthogonal to the bottom electrode, and other part except the part of the plurality of partition walls included in the first plasma driving block; and a boundary partition wall(140) formed between partition walls on the boundary of the first plasma driving block and the second plasma driving block. The method improves the image quality by reducing flicker as compared to the prior plasma display panel.

Description

Method for manufacturing barrier rib of Plasma Display Panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP), which is one of flat panel display devices, and more particularly to a method of forming a partition of a PD.

PD and LCD are spotlighted as next generation display devices with the highest practicality among flat panel displays. In particular, PDP has higher luminance and wider viewing angle than LCD, and thus has wide applicability as a thin, large display such as an outdoor advertising tower, a wall-mounted TV, or a theater display.

The PD is used to display and emit light by using gas discharge. In the configuration, the PD is divided into an AC PD and a DC PD in which the surface of the electrode is exposed to the discharge space. AC type PDs are composed of phosphor spheres on the dielectric layer, and DC type PDs are composed of phosphors on the electrodes. PDPD emits the phosphor by irradiating the phosphor with ultraviolet rays generated by gas discharge.

The structure of a typical AC type counter discharge PDPD is composed of a plurality of matrix electrodes as shown in FIG. The opposite discharge type PDP has a protective layer made of a Y electrode 11 formed on the front substrate 10, a dielectric layer 12 formed thereon, and magnesium oxide (MgO) or the like to protect the surface of the dielectric layer with ion shock ( 13), the X electrode 21 formed on the back substrate 20, the dielectric layer 22 formed thereon, the partition 23 formed on the dielectric layer, and the phosphor 24 coated between the partition walls.

The pulse applied to each electrode for driving the general PD shown in FIG. 1 is the same as that shown in FIG. 2. The driving pulse of a typical PD is divided into a reset discharge period, an address discharge period, and a sustain discharge period in order to select a discharge cell of the PD PD and to sustain light emission.

In the reset discharge period, the X and Y electrodes are discharged to erase wall charges in the discharge cells to initialize the cells.

In the address discharge period, a scan pulse 30 is applied to the Y electrode, a data pulse 40 is applied to the X electrode, and a cell to be discharged is selected to form wall charges in the cell. FIG. 2 is a waveform diagram showing that a positive voltage data pulse 40 is applied to the X electrode and a negative voltage scan pulse 30 is applied to the Y electrode. As a result, positive electrons are generated at the X electrode and negative electrons are generated at the Y electrode. At this time, both the generated static charge and the negative charge are wall charges.

In the sustain discharge period, sustain pulses 31 and 41 that are out of phase with each other are continuously applied to all of the opposed X electrodes and all Y electrodes. At this time, the discharge cells in which the wall charges are generated in the above-described address discharge period are kept at a predetermined wall voltage, so that the wall voltage Vw and the discharge sustain voltage Vs due to the sustain pulse are overlapped. A potential difference equal to or greater than the discharge threshold voltage Vb is generated in the discharge cell. As a result, even when sustain pulses are simultaneously applied to all the X electrodes and all the Y electrodes, the discharge is not maintained in all the discharge cells, but only in the discharge cells in which wall charges are generated during the address discharge period. By this principle, each cell of the screen selectively emits light in the AC type PD.

FIG. 3 shows a cross-sectional structure of a typical 3-electrode surface discharge type AC PDP. The Y electrode 25 and the Z electrode 26 are formed on the same surface of the front glass substrate 10, and the Y electrode and The dielectric layer 27 is formed on the Z electrode by a printing method, and the X structure 21 is formed on the upper glass substrate 20 having the upper structure formed by depositing a protective layer on the dielectric layer 27. In order to prevent crosstalk between adjacent cells between the X electrodes 21, a partition 23 is formed, and a phosphor 24 is formed around the partition 23 and the X electrode 21. It is configured to have a discharge structure by encapsulating an inert gas in the space between the upper structure and the lower structure. AC type PD of the three-electrode surface discharge method has the advantage that the operation life is extended because the phosphor on the electrode is not deteriorated compared to the PD of the opposite discharge method.

In the three-electrode surface discharge type AC PD, first, when a driving voltage is applied between the X electrode 21 and the Y electrode 25, an opposite discharge occurs between the X electrode 21 and the Y electrode 25, so Wall charges are generated on the surface of the protective layer 28 of the structure. When the discharge voltages having opposite polarities are continuously applied to the Y electrode 25 and the Z electrode 26 and the driving voltage applied to the X electrode 21 is cut off, the Y electrode 25 and the Y electrode 25 are blocked by wall charge. A predetermined potential difference is maintained between the Z electrodes 26 to cause surface discharge in the discharge regions on the surfaces of the dielectric layer 27 and the protective layer 28. As a result, ultraviolet rays are generated from the inert gas in the discharge region. The phosphor 24 is excited by the ultraviolet rays, and color display is performed by the emitted phosphor 24.

That is, while the electrons inside the discharge cell accelerate to the cathode (-) by the applied driving voltage, helium (He) is filled with the inert mixed gas filled with the pressure of about 400 to 500 torr in the discharge cell. As the main component, it collides with a Penning mixed gas to which xenon (Xe), neon (Ne) gas, etc. are added, and the inert gas is excited to generate ultraviolet rays having a wavelength of 147 nm. Such ultraviolet rays collide with the phosphor 24 surrounding the X electrode 21 and the partition 23 to emit light in the visible light region.

The partition wall installed in the conventional PD is formed in a direction parallel to the X electrode to form a gas passage from the discharge gas inlet to all the discharge cells, and is provided at a predetermined distance from the sealing region. The discharge gas injected through the discharge gas inlet is evenly distributed to all the discharge cells through the gas passage.

The PD discharges the cells constituting the pixel by controlling the application of voltages to the X electrode, the Y electrode, and the Z electrode, and the amount of light emitted by the discharge changes the discharge time of the cell. Adjust In other words, the gray scale required for image display is realized by varying the length of time each cell is discharged within the time required to display the entire image (1/30 second in the case of NTSC TV signal). . At this time, the brightness of the screen is determined by the brightness when each cell is discharged to the maximum. In addition, in order to maximize the luminance of the PD screen, it is necessary to keep the discharge time of the cell as long as possible within the time necessary for constructing one screen.

FIG. 4 is a block diagram showing a schematic structure of a PD including a driving circuit, and shows a panel, an X electrode driver 60, a Y electrode driver 70, and a Z electrode driver 80. The X electrode 21 formed in each cell of the PD shown in FIG. 3 is connected to the X electrode driver 60 to receive an address voltage, and the Y electrode 25 is connected to the Y electrode driver 70. The scan voltage is applied, and the Z electrode 26 is connected to the Z electrode driver 80 to receive a sustain voltage.

Although not shown in the drawing, the controller 90 of the PD drive circuit unit receives various control signals such as clock signals, RGB data, vertical synchronization signals, and horizontal synchronization signals from the outside to generate scan data and apply them to the Y electrode driver. The address data is generated and applied to the X electrode driver. Accordingly, the X electrode, the Y electrode, and the Z electrode are driven in accordance with the signals applied to the respective drivers to display an image on the PD.

There are various ways of displaying an image by driving a PD, but a commonly used method is a subfield method.

The subfield method is a method of implementing one screen by setting a screen displayed by discharge of a cell to one sub-screen, and controlling the Y electrode driver and the Z electrode driver to overlap several sub-screens. In such a subfield method, a plurality of subpictures are sequentially gathered to form a single image. In this case, the number of subpictures is equal to the number of gradation bits of the image. That is, if the gray level of the image implemented on the screen is 8 bits, the number of subscreens implemented by the subfield method is 8 sheets. FIG. 5A illustrates a waveform applied to each electrode of the PDP, and FIG. 5B illustrates a subfield type PDP driving method showing a scanning order of each PD cell according to the waveform of FIG. 5A.

First, in the subfield method, an 8-bit digital video signal is collected with bits having the same weight from MSB (Most Signal Bit) to LSB (Least Signal Bit), and then MSB data is scanned in PD for a predetermined T time, and the remaining lower bits They scan for T / 2 hours, T / 4 hours, and T / 8 hours in bit order close to the MSB, and LSB data is scanned for T / 128 hours to form a sub-picture. The subfield method implements 256 gray levels by using the afterimage effect of snow on the light emitted from each sub-screen.

At this time, in order to efficiently drive the high resolution AC PDP, the subfield method is divided into 8 zones as shown in FIG. Place subscreens in the area. Each sub-screen follows the ADS (Separate Address-Sustain) method, which separately applies the application period of the address pulse and the application period of the sustain pulse, and the sub-screen layout of each zone is simultaneously applied with the address pulse and the sustain pulse. Follow the CAS (Concurrent Address-Sustain) method. In general, one field is divided into 45 basic blocks.

In conventional PDs, since each discharge cell must be driven in a matrix manner, the Y electrodes must be driven at different times with respect to one X electrode. However, the conventional PDPD divides one PD screen into several zones and arranges a sub-screen in each zone to allow the address pulse and the sustain pulse to be simultaneously applied. It may be indicated.

6 illustrates a method of realizing an image by driving a PD in a subfield method. In the basic zone 11, a sustain pulse is applied to a fourth zone, an address pulse is applied to a fifth zone and a sixth zone. It shows that sustain pulse is applied to the 7 area. At this time, the application of the pulse becomes unstable at the boundary between the fourth and fifth zones and the boundary between the sixth and seventh zones depending on the state of the adjacent zone. That is, the boundary portion between the fourth zone and the fifth zone may cause the address pulse to become unstable because the operation of applying the sustain pulse of the fourth zone affects the application of the address pulse of the fifth zone. As a result, severe flicker occurs on the screen, and there is a problem in that the image quality of the PD is degraded.

SUMMARY OF THE INVENTION The present invention has been made to solve this problem, and an object thereof is to stabilize the application operation of the address pulse and the application operation of the sustain pulse to the boundary of the adjacent basic region.

1 is a view showing a schematic structure of a conventional counter-discharge AC plasma display panel

FIG. 2 is a waveform diagram showing waveforms applied to each electrode to drive the plasma display panel shown in FIG.

3 is a cross-sectional view of a typical three-electrode surface discharge type AC plasma display panel.

4 is a block diagram illustrating a driving circuit unit included in the plasma display panel of FIG. 3.

5A illustrates waveforms applied to respective electrodes of a plasma display panel.

FIG. 5B is a diagram illustrating a subfield type PDP driving method showing a scanning order of each cell of the plasma display panel according to the waveform of FIG. 5A;

6 illustrates an example of a subfield type PDP driving method, and illustrates a state in which an incorrect address pulse can be applied in the subfield type.

7 is a view schematically showing the structure of a plasma display panel of the present invention.

FIG. 8 illustrates a structure of a boundary partition wall in the plasma display panel of FIG. 7.

9 is a view showing various forms of the boundary partition wall of the plasma display panel of the present invention.

FIG. 10 illustrates a grate-type boundary partition wall in a plasma display panel of the present invention. FIG.

Explanation of symbols for main parts of the drawings

100: first plasma drive block 100 ': second plasma drive block

101: first plasma discharge region 101 ': second plasma discharge region

110: lower electrode 120, 121: first upper electrode

120 ', 121': second upper electrode 130: partition wall

140: boundary partition 141: light blocking portion

142 gas passage section

The present invention is characterized by minimizing the interaction occurring at the boundary of the adjacent base zone by forming a boundary partition at the boundary of each base zone to efficiently drive the high resolution AC PDPD.

As illustrated in FIG. 7, a plurality of first upper electrodes 120 and 121 and lower electrodes 110 formed to be orthogonal to a plurality of lower electrode 110 portions and lower electrodes 110 may be provided. The first plasma driving block 100 and the second plasma driving block 100 'configured as a part of the partition 130 and the boundary portion between the first plasma driving block 100 and the second plasma driving block 100'. It comprises a boundary partition wall 140 formed between the partition wall 130 of the. That is, the present invention divides one PD display area into a plurality of drive blocks, and separately installs a boundary partition wall at a boundary between each drive block, and each drive block is almost independent of the state of a drive block adjacent to the boundary partition wall. It works as a PD.

The first plasma driving block 100 includes a portion of the plurality of lower electrodes 110, a plurality of first upper electrodes 120 and 121 orthogonal to the lower electrode 110, and a lower electrode between each lower electrode 110. It includes a plurality of partitions 130 formed in a direction parallel to the (110). The lower electrode 110 is continuously formed in the row direction on the lower plate, and the first upper electrodes 120 and 121 are continuously formed in the column direction on the upper plate (not shown) provided to face the lower plate (not shown). . The partition wall 130 is formed in a direction parallel to the lower electrodes, one between each of the lower electrodes 110.

The second plasma drive block 100 ′ has the same structure as the first plasma drive block 100. However, the second plasma driving block 100 ′ is formed adjacent to the first plasma driving block 100 and is operated separately by a separate driving circuit. That is, the second plasma driving block 100 ′ is a portion of the plurality of lower electrodes 110 except for the portion included in the first plasma driving block 100 and a plurality of second upper electrodes orthogonal to the lower electrode. (120 ', 121'), and a portion of the plurality of partitions 130 other than the portion included in the first plasma driving block 100 is included.

At this time, the partition 130 part included in the first plasma drive block 100 and the partition wall 130 included in the second plasma drive block 100 'are integrally connected. That is, one partition 130 is included in a portion of the first plasma drive block 100, the other portion is included in the second plasma drive block 100 '.

The lower electrode 110 included in the first plasma driving block 100 and the lower electrode 110 included in the second plasma driving block 100 ′ are also integrally connected like the partition wall 130. That is, one lower electrode 110 is partially included in the first plasma driving block 100, and the other portion is included in the second plasma driving block 100 ′.

The boundary partition wall 140 is formed at a boundary between the first plasma drive block 100 and the second plasma drive block 100 ′. In particular, the boundary partition wall 140 is formed at a predetermined width and height at the boundary between the first plasma drive block 100 and the second plasma drive block 100 ′ in each partition wall 130. At this time, the height of the boundary partition wall 140 is preferably formed to be the same as the surrounding partition wall 130, the width of the boundary partition wall is preferably formed to be less than the separation distance between the peripheral partition walls.

In particular, the boundary partition wall 140 may be formed so as to completely block the discharge region 101 of the first plasma driving block and the discharge region 101 'of the second plasma driving block, as shown in FIG. 8. It is preferable to form a gas passage 150 through which discharge gas can be evenly distributed throughout the discharge region.

That is, the boundary partition wall 140 is formed to distinguish the discharge regions 101 and 101 'between the first plasma driving block and the second plasma driving block, but the gas passages are distributed evenly in all the discharge regions of the PDP. 150 is formed. Accordingly, as shown in FIG. 8, the boundary partition wall includes a light blocking unit 141 for dividing the discharge region, and a gas passage unit 142 through which discharge gas can freely flow between the first plasma driving block and the second plasma driving block. It consists of). Figure 142 with a gas passage shown in Fig. 8 is composed of first to third passage having a width of the second passage and having a width l ₃ of the first passageway and, l ₂ having a width l _1. That is, the gas passage portion 142 may be composed of one or more.

In this case, the light blocking portion 141 and the gas passage portion 142 may be configured in various forms as shown in Figure 9a to 9c. Sometimes, the boundary partition wall 140 of the present invention may be formed of only the light blocking portion 141 without forming the gas passage portion as shown in FIG. 9D. That is, the light blocking unit 141 is formed at one side of the partition wall 130 to distinguish the discharge regions 101 and 101 'of the first plasma driving block and the second plasma driving block, and the gas passage unit 142 is formed of light. It is formed in a part of the blocking unit 141 to pass the discharge gas of the first plasma drive block and the second plasma drive block. In addition, the boundary partition wall 140 may include a plurality of light blocking parts 141 and a plurality of gas passage parts 142, as shown in FIG. 10, to form a type of grate.

The present invention is not limited to two driving blocks of the first plasma driving block and the second plasma driving block, but may be composed of a plurality of driving blocks. In addition, although the boundary barrier ribs may be formed in all regions between the driving blocks, the boundary barrier ribs may not be formed in the regions between some driving blocks due to the efficiency of operation and the convenience of manufacturing.

The present invention has the advantage of reducing the flicker generated in the boundary portion of the adjacent discharge region during the divided driving, unlike the conventional PD. In addition, the PDPD of the present invention has the effect of distributing the discharge gas evenly in each discharge area during the manufacturing process because each discharge area is not completely blocked even though the emission of mixed discharge cells is distinguished at the boundary between the discharge areas. There is. Therefore, the PDIP of the present invention is improved in image quality compared to the PDPC of the related art.

Claims (9)

In a plasma display panel in which a display area for implementing an image is divided into a plurality of driving blocks and operated, A plurality of lower electrode portions continuously formed in a row direction, a plurality of first upper electrodes continuously formed in a column direction to be orthogonal to the lower electrode, and a plurality of lower electrode portions formed in a direction parallel to the lower electrode between the respective lower electrodes A first plasma drive block including a portion of two partition walls; A plurality of second upper electrodes continuously formed in a column direction to be perpendicular to the lower electrode and a portion other than a portion of the lower electrode included in the first plasma driving block, and a plurality of partition walls included in the first plasma driving block. A second plasma drive block including a portion other than a portion; And, And a boundary partition wall formed at a predetermined width and height between each partition wall of the boundary portion between the first plasma drive block and the second plasma drive block. The plasma display panel of claim 1, wherein the partition wall included in the first plasma driving block and the partition wall included in the second plasma driving block are integrally formed. The plasma display panel of claim 1, wherein the lower electrode included in the first plasma driving block and the lower electrode included in the second plasma driving block are integrally formed. The plasma display panel of claim 1, wherein a height of the boundary barrier rib is equal to a height of the barrier rib. The plasma display panel of claim 1, wherein a width of the boundary partition wall is equal to or less than a separation distance between the partition walls. The method of claim 1, wherein the boundary partition wall A light blocking unit formed to distinguish a discharge region between the first plasma driving block and the second plasma driving block; And a gas passage portion through which the discharge gas injected into the first plasma driving block and the discharge gas injected into the second plasma driving block pass through. The method of claim 1, wherein the plasma display panel A plurality of third upper electrodes sequentially formed in a column direction to be perpendicular to the lower electrode and other portions except for a portion of the lower electrode included in the first plasma driving block and the second plasma driving block, and the first plasma driving block; And a separate third plasma driving block including a portion other than a portion of the plurality of partition walls included in the second plasma driving block. The method of claim 7, wherein the plasma display panel And the third plasma driving block comprises a plurality of driving blocks. The method of claim 8, wherein the plasma display panel And a boundary partition wall formed in at least one of the areas between the plurality of driving blocks.