KR20000027025A - Method for forming tin layer on ti layer in semiconductor manufacturing process - Google Patents
Method for forming tin layer on ti layer in semiconductor manufacturing process Download PDFInfo
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- KR20000027025A KR20000027025A KR1019980044841A KR19980044841A KR20000027025A KR 20000027025 A KR20000027025 A KR 20000027025A KR 1019980044841 A KR1019980044841 A KR 1019980044841A KR 19980044841 A KR19980044841 A KR 19980044841A KR 20000027025 A KR20000027025 A KR 20000027025A
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- layer
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- reaction chamber
- tin layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
Abstract
Description
본 발명은 반도체 제조 방법에 관한 것으로, 더욱 상세하게는 Ti 막 상에 TiN 막을 형성하는 방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor, and more particularly, to a method of forming a TiN film on a Ti film.
반도체 제조 공정은 실리콘 기판을 재료로 하여 확산(diffusion), 식각(etching), 석판인쇄술(Photolithography) 및 박막(thin film) 형성 공정 등을 반복적으로 처리하여 수십, 수백 공정 단계로 진행되며, 이와 같은 반도체 제조 공정 단계를 거쳐 실리콘 기판(Si substrate) 상에 복수의 반도체 소자를 형성하게 된다.The semiconductor manufacturing process proceeds to dozens or hundreds of process steps by repeatedly processing diffusion, etching, lithography and thin film formation processes using a silicon substrate as a material. Through the semiconductor manufacturing process step, a plurality of semiconductor devices are formed on a silicon substrate.
도 1은 종래 기술에 따른 Ti 층 상에 TiN 층을 형성하는 공정 단계를 나타내는 공정도(10)이다. 도 1을 참조하면, 먼저 실리콘 기판을 준비(12)한 상태에서, 실리콘 기판을 스퍼터용 반응실(sputtering chamber)로 이송한 상태에서 실리콘 기판 상에 Ti를 소정의 두께로 증착하여 Ti 층을 형성한다(14). 스퍼터용 반응실의 진공 상태를 해제한 상태에서 Ti 층이 형성된 실리콘 기판을 집어 낸다.1 is a process diagram 10 showing a process step of forming a TiN layer on a Ti layer according to the prior art. Referring to FIG. 1, in a state in which a silicon substrate is prepared 12, a Ti layer is formed by depositing Ti to a predetermined thickness on a silicon substrate while transferring the silicon substrate to a sputtering chamber. (14). The silicon substrate in which the Ti layer was formed in the state which canceled the vacuum state of the reaction chamber for sputter | spatter is picked up.
집어 낸 Ti 층이 형성된 실리콘 기판을 화학적 기상 증착용 반응실(CVD Chamber)로 이송하여, 400℃에서 NH3플라즈마 처리(16)를 함으로써, Ti 층의 표면에 TiN 층을 형성하게 된다(18).The silicon substrate on which the Ti layer is formed is transferred to a CVD chamber for chemical vapor deposition, and NH 3 plasma treatment 16 is performed at 400 ° C. to form a TiN layer on the surface of the Ti layer (18). .
이와 같이, 종래에는 TiN 층을 형성하기 위해서, Ti 층을 형성하는 공정과 TiN 층을 형성하는 공정이 별개의 반응실에서 진행되기 때문에, Ti 층 및 TiN 층을 하나의 반응실에서 형성하는 것에 비하여 생산비용 및 공기가 길어지는 문제점을 안고 있었다.As described above, since the process of forming the Ti layer and the process of forming the TiN layer are conventionally performed in separate reaction chambers in order to form the TiN layer, the Ti layer and the TiN layer are formed in one reaction chamber. The production cost and the air had a long problem.
따라서, 본 발명의 목적은 Ti 층 및 TiN 층을 동일 반응실에서 형성할 수 있는 방법을 제공하는 데 있다.Accordingly, it is an object of the present invention to provide a method in which a Ti layer and a TiN layer can be formed in the same reaction chamber.
도 1은 종래 기술에 따른 Ti 층 상에 TiN 층을 형성하는 공정 단계를 나타내는 공정도,1 is a process diagram showing a process step of forming a TiN layer on a Ti layer according to the prior art,
도 2는 본 발명의 실시예에 따른 Ti 층 상에 TiN 층을 형성하는 공정 단계를 나타내는 공정도이다.2 is a process diagram illustrating a process step of forming a TiN layer on a Ti layer according to an embodiment of the present invention.
상기 목적을 달성하기 위하여, 본 발명은 Ti 층 상에 TiN 층을 형성하는 방법으로, 실리콘 기판을 준비하여 반응실로 이송하는 단계와; 반응실 내의 상기 실리콘 기판 상에 Ti를 증착하여 Ti 층을 형성하는 단계와; 반응실 내부를 약 400℃로 유지하고, 저전압 플라즈마 내에서 N2 가스를 흘려 상기 Ti 층의 표면에 TiN 층을 형성하는 단계;를 포함하는 것을 특징으로 하는 Ti 층 상에 TiN 층을 형성하는 방법을 제공한다.In order to achieve the above object, the present invention provides a method of forming a TiN layer on a Ti layer, comprising the steps of preparing a silicon substrate and transferring it to the reaction chamber; Depositing Ti on the silicon substrate in the reaction chamber to form a Ti layer; Maintaining the inside of the reaction chamber at about 400 ° C. and flowing N 2 gas in a low voltage plasma to form a TiN layer on the surface of the Ti layer. to provide.
이하, 첨부 도면을 참조하여 본 발명의 실시예를 보다 상세하게 설명하고자 한다.Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.
도 2는 본 발명의 실시예에 따른 Ti 층 상에 TiN 층을 형성하는 공정 단계를 나타내는 공정도이다. 도 2를 참조하면, 먼저 실리콘 기판을 준비(32)한 상태에서, 실리콘 기판을 반응실로 이송한 상태에서 실리콘 기판 상에 Ti를 400Å 두께로 증착하여 Ti 층을 형성한다.(34) Ti 층의 형성 방법으로 스퍼터링 방법이 사용된다.2 is a process diagram illustrating a process step of forming a TiN layer on a Ti layer according to an embodiment of the present invention. Referring to FIG. 2, in a state in which a silicon substrate is prepared 32, a Ti layer is formed by depositing Ti to a thickness of 400 μs on a silicon substrate while the silicon substrate is transferred to a reaction chamber. A sputtering method is used as a formation method.
그리고, 동일 반응실 내에서 Ti 층의 표면에 TiN 층을 형성하는 공정 단계가 진행된다. 즉, 반응실 내부를 약 400℃로 유지하고, 저전압 플라즈마(low power plasma) 내에서 N2 가스를 흘려(36) 상기 Ti 층의 표면에 TiN 층을 형성하게 된다.(38) 즉, 본 발명에 따른 TiN 층을 형성하는 공정 단계(36)인 Ti 층을 형성하는 공정(34)과 N2 가스 처리하는 공정(35)이 하나의 반응실에서 진행된다. 본 발명에 따른 TiN 층을 형성하는 방법은 종래 기술에 따른 NH3플라즈마 처리 효과를 대체할 수 있는 동시에 동일 반응실에서 Ti 층과 TiN 층을 형성할 수 있다.In addition, a process step of forming a TiN layer on the surface of the Ti layer in the same reaction chamber is performed. That is, the inside of the reaction chamber is maintained at about 400 ° C., and N2 gas is flowed in a low power plasma (36) to form a TiN layer on the surface of the Ti layer (38). The process 34 for forming the TiN layer 34 and the process 35 for treating the N2 gas are performed in one reaction chamber. The method of forming the TiN layer according to the present invention can replace the NH 3 plasma treatment effect according to the prior art and can form the Ti layer and the TiN layer in the same reaction chamber.
한편, Ti 층 및 TiN 층을 형성하는 공정은 반도체 제조 공정에 의해 복수의 회로 패턴이 실리콘 기판 상에 형성된 상태에서, 그 회로 패턴 상의 필요한 부분에 Ti 층과 TiN 층을 형성하는 공정을 진행하게 된다.Meanwhile, in the process of forming the Ti layer and the TiN layer, a process of forming the Ti layer and the TiN layer in a required portion on the circuit pattern is performed while a plurality of circuit patterns are formed on the silicon substrate by a semiconductor manufacturing process. .
따라서, 본 발명의 형성 방법을 따르면, Ti 층 및 TiN 층을 하나의 반응실에서 형성하기 때문에, 생산비용의 절감 및 공기를 단축할 수 있다.Therefore, according to the forming method of the present invention, since the Ti layer and the TiN layer are formed in one reaction chamber, the production cost can be reduced and the air can be shortened.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980044841A KR20000027025A (en) | 1998-10-26 | 1998-10-26 | Method for forming tin layer on ti layer in semiconductor manufacturing process |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019980044841A KR20000027025A (en) | 1998-10-26 | 1998-10-26 | Method for forming tin layer on ti layer in semiconductor manufacturing process |
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| KR20000027025A true KR20000027025A (en) | 2000-05-15 |
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| KR1019980044841A KR20000027025A (en) | 1998-10-26 | 1998-10-26 | Method for forming tin layer on ti layer in semiconductor manufacturing process |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030001939A (en) * | 2001-06-28 | 2003-01-08 | 동부전자 주식회사 | Method And Apparatus For Manufacturing Barrier Layer Of Semiconductor Device |
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1998
- 1998-10-26 KR KR1019980044841A patent/KR20000027025A/en not_active Application Discontinuation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030001939A (en) * | 2001-06-28 | 2003-01-08 | 동부전자 주식회사 | Method And Apparatus For Manufacturing Barrier Layer Of Semiconductor Device |
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