KR20000014853A - Methode for managing traffic of frame relay network in atm switching system - Google Patents

Abstract

PURPOSE: A method for managing traffic of a frame relay network in ATM switching system is provided to control a traffic by calculating a unit time as an integer value when a network is operated normally. CONSTITUTION: A method for managing traffic of a frame relay network in ATM switching system comprises the steps of: detecting a period to drive a timer; calculating the unit time as an integer value; producing the amount of data corresponding to an excess of a maximum guarantee data per unit time of a user and the amount of maximum data of the user if a network corresponding to the integer value is proper; registering connection information to a connection table of the timer having the same period; initializing variables for managing a traffic; performing a clearing of tagging flag; detecting a setting of the tagging flag; obtaining a size of a packet data; and transmitting the packet data.

Description

Traffic Management Method of Frame Relay Network in Asynchronous Transfer Mode Switch

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a traffic management method of a frame relay network in an asynchronous transfer mode switch (hereinafter referred to as "ATM") interworking with a frame relay. Relay Interworking Module (hereinafter referred to as "FRIM") relates to a traffic management method that manages traffic control for each connection having the same unit time value by integerizing the unit time value when the network is normal among the traffic parameters given for each connection. will be.

Currently, frame relay networks are widely used around the world, including North America and Europe, and actively provide frame relay services. At this point when the importance of ATM networks is increasingly emphasized, the frame relay service needs to be supported at the ATM exchange in an intermediate stage in order for the frame relay service to be developed into an ATM service. When ATM exchange provides Frame Relay service, it converts ATM cell into frame, converts frame into ATM cell, and changes ATM Virtual Path Identifier (VPI) / VCI (Virtual Channel Identifier) to address of frame relay. This is necessary. In addition, it is also required to decompose the frame input into T1 / E1 into a digital transmission line and transmit it to the ATM switch at 1.544 Mbps, or to assemble the cells received from the ATM switch into a frame and send it to the frame relay subscriber.

FIG. 1 shows a system configuration of a typical ATM switcher supporting a frame relay service as described above, wherein the frame relay interworking unit 102 and the ATM subscriber access unit 110 are connected to the ATM Central Switching Subsystem (ACS) 100. Is connected by. The frame relay interworking unit 102 is composed of a FRIM 104, an ATM Local Switching Subsystem (ALS) 106, and a Call and Connection Control Processor (CCCP) 108, and the ATM subscriber connection unit 110 is a subscriber interface (SIM). Modules 112-114, ALS 116, and CCCP 118. In such an ATM exchange, the FRIM 104 converts the T1 / E1 frame data received through the digital transmission path T1 / E1 into an ATM cell, for example, an AAL5 cell and transmits the same to the ALS 106. The ATM cell transmitted to the ALS 106 is transferred to the SIM 112 through the ALS 116 of the ATM subscriber access unit 110 through the ACS 100 and transmitted to the user-network interface (UN) to transmit the frame relay and the ATM. The connection with the subscriber is possible.

2 shows a detailed block configuration of the above-described FRIM 104. The FRIM 104 includes three types of printed circuit board assemblies (PBAs), that is, the FRSA 200 and the frame multiplexer / demultiplexer board assembly (FMDA) 202. ) And FCDA (Frame Clock Distribution board Assembly) 204. The FRSA 200 handles the Q.922 core functions, exchanges control information via the FDMA 202 and the control bus, and exchanges user data on the 16-bit parallel bus for transmission and reception. The FRSA 200 may be mounted with up to 16 FRSA boards in the FRIM 104, and each FRSA has four T1 / E1 trunks. FMDA 202 performs cell multiplexing and demultiplexing and provides a 16-bit parallel interface and an IMI interface with FRSA 200. The FCDA 204 receives the main clock MCLK from the Local Timing Generating Hardware (LTGH) 208 of the ALS 106 and supplies a clock to the FRSA 200 and the FMDA 202.

3 shows a more detailed configuration of the above-described FRSA 200, which includes a central processing unit (CPU) 300, a high-level data link control (HDLC) controller 302, and a segmentation and reassembly assembly (SARA) 304. ), Local memory 306, HDLC control memory 308, IPC (Inter Processor Communication) memory 310, SARA control memory 312, sender packet memory 314, and receiver The packet memories 316 are connected to each other. HDLC controller 302 is also connected to T1 / E1 via T1 / E1 trunk 318, IPC memory 310 is connected to FMDA 202 of FIG. 2 via a control bus, and SARA 304 is receiving. FIFO (First In-First Out) 320 and transmit FIFO 322 are connected to the FMDA 202 of FIG. 2 via a parallel bus.

The HDLC controller 302 receives a frame from the T1 / E1 via the T1 / E1 trunk 318, stores the frame in the transmitting packet memory 314, and converts the data stored in the receiving packet memory 316 into a frame to make a T1 / E1 trunk. Transmit to subscriber via E1 trunk 318. The SARA 304 divides the data stored in the sender packet memory 314 into cells, transmits them to the ATM switch via the transmit FIFO 322, and assembles the ATM cells received from the ATM switch to the subscriber through the receive FIFO 320. To store in the receiving packet memory 316. The ATM switch is here the ALS 106 of FIGS. 1 and 2. At this time, the CPU 300 that controls the overall operation of the FRSA 200 controls the operations of the HDLC controller 302 and the SARA 304.

Looking at the operation of the FRSA 200 as described above divided into ATM cell transmission time and reception time as follows. First, the operation of receiving a frame, converting it to an ATM cell, and transmitting the same is described. When a frame is received from the frame relay subscriber into the T1 / E1 trunk 318, the HDLC controller 302 stores the frame in the transmit side packet memory 314. The frame stored in the transmitting side packet memory 314 is copied to the local memory 306 by the CPU 300. The CPU 300 performs an address conversion and parameter mapping on the frame copied to the local memory 306 so that the frame can be converted into an ATM cell, and then copies the frame to the sender packet memory 314. Then, when the CPU 300 notifies the SARA 304 that there is data in the transmitting packet memory 314, the SARA 304 decomposes the data stored in the transmitting packet memory 314 into cells and transmits the data to the transmitting FIFO 322. Transmit to ATM switch via parallel bus.

Unlike the above, the case where the ATM cell is received from the ATM switch to the subscriber side through the parallel bus will be described. In this case, the ATM cell received by the SARA 304 from the ATM switch via the receive FIFO 320 is assembled by the SARA 304 and stored in the receive packet memory 316. In this way, the assembled data stored in the receiving side packet memory 316 is copied to the local memory 306 by the CPU 300 as in the ATM cell transmission. Thereafter, the CPU 300 modifies the data copied to the local memory 306 to convert the data into a frame by performing address translation and parameter mapping, and then copies the data to the receiving side packet memory 316 again. Next, when the CPU 300 informs the HDLC controller 302 that there is data received in the receiving packet memory 316, the HDLC controller 302 makes a frame of data stored in the receiving packet memory 316 into T1. / E1 send to the subscriber via the trunk (318).

4 is a control flowchart for setting a conventional connection registration,

5 is a control flow chart of managing traffic parameters for each conventional connection.

Referring to FIG. 4 to FIG. 5, the conventional traffic control operation is described. Since traffic control is performed for each connection in the frame relay network, connection registration must be set.

Referring to FIG. 4, in step 401, the CPU 300 receives traffic parameters CIR (Committed Information Rate), Bc (Committed Burst Size), and Be (Excess Burst Size) for each connection from the CCCP 108 through FMDA 202. CIR represents the transmission rate of user data guaranteed in the network, and the unit is bps. Bc represents the maximum amount of data guaranteed to the user during the unit time Tc when the network is in a steady state, and the unit is a bit. Be represents the amount of data that the user is allowed to exceed Bc for a unit time Tc without guaranteeing in the frame relay network, and the unit becomes a bit. Then, in step 402, the CPU 300 calculates the unit time Tc by Equation 1 when the frame relay network is normal using the received traffic parameter.

In step 403, the CPU 300 registers the input connection information and the traffic parameters CIR, Bc, and Be in the connection table of the Tc timer, and proceeds to step 404. In step 404, the CPU 300 drives the Tc timer. Thereafter, in step 405, the CPU 300 initializes the variable Bc_Token and Be_Token values for traffic management to Bc and (Bc + Be). In this way, the Tc timer operates according to its period and repeats the operation of reinitializing its Bc_Token and Be_Token values. Referring to FIG. 5, when the packet data is received after registering the traffic parameters for each connection, the CPU 300 receives the packet size (Pkt_Size) in step 502 when the packet data is received through the corresponding connection in step 501. Obtain Then, in step 503, the CPU 300 checks whether the obtained packet size (Pkt_Size) is larger than Bc_Token, and proceeds to step 504 if it is not larger than Bc_Token. In step 504, the CPU 300 sets the DE (Discard Eligibility) bit of the packet to 0 and proceeds to step 508. However, if the obtained packet size (Pkt_Size) is larger than Bc_Token, the process proceeds to step 505 where the CPU 300 checks whether the obtained packet size (Pkt_Size) is larger than Be_Token. If the obtained packet size (Pkt_Size) is larger than Be_Token, the process proceeds to step 506 and discards the packet data. However, if the obtained packet size (Pkt_Size) is smaller than Be_Token, the process proceeds to step 507 and sets the DE (Discard Eligibility) bit of the packet to 1 and proceeds to step 508. In step 508, the CPU 300 reduces the Bc_Token value and the Be_Token value by the packet size (Pkt_Size). Then, in step 509, the CPU 300 transmits the packet data.

However, such a conventional traffic control method needs to run a timer that operates a cycle of Tc to detect the amount of data for each connection Tc for each connection, and if the traffic control is performed for each connection, the Tc value of each connection is different. You need to run one timer per time, and since Tc has a real value, you need a timer with finer granularity (eg nono sec) than sec or msec. However, in general applications, timers have a higher priority than other procedures or interrupts, so the longer the timer is running, the longer it takes to execute the application, which causes a decrease in system performance.

Accordingly, an object of the present invention is to provide a traffic management method which can reduce the number of timers by performing traffic control using one timer for each connection having the same Tc by integerizing the traffic parameter Tc in the frame relay network.

1 is a system configuration diagram of a typical ATM exchanger interworking with a frame relay;

2 is a detailed block diagram of the FRIM of FIG. 1;

3 is a detailed block diagram of the FRSA of FIG.

4 is a control flowchart for setting a conventional connection registration,

5 is a control flow diagram of managing traffic parameters for each conventional connection.

6 is a control flow diagram for establishing a connection registration according to an embodiment of the present invention,

7 is a control flowchart for managing traffic parameters for each connection according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the annexed drawings, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details. In addition, it should be noted that in the following description, the same components in the drawings represent the same reference signs wherever possible. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

The hardware block configuration for carrying out the present invention is the same as in the above-described Figures 1 to 3, the same reference numerals.

6 is a control flow diagram for establishing a connection registration according to an embodiment of the present invention,

7 is a control flowchart of managing traffic parameters for each connection according to an embodiment of the present invention.

Referring to FIG. 6 to FIG. 7 described above, the operation of controlling traffic according to the present invention will first be described with reference to FIG. 6. In step 601, the CPU 300 receives traffic parameters CIR (Committed Information Rate), Bc (Committed Burst Size), and Be (Excess Burst Size) for each connection from the CCCP 108 through FMDA 202. Then, in step 602, the CPU 300 calculates the unit time Tc from Equation 1 described in FIG. 4 when the frame relay network is normal using the received traffic parameters CIR, Bc, and Be. In operation 603, the CPU 300 calculates a Tcq value obtained by integerizing the Tc value. As a method for purifying the Tcq value, it can be rounded up or down. At this time, when the raised or lowered value exceeds the maximum integer (eg 10), Tcq is the maximum integer value. When the Tcq value is calculated as described above, the CPU 300 calculates Bcq and Beq by Equation 2 in step 604.

Thereafter, in step 605, the CPU 300 replaces Bc and Be with the input parameters Bcq and Beq, registers the connection information in the connection table of the timer corresponding to Tcq, and proceeds to step 606. Thereafter, in step 606, the CPU 300 drives the Tcq timer and clears the Tcq tagging flag registered in the connection information indicating that the Tcq timer has been operated. In step 607, the CPU 300 initializes the variable Bc_Token and Be_Token values for traffic management to the values Bcq and (Bcq + Beq). In this way, the Tcq timer operates according to its period and repeats the operation of reinitializing its Bcq_Token and Beq_Token values. When the Tcq timer is operated, a Tcq tagging flag is set for each connection registered in its own connection table. Referring to FIG. 7, when the packet data is received after registering the traffic parameters for each connection, the CPU 300 sets the Tcq tagging flag of the connection in step 702 when the packet data is received through the corresponding connection. If the Tcq tagging flag is not set, the process proceeds to step 705. However, if the Tcq tagging flag is set, the process proceeds to step 703. In step 703, the CPU 300 initializes Bc_Token and Be_Token values to Bcq and (Bcq + Beq). Thereafter, the CPU 300 clears the Tcq tagging flag in step 704 and obtains the packet size (Pkt_Size) in step 705. Then, in step 706, the CPU 300 checks whether the obtained packet size (Pkt_Size) is larger than Bc_Token, and proceeds to step 707 if it is not larger than Bc_Token. In step 707, the CPU 300 sets the DE (Discard Eligibility) bit of the packet to 0 and proceeds to step 711. However, if the obtained packet size (Pkt_Size) is larger than Bc_Token, the process proceeds to step 708 where the CPU 300 checks whether the obtained packet size (Pkt_Size) is larger than Be_Token. If the obtained packet size (Pkt_Size) is larger than Be_Token, the flow proceeds to step 709 to discard the packet data. However, if the obtained packet size (Pkt_Size) is smaller than Be_Token, the process proceeds to step 710 and sets the DE (Discard Eligibility) bit of the packet to 1 and proceeds to step 711. In step 711, the CPU 300 reduces the Bc_Token value and the Be_Token value by the packet size (Pkt_Size). Thereafter, the CPU 300 transmits the packet data in step 712. Thus, to manage traffic like this, several Tc values are selected before the connections are established. For example, if Tc is set to an integer between 1 and 10, it is 1,2,3, .... 10 seconds. Each Tc timer has its own connection table and initializes it. Then, the timer corresponding to Tc is driven. For example, 10, 20 timers are operated by operating in a period of 1, 2, 3, ... 10 seconds.

As described above, in the present invention, in controlling traffic in a frame relay network, traffic parameters Tc values differently given for each connection are integerized and grouped into several groups. Therefore, traffic management is performed by driving one timer on connections having the same Tc value. It can be done efficiently, and it is possible to improve the performance of the system by shortening the time required to execute the application program by reducing the number of timers by driving one timer to the connections having the same Tc value.

Claims (1)

In the traffic management method in the frame relay interworking module of the asynchronous transmission mode switch interlocked with the frame relay, Detecting a unit time (Tc) for driving a timer when the network is normal by receiving a traffic parameter when setting a connection registration; Calculating a unit time Tc for driving the detected timer as an integer value; When the network corresponding to the calculated integer value Tcq is normal, the maximum data amount Bcq guaranteed to the user for a unit time (Tc) and the maximum data amount Bcq for the user for a unit time without being guaranteed by the network. Calculating the amount of data (Beq) allowed to exceed Replacing the input parameter with the calculated maximum data amount Bcq and the allowed data amount Beq and registering the connection information in a connection table of a timer having the same period Tcq; Initializing the variable Bc token and Be token for traffic management with Bcq, Bcq + Beq values, respectively, Clearing the Tcq tagging flags of all connections registered in the connection table when the Tcq timer starts operation according to a predetermined period; Detecting whether a Tcq tagging flag of the connection is set when packet data is received through the connection; Obtaining a size of packet data when the Tcq tagging flag of the connection is not set; Traffic management of the frame relay network in the asynchronous transmission mode switch, characterized in that the packet data is transmitted when the size of the packet data is less than the maximum data amount (Bc) guaranteed to the user for a unit time when the network is normal. Way.