KR20000008544A - Method of forming contact hole - Google Patents

Method of forming contact hole Download PDF

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Publication number
KR20000008544A
KR20000008544A KR1019980028415A KR19980028415A KR20000008544A KR 20000008544 A KR20000008544 A KR 20000008544A KR 1019980028415 A KR1019980028415 A KR 1019980028415A KR 19980028415 A KR19980028415 A KR 19980028415A KR 20000008544 A KR20000008544 A KR 20000008544A
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KR
South Korea
Prior art keywords
contact hole
metal wiring
forming
lower contact
insulating film
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KR1019980028415A
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Korean (ko)
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정무경
김영욱
민경진
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윤종용
삼성전자 주식회사
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Priority to KR1019980028415A priority Critical patent/KR20000008544A/en
Publication of KR20000008544A publication Critical patent/KR20000008544A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: Method of forming a contact hole is provided to prevent etching fail and over-etching of a metal wiring. CONSTITUTION: The method of forming the contact hole comprises the steps of: forming a metal wiring and a floating oxide layer on a semiconductor substrate; forming a lower contact hole in the floating insulating layer; filling the lower contact hole using a conductive material; forming a interlayer insulating layer; and forming a upper contact hole in the interlayer insulating layer. As a result, contact hole is perfectly formed in a region which the floating oxide layer with dielectric constant is formed thickly. Also, It is prevented that the metal wiring is over-etched in the region which the floating oxide layer is formed thinly.

Description

콘택홀 형성방법.Contact hole formation method.

본 발명은 반도체 소자의 제조방법에 관한 것으로서, 상세하게는 저유전율의 유동성산화막 위에 형성되는 콘택홀 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a contact hole formed on a fluid oxide film having a low dielectric constant.

반도체 소자의 제조공정중 금속배선을 형성함에 있어서, 금속배선간의 커패시턴스를 낮추기 위하여 저유전율을 갖는 유동성산화막(flowable Oxide)을 사용한다.In forming metal wirings in a semiconductor device manufacturing process, a flowable oxide film having a low dielectric constant is used to lower the capacitance between the metal wirings.

도 1a 내지 도 1b는 종래의 반도체 소자의 제조방법에 의한 콘택홀 형성방법을 순차적으로 도시한 단면도들이다. 먼저, 도 1a를 참조하면, 단위소자(미도시)가 형성된 반도체기판(10)상에 금속배선용 물질을 증착한 후 패터닝하여 금속배선(12)을 형성한다. 다음, 금속배선(12)이 형성된 반도체 기판(10)상에 저유전율의 유동성산화막(14)을 증착하고, 다시 층간절연막(16)을 증착한다. 도 1b를 참조하면, 사진식각공정을 이용하여 층간절연막(16) 및 저유전율의 유동성산화막(14)을 식각함으로써 콘택홀(a,b)을 형성한다.1A through 1B are cross-sectional views sequentially illustrating a method of forming a contact hole by a conventional method of manufacturing a semiconductor device. First, referring to FIG. 1A, a metal wiring material is formed by depositing a metal wiring material on a semiconductor substrate 10 on which a unit device (not shown) is formed and then patterning the metal wiring 12. Next, a low dielectric constant fluid oxide film 14 is deposited on the semiconductor substrate 10 on which the metal wiring 12 is formed, and then the interlayer insulating film 16 is deposited. Referring to FIG. 1B, contact holes a and b are formed by etching the interlayer insulating layer 16 and the low dielectric constant fluid oxide layer 14 using a photolithography process.

그런데, 금속배선 위에 형성되는 저유전율의 유동성산화막은 금속배선의 폭에 따라 프로파일(profile)이 달라진다. 즉, 폭이 넓은 금속배선위에 형성되는 저유전율의 유동성산화막은 그 두께가 두꺼우며, 폭이 좁은 금속배선위에 형성되는 저유전율의 유동성산화막은 두께가 얇다. 또한, 식각공정을 진행함에 있어서, 저유전율의 유동성산화막은 층간절연막에 비해 식각율이 나쁘다. 따라서, 저유전율의 유동성산화막 위에 층간절연막을 증착하고 콘택홀을 형성하기 위한 식각공정을 진행하는 경우, 저유전율의 유동성산화막이 두꺼운 부분은 콘택홀이 불완전하게 형성되거나(도 1b의 b), 경우에 따라서는 저유전율의 유동성산화막이 얇은 부분의 하부에 형성된 금속배선이 과다하게 식각되는 문제점이 있다. 그 결과, 소자의 특성이 나빠지게 된다.However, the low dielectric constant flowable oxide film formed on the metal wiring has a different profile depending on the width of the metal wiring. That is, the low dielectric constant flowable oxide film formed on the wide metal wiring is thick and the low dielectric constant flowable oxide film formed on the narrow metal wiring is thin. In addition, in performing the etching process, the low dielectric constant fluid oxide film has a lower etching rate than the interlayer insulating film. Therefore, when the interlayer insulating film is deposited on the low dielectric constant fluid oxide film and the etching process for forming the contact hole is performed, in the case where the thick dielectric constant oxide film is thickly formed, the contact hole is incompletely formed (b of FIG. 1B). Accordingly, there is a problem that the metal wiring formed in the lower portion of the fluid oxide film having a low dielectric constant is excessively etched. As a result, the characteristics of the device deteriorate.

본 발명은 상기와 같은 문제점을 해결하기 위하여 안출된 것으로서, 저유전율의 유동성산화막이 두껍게 형성된 부분에 대하여 하부콘택홀을 형성함으로써 완전한 콘택홀을 형성하는 콘택홀 형성방법을 제공하는데 그 목적이 있다.The present invention has been made to solve the above problems, and an object thereof is to provide a contact hole forming method for forming a complete contact hole by forming a lower contact hole in a portion where a low dielectric constant fluid oxide film is formed thick.

도 1a 내지 도 1b는 종래의 반도체 제조방법에 의한 콘택홀 형성방법을 순차적으로 도시한 단면도들이다.1A through 1B are cross-sectional views sequentially illustrating a method of forming a contact hole by a conventional semiconductor manufacturing method.

도 2a 내지 도 2c는 본 발명에 따른 반도체 제조방법에 의한 콘택홀 형성방법을 순차적으로 도시한 단면도들이다.2A through 2C are cross-sectional views sequentially illustrating a method of forming a contact hole by a semiconductor manufacturing method according to the present invention.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

10,20:반도체 기판 12,22:금속배선10,20: semiconductor substrate 12,22: metal wiring

14,24:저유전율의 유동성산화막 26:포토레지스트막14, 24: low dielectric constant fluidized oxide film 26: photoresist film

16,30:층간절연막16,30: interlayer insulation film

상기 목적을 달성하기 위한 본 발명의 콘택홀 형성방법은, 단위소자가 형성된 반도체 기판상에 금속배선용 물질을 증착하는 단계와, 금속배선용 물질을 패터닝하여 금속배선을 형성하는 단계와, 금속배선이 형성된 반도체기판상에 유동성절연막을 증착하는 단계와, 유동성절연막에 하부콘택홀을 형성하는 단계와, 하부콘택홀을 전도성물질로 채우는 단계와, 결과물상에 층간절연막을 증착하는 단계와, 층간절연막을 패터닝하여 상부콘택홀을 형성하는 단계를 구비한다. 이때, 하부콘택홀은 2㎛ 이상의 폭을 갖는 금속배선위에 형성된 저유전율의 유동성산화막에만 형성되는 것이 바람직하다. 또한, 하부콘택홀은 하부콘택홀의 상부에 형성되는 상부콘택홀보다 더 크게 형성하되, 하부콘택홀의 크기는 상부콘택홀의 크기보다 0.3㎛정도 더 큰 것이 바람직하다.The contact hole forming method of the present invention for achieving the above object comprises the steps of: depositing a metal wiring material on a semiconductor substrate on which a unit device is formed, forming a metal wiring by patterning the metal wiring material, and forming a metal wiring Depositing a flowable insulating film on the semiconductor substrate, forming a lower contact hole in the flowable insulating film, filling the lower contact hole with a conductive material, depositing an interlayer insulating film on the resultant, and patterning the interlayer insulating film And forming an upper contact hole. At this time, the lower contact hole is preferably formed only in the low-k dielectric fluid oxide film formed on the metal wiring having a width of 2㎛ or more. In addition, the lower contact hole is formed larger than the upper contact hole formed on the upper portion of the lower contact hole, the size of the lower contact hole is preferably about 0.3㎛ larger than the size of the upper contact hole.

본 발명에 의해 금속배선위의 저유전율의 유동성산화막에 콘택홀을 형성하는 경우, 저유전율의 유동성산화막이 두꺼운 영역에서 콘택홀이 불완전하게 형성되거나 저유전율의 유동성산화막이 얇은 영역에서 하부의 금속배선이 과다하게 식각되는 것을 방지할 수 있다.According to the present invention, when forming a contact hole in a low dielectric constant fluid oxide film on a metal wiring, the contact hole is incompletely formed in a region having a low dielectric constant fluid oxide film, or a lower metal wiring is formed in a region where a low dielectric constant fluid oxide film is thin. This excessive etching can be prevented.

이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 실시예를 상세히 설명한다. 그러나 본 발명이 하기 실시예에 국한되는 것으로 해석되어져서는 안된다. 또한, 도면에서 층이나 영역들의 두께는 설명을 명확하게 하기 위하여 과장된 것이다. 도면에서 동일한 참조부호는 동일한 구성요소를 나타낸다. 또한 어떤 층이 다른 층 또는 기판의 "상부"에 있다고 기재된 경우, 상기 어떤 층이 상기 다른 층 또는 기판의 상부에 직접 접촉하면서 존재할 수도 있고, 그 사이에 다른 제3의 층이 개재될 수도 있다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention should not be construed as limited to the following examples. In the drawings, the thicknesses of layers or regions are exaggerated for clarity. Like reference numerals in the drawings denote like elements. In addition, where a layer is described as being on the "top" of another layer or substrate, the layer may be present in direct contact with the top of the other layer or substrate, with another third layer interposed therebetween.

도 2a 내지 도 2c는 본 발명에 따른 반도체 소자의 제조방법에 의한 콘택홀 형성방법을 순차적으로 도시한다.2A through 2C sequentially illustrate a method of forming a contact hole by a method of manufacturing a semiconductor device according to the present invention.

먼저, 도 2a를 참조하면, 단위소자(미도시)가 형성된 반도체 기판(20)상에 금속배선물질, 예컨대 알루미늄 합금 또는 구리등을 증착한 후 사진식각공정을 이용하여 패터닝함으로써 금속배선(22)을 형성한다. 다음, 금속배선(22)이 형성된 반도체 기판(20)상에 유동성절연막(24)을 증착한다. 이때, 유동성절연막(24)은 유동성절연막, 실리콘산화막이나 실리콘 질화막, 및 저유전율의 유동성산화막의 적층구조로 이루어질수도 있다. 다음, 유동성절연막(24)상에 포토레지스트를 도포한 후 노광 및 현상함으로써 하부콘택홀을 형성하기 위한 마스크 역할을 하는 포토레지스트막(26)을 형성한다.First, referring to FIG. 2A, a metal wiring material, for example, aluminum alloy or copper, is deposited on a semiconductor substrate 20 on which a unit device (not shown) is formed, and then patterned by using a photolithography process. To form. Next, a flowable insulating film 24 is deposited on the semiconductor substrate 20 on which the metal wiring 22 is formed. In this case, the fluid insulating film 24 may be formed of a laminated structure of a fluid insulating film, a silicon oxide film or a silicon nitride film, and a low dielectric constant fluid oxide film. Next, after the photoresist is applied on the flowable insulating film 24, the photoresist film 26 serving as a mask for forming the lower contact hole is formed by exposing and developing the photoresist.

도 2b를 참조하면, 포토레지스트막(26)을 마스크로 하여 식각공정을 진행함으로써 저유전율의 유동성산화막(24)상에 하부콘택홀을 형성한 후, 형성된 하부콘택홀을 전도성물질, 예컨대 알루미늄 합금 또는 구리등으로 채운다. 다음, 포토레지스트막(26)을 제거한다. 그 결과, 저유전율의 유동성산화막(24)상에 금속배선(22)과 층간절연막(도 2c의 30) 상부에 형성될 금속배선을 연결해 주는 콘택(28)이 형성된다. 이때, 2㎛ 이상의 폭을 갖는 금속배선(22)위의 저유전율의 유동성산화막(24)이 두껍게 형성되기 때문에, 종래의 방법에 의해 콘택홀을 형성할 경우 콘택홀이 불완전하게 형성되거나 저유전율의 유동성산화막의 하부에 있는 금속배선이 과다하게 식각된다. 이러한 문제점을 해결하기 위하여 하부콘택홀을 형성한다. 따라서, 하부콘택홀은 2㎛ 이상의 폭을 갖는 금속배선(22)위에 형성된 저유전율의 유동성산화막(24)에 형성하는 것이 바람직하다. 또한, 하부콘택홀은 하부콘택홀위에 형성되는 상부콘택홀보다 크게 형성하되, 하부콘택홀의 크기는 상부콘택홀의 크기보다 0.3㎛ 정도 더 큰 것이 바람직하다.Referring to FIG. 2B, after the etching process is performed using the photoresist layer 26 as a mask, a lower contact hole is formed on the fluidized oxide film 24 having a low dielectric constant, and then the lower contact hole is formed of a conductive material such as an aluminum alloy. Or fill with copper. Next, the photoresist film 26 is removed. As a result, a contact 28 is formed on the low dielectric constant fluid oxide film 24 to connect the metal wiring 22 and the metal wiring to be formed on the interlayer insulating film 30 (FIG. 2C). At this time, since the low dielectric constant fluid oxide film 24 on the metal wiring 22 having a width of 2 μm or more is formed thickly, when the contact hole is formed by a conventional method, the contact hole is incompletely formed or has a low dielectric constant. The metal wiring at the bottom of the fluid oxide film is excessively etched. In order to solve this problem, a lower contact hole is formed. Therefore, the lower contact hole is preferably formed in the low-k dielectric fluid oxide film 24 formed on the metal wiring 22 having a width of 2 µm or more. In addition, the lower contact hole is formed to be larger than the upper contact hole formed on the lower contact hole, the size of the lower contact hole is preferably about 0.3㎛ larger than the size of the upper contact hole.

도 2c를 참조하면, 결과물상에 층간절연막(30)을 증착한후 사진식각공정을 이용하여 층간절연막(30) 및 저유전율의 유동성산화막(24)을 패터닝한다. 그 결과, 금속배선(22) 또는 하부콘택홀 상에 상부콘택홀(c,d)이 형성된다.Referring to FIG. 2C, after depositing the interlayer dielectric layer 30 on the resultant, the interlayer dielectric layer 30 and the low dielectric constant flowable oxide layer 24 are patterned using a photolithography process. As a result, upper contact holes c and d are formed on the metal wiring 22 or the lower contact hole.

이상 실시예를 들어 본 발명에 대해 설명하였으나, 본발명은 상술한 실시예에 한정되는 것은 아니며, 단지 본 실시예들은 본 발명의 개시가 완전하도록 하며, 통상의 지식을 가진 자에게 발명의 범주를 완전하게 알려주기 위하여 제공되는 것으로서, 본 발명의 기술사상 및 범위내에서 당 분야의 통상의 지식을 가진 자에 의하여 각종 변형 및 개량이 가능함은 명백하다.Although the present invention has been described with reference to the above embodiments, the present invention is not limited to the above-described embodiments, only these embodiments are intended to complete the disclosure of the present invention, and the scope of the invention to those skilled in the art. It is apparent that various modifications and improvements are possible to those skilled in the art without departing from the spirit and scope of the present invention as provided to fully inform the present invention.

이상에서 살펴본 바와 같이 본 발명에 따른 콘택홀 형성방법은, 금속배선위의 저유전율의 유동성산화막이 두껍게 형성된 영역에 상부콘택홀을 형성함으로써, 저유전율의 유동성산화막이 두껍게 형성된 영역에서 콘택홀이 불완전하게 형성되거나 저유전율의 유동성산화막이 얇게 형성된 영역에서 금속배선이 과다하게 식각되는 것을 방지할 수 있다.As described above, in the method of forming a contact hole according to the present invention, the upper contact hole is formed in a region in which the low dielectric constant fluid oxide film is formed on the metal wiring, so that the contact hole is incomplete in the region in which the low dielectric constant fluid oxide film is thickly formed. It is possible to prevent excessive etching of the metal wiring in a region in which the flexible oxide film is formed thinly or in which the fluid oxide film having a low dielectric constant is thinly formed.

Claims (5)

단위소자가 형성된 반도체 기판상에 금속배선용 물질을 증착하는 단계;Depositing a metal wiring material on a semiconductor substrate on which unit devices are formed; 상기 금속배선용 물질을 패터닝하여 금속배선을 형성하는 단계;Patterning the metal wiring material to form a metal wiring; 상기 금속배선이 형성된 상기 반도체기판상에 유동성절연막을 증착하는 단계;Depositing a flowable insulating film on the semiconductor substrate on which the metal wiring is formed; 상기 유동성절연막에 하부콘택홀을 형성하는 단계;Forming a lower contact hole in the flowable insulating film; 상기 하부콘택홀을 전도성물질로 채우는 단계;Filling the lower contact hole with a conductive material; 결과물상에 층간절연막을 증착하는 단계; 및Depositing an interlayer insulating film on the resultant; And 상기 층간절연막을 패터닝하여 상부콘택홀을 형성하는 단계를 구비하는 것을 특징으로 하는 콘택홀 형성방법.And forming an upper contact hole by patterning the interlayer insulating layer. 제1항에 있어서, 상기 하부콘택홀은 2㎛ 이상의 폭을 갖는 상기 금속배선위에 형성된 상기 저유전율의 유동성산화막에만 형성되는 것을 특징으로 하는 콘택홀 형성방법.The method of claim 1, wherein the lower contact hole is formed only in the low-k dielectric fluid oxide film formed on the metal wiring having a width of 2 μm or more. 제1항에 있어서, 상기 하부콘택홀은 상기 하부콘택홀의 상부에 형성되는 상부콘택홀보다 더 크게 형성하되, 상기 하부콘택홀의 크기는 상기 상부콘택홀의 크기보다 0.3㎛정도 더 큰 것을 특징으로 하는 콘택홀 형성방법.The contact of claim 1, wherein the lower contact hole is formed to be larger than an upper contact hole formed in an upper portion of the lower contact hole, and the size of the lower contact hole is about 0.3 μm larger than the size of the upper contact hole. Hole formation method. 제1항에 있어서, 상기 금속배선이 형성된 상기 반도체기판상에 유동성절연막을 증착하는 단계는 상기 유동성절연막을 증착하는 단계와, 상기 유동성절연막상에 실리콘산화막 또는 실리콘질화막을 증착하는 단계와, 결과물상에 유동성절연막을 더 증착하는 단계를 구비하는 것을 특징으로 하는 콘택홀 형성방법.The method of claim 1, wherein the depositing a flowable insulating film on the semiconductor substrate on which the metal wiring is formed comprises depositing the flowable insulating film, depositing a silicon oxide film or a silicon nitride film on the flowable insulating film, and And depositing a flowable insulating film in the contact hole. 제1항에 있어서, 금속배선용물질 및 상기 하부콘택홀을 채우는 전도성물질은 알루미늄합금 또는 구리인 것을 특징으로 하는 콘택홀 형성방법.The method of claim 1, wherein the metal wiring material and the conductive material filling the lower contact hole are aluminum alloy or copper.
KR1019980028415A 1998-07-14 1998-07-14 Method of forming contact hole KR20000008544A (en)

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