KR20000003026A - Video/audio synchronizing device for high definition tv audio decoder - Google Patents

Abstract

PURPOSE: A video/audio synchronizing device for a high definition TV audio decoder is provided to simplify the operation of the device by performing operation with a shift register and an adder. CONSTITUTION: The video/audio synchronizing device comprises; a signal classification part(10) to classify MPEG(Moving Picture Export Group) signals into video and audio signals; a video decoder(20) to decode a video signal classified in the classification part(10); a picture delay memory(30) to delay an applicable video for a particular time among the ones decoded by the decoder(20); a video output part(50) to output a video passing thru the switch(40).

Description

Video / Audio Synchronizer of High Definition Television Audio Decoder

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an audio decoder of High Definition TeleVision (HDTV), and more particularly to a video of a high definition television audio decoder for synchronizing and outputting video and audio when decoding and processing video and audio having different decoding playback times. / Audio synchronizer.

In general, HDTV is a television that realizes high definition and large screen size by doubling the number of scanning lines and increasing the aspect ratio compared to conventional televisions.

In such HDTVs, video and audio signals of an MPEG (Moving Picture Export Group (MPEG)) method need to be decoded and processed simultaneously. Since the decoding playback time for video and the decoding playback time for audio are different, video at the time of outputting video and audio Synchronization between the audio and the audio is possible to reproduce the multimedia.

In general, two things need to be understood when considering the moving picture export group (MPEG) synchronization method for video and audio signals. One of them is that information called " time stamps " indicating when to perform decoding playback is added for each decoding playback unit called access units of video and audio. The other is that the time reference is given by the information called "PCR (Program Clock Reference)" for the time stamp.

This time stamp is the same as the time management tag (tag) of a kind of decoding reproduction process attached to each access unit. In the MPEG encoding method, time management information of a reproduction output called PTS (Presentation Time Stamp) is used.

A typical HDTV audio decoder reproduces and outputs the access unit when the internal STC (System Time Clock) becomes the PTS. The precision of the PTS represents a value measured by a clock of 90 kHz in 33-bit length.

In addition, PCR is information for setting the value of STC which is a time reference in the decoder of the MPEG system including the video and audio decoder to the value intended by the encoder.

A video / audio synchronization method of a conventional HDTV audio decoder is as follows.

First, according to the international standard MPEG-2 system ISO / IEC 13818-1, the main buffer size of the audio ES is 3584 bytes.

According to the AC-3 standard, the audio bitstream has a minimum bit rate of 32 Kbps. Therefore, the maximum time difference between audio and video is shown in [Equation 1].

[Equation 1]

3584 / (32/8) = 0.875 sec

And the STC 33-bit counter of PCR counts 90K per second to 90 / msec. The AC-3 audio block size is 5.3msec.

From these results, 9 bits are required to indicate the time difference between the PTS and the STC. That is, the field in which the actual time difference information between the PTS and the STC is recorded is

1 sec / 5.3 msec = 200, with 8 bits ( 2 ⁸ = 256 ), And a flag is needed to indicate whether the audio phase is faster or later than the video phase.

The difference between PTS and STC is shown in [Equation 2].

[Equation 2]

Diff [16 ..] = PTS [32..0]-STC [32..0]

Also, the time difference between PTS and STC is shown in [Equation 3].

[Equation 3]

Time [8..0] = = Diff [] / (90 * 5.33) = Diff [] / 479.7

[Equation 3] is the number of audio blocks of AC-3. To calculate the number of audio blocks of AC-3, a decimal point operation must be performed. Since the calculation amount and the complexity are high by such a decimal point calculation, the number of audio blocks of the AC-3 was calculated using a digital signal processing unit (DSP) which is a dedicated processor.

Therefore, since the video / audio synchronizer of the conventional HDTV audio decoder has to calculate a decimal point, it is difficult to implement the device and increase the device volume due to the complicated calculation process.

Accordingly, the present invention has been proposed to solve the above-mentioned conventional problems, and an object of the present invention is to provide a video signal between audio and video of an audio decoder in order to synchronize video and audio of an HDTV MPEG (Moving Picture Export Group; MPEG) method. When calculating the delay difference, a high-definition television audio decoder video / decoder can be easily implemented by approximating a real number below a decimal point to an integer and then performing an approximated integer to a shift register. An audio synchronizer is provided.

In order to achieve the above object, a video / audio synchronization device of a high definition television audio decoder according to the present invention,

A counter for counting PCR which is a time reference reference value and outputting PTS which is reproduction output time management information; A subtractor for calculating a difference between a signal output from the counter and a reference synchronization signal; An integer division unit configured to approximate a real division operation to an integer to perform an operation approximated to a shift register to obtain the number of audio block differences between video and audio; The technical configuration is characterized in that it consists of a time difference calculation unit for calculating the time difference between the audio and video by adding the approximated calculation results performed by the integer division unit.

1 is a block diagram of an HDTV receiver to which the present invention is applied;

2 is a block diagram of a video / audio synchronization device of an HDTV audio decoder according to the present invention;

3 is an explanatory diagram showing a process in which a division operation is simply performed according to the present invention.

<Explanation of symbols for main parts of the drawings>

100: counter 200: subtractor

300: integer division part 310-330: first to third shifters

400: time difference calculator 410-420: first and second adders

Hereinafter, a video / audio synchronization device of the present invention high definition television audio decoder as described above will be described in detail with reference to the accompanying drawings.

1 is a block diagram of an MPEG system reference decoder to which the present invention is applied.

As shown therein, the signal classification unit 10 classifies the MPEG signal encoded by the MPEG method into video and audio; A video decoder 20 for decoding the video classified by the signal classifier 10; A picture delay memory (30) for delaying a corresponding video of the video decoded by the video decoder (20) for a predetermined time; A switch (40) for selecting the video of the video decoder (20) and the picture delay memory (30); A video output unit (50) for outputting a video through the switch (40); An audio decoder 60 for decoding the audio output from the signal classifier 10; The speaker 70 is configured to output audio decoded by the audio decoder 60.

The signal classification unit 10 controls the MPEG signal encoded by the MPEG method by a central processing unit (an apparatus for decoding and reproducing audio and video by controlling the overall operation of the MPEG system reference decoder, not shown in FIG. 1). According to the switch 11 to transmit to the block, the first and second buffers (12-13) for receiving the MPEG signal in accordance with the connection state of the switch 11, respectively for a predetermined time and the switch ( When 11) is connected, the MPEG signal is input, the MPEG signal is classified into video and audio, and the STC generator 15 includes a system decoder 14 for generating an STC which is a reference synchronization signal.

Referring to the operation of the MPEG system reference decoder configured as described above, when the MPEG signal is transmitted, the signal classification unit 10 classifies and outputs the MPEG signal into video and audio. In addition, the system decoder 14 in the signal classification unit 10 generates an STC which is a basic synchronization signal.

The video decoder 20 then decodes the video output from the signal classifier 10 by the STC output from the system decoder 14 in the signal classifier 10. In addition, the audio decoding unit 60 decodes the audio classified by the signal classification unit 10 by synchronizing the decoding operation to the STC output from the system decoder 14. However, the time required for the video decoding operation and the audio decoding operation are different. Therefore, in order to reproduce the multimedia of audio and video, the audio and video must be synchronized and reproduced, so the output of the audio and video must be synchronized.

Therefore, in order to synchronize the audio decoding operation of the audio decoding unit 60 with the output time point of the video, a video / audio synchronization device controlling the audio decoding operation is required for the audio decoding unit 60, and the present invention provides such a video / audio system. It is for simple configuration of the synchronization device.

2 is a block diagram of a video / audio synchronization device of an HDTV audio decoder according to the present invention.

As shown therein, a counter 100 for counting PCR which is a time reference reference value and outputting PTS which is reproduction output time management information; A subtractor 200 for calculating a difference between a signal output from the counter 100 and a reference synchronization signal; An integer division unit 300 which approximates a real division operation to an integer to perform an operation approximated to a shift register to obtain an audio block difference number between video and audio; The time difference calculator 400 calculates a time difference between audio and video by adding an approximated result of the calculation performed by the integer division unit 300.

The integer divider 300 may include a first shifter 310 for performing integer division by shifting the output signal of the subtractor 200 by 9 bits to a lower bit, and the subtractor 200. A second shifter 320 for performing integer division by shifting the output signal toward the lower bit by 13 bits and a second division for shifting the output signal of the subtracter 200 toward the lower bit by 17 bits to perform integer division It consists of two shifters 330.

The time difference calculator 400 includes a first adder 410 for adding output signals of the first and second shifters 310 and 320 of the integer division unit 300, and the first adder 410. And an output signal of the third shifter 330 of the integer division unit 300, and outputs a time difference between audio and video.

The operation of the video / audio synchronization device of the HDTV audio decoder according to the present invention configured as described above will be described in detail as follows.

First, when the video / audio synchronizer is initialized, the counter 100 operates at 90 kHz per second, I ² C The PCR transmitted from the bus interface is counted and the PTS [32..0] is output as a result of counting. In addition, when the enable signal en-time enabling the operation of the subtractor 200 is active, the subtractor 200 outputs the PTS [32..0] outputted from the counter 100 and FIG. The difference value of STC [32..0] generated by the system decoder 14 in the signal classification section 10 is calculated.

In order to simplify the arithmetic operation of the above expression (3), real numbers below the decimal point are converted into approximate integer operations. The process of converting a real division operation after the decimal point to an integer operation will be described. Since Diff [16..0] is 17 bits, 2 ^ 17 is taken as an example.

2 ^ 17 / 479.7 = 273.24

If you convert this real 273.24 to an integer, it becomes 273.

273 = 1 + 2 ^ 4 + 2 ^ 8

Thus, Time [] = Diff [] / 479.7 can be converted to Equation 4.

[Equation 4]

Diff [] / 2 ^ 9 + Diff [] / 2 ^ 13 + Diff [] / 2 ^ 17

As shown in [Equation 4], we need to calculate a complex real number with a decimal number, such as dividing Diff [] by 479.7. Diff [] by 2 ^ 9, 2 ^ 13, 2 ^ 17 You can replace them by dividing them separately. And dividing a number by 2 ^ 9 has the same effect as shifting that number right by nine bits. Therefore, Equation 5 converts Diff [] to the right by 9 bits, Diff [] to the right by 13 bits, and Diff [] to the right by 17 bits. Means that.

In addition, when realizing a device using a shift operation, if a real 4747 is approximated by taking only an integer part and a division operation is performed, an error of the maximum number of two blocks of AC-3 audio blocks occurs (that is, the difference between the PTS-STCs). If the value is 512 * n + 511, the shift operation generates two blocks of error compared to the division operation). Therefore, in order to reduce this error as much as possible, the value is included in the decimal point when the shift operation is performed. Finally, 9 bits are taken as the number of AC-3 audio blocks.

Therefore, Diff [], which is a difference between PTS and STC calculated by the subtractor 200, is transmitted to the integer division part 300. As illustrated in FIG. 3A, the first shifter 310 shifts Diff [] to the right of the lower bit side by 9 bits and outputs the same to the first adder 410. The second shifter 320 shifts Diff [] to the right by 13 bits and outputs it to the first adder 410 as shown in FIG. The third shifter 330 shifts Diff [] to the right as shown in (c) and outputs it to the second adder 420.

Thus, the first adder 410 and the second adder 420 add the output signals of the first to third shifters 310 to 330, and then round them to 9 bits, which is a phase difference between audio and video. Output Time [8..0]. If this Time [8..0] is negative, the audio is out of phase with respect to the video, and if Time [8..0] is positive, it means that the audio is out of phase with the video.

Accordingly, in FIG. 1, when time for which audio currently input to the audio decoder 60 is to be output, that is, when the PTS is smaller than the STC-tolerance value, the audio decoder 60 performs a decoding operation. Instead, it continues to receive a packetized elementary stream (PES) until the PTS falls within the tolerance of the STC.

If it is not yet time for the audio currently input to the audio decoder 60 to be output, that is, if the PTS is larger than the STC + tolerance value, the audio decoder 60 stops decoding and the PTS is the tolerance of the STC. Wait for it to be included.

If Time {8..0] is output as a number indicating that the PTS is not within the tolerance range of the STC, the audio decoder 60

Like STC-tolerance <PTS <STC + tolerance, the decoding operation is adjusted so that the PTS falls within the tolerance of the STC.

The tolerance here is set so that audio is 20msec faster or 40msec slower than video. Thus, the audio decoder 60 controls the decoding of the audio so that Time [8..0], the number of audio blocks of the AC-3 output from the video / audio synchronizer, is in the range of -7 to +3.

Thus, the present invention simplifies the apparatus by performing the number of audio blocks of AC-3, which are phase difference values of audio and video, by using a shifter and an adder after approximating a real operation to an integer for synchronizing audio and video. Can be configured.

The present invention can be applied to decoders of MPEG systems as well as HDTV audio decoders.

As described above, the video / audio synchronizer of the high-definition television audio decoder according to the present invention can easily configure the video / audio synchronizer by approximating a complex real number operation to an integer and then using a shifter and an adder. There is an effect that becomes possible.

Claims (3)

In the video / audio synchronizer of the HDTV audio decoder, A counter for counting PCR which is a time reference reference value and outputting PTS which is reproduction output time management information; A subtractor for calculating a difference between a signal output from the counter and a reference synchronization signal; An integer division unit configured to approximate a real division operation to an integer to perform an operation approximated to a shift register to obtain the number of audio block differences between video and audio; And a time difference calculator for calculating a time difference between audio and video by adding an approximated calculation result performed by the integer division unit. The method of claim 1, wherein the integer division unit, A first shifter performing an integer division by shifting the output signal of the subtractor by 9 bits toward the lower bit and a second shifter performing a integer division by shifting the output signal of the subtractor by 13 bits to the lower bit And a second shifter configured to perform an integer division by shifting the output signal of the subtracter by 17 bits toward the lower bit. The method of claim 1, wherein the time difference calculator, A time difference between audio and video by adding a first adder that adds output signals of the first and second shifters of the purified water divider, and an output signal of the third shifter of the integer divider, to the output signal of the first adder And a second adder for outputting the video / audio synchronous device of the HDTV audio decoder.