KR19990060946A - Device Separator Formation Method of Semiconductor Device - Google Patents

Abstract

The present invention discloses a method of forming a device isolation film of a semiconductor device capable of more effectively rounding the surface of an interface between an active region and a field region of a trench type isolation film to improve characteristics of the semiconductor device.

The trench type isolation layer according to the present invention is formed as follows. First, predetermined etch stop films for the pad oxide film, the nitride film, and the nitride film are sequentially formed on the semiconductor substrate, and the etch stop film and the nitride film are exposed so as to mask the active predetermined region of the substrate and to expose the substrate where the field region is to be formed. And the pad oxide film is patterned. Then, spacers are formed on both exposed sidewalls of the etch stop layer, the nitride layer, and the pad oxide layer, and the spacers and the exposed substrate are etched to form trenches of a predetermined depth. Thereafter, an insulating film is formed on the entire surface of the substrate to be filled in the trench, and the insulating film and the etch stop film are etched and planarized to expose the nitride film. Then, the nitride film and the pad oxide film are removed, the insulating film is removed so that the substrate is exposed, the substrate is planarized, and the trench type isolation film is completed.

Description

Device Separator Formation Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a trench type isolation film.

ISOLATION technology is an integrated device fabrication function that separates the individual devices constituting the integrated device from each other electrically and structurally so that each device can independently perform a given function without interference from adjacent devices. It is a technique to grant. As a device isolation method, a trench type device isolation film using a trench technology has emerged in response to the trend of high integration and high speed of semiconductor devices. However, in the trench type isolation layer, an electric field is concentrated at the interface due to the sharp profile of the interface between the active region and the field region. As a result, the characteristics of the transistor are deteriorated.

In contrast, conventionally, the surface of the boundary surface is rounded oxidation so that the interface between the active region and the field region has a gentle profile. A method of forming a trench type isolation layer of a semiconductor device using the conventional rounding oxidation will be described with reference to FIGS. 1A to 1D.

First, as shown in FIG. 1A, a pad oxide film 2 and a nitride film 3 are sequentially formed on the semiconductor substrate 1, and a predetermined mask pattern 4 is formed on the nitride film 3. Then, by the etching process using the mask pattern 4, the nitride film 3 and the pad oxide film 2 are etched, and the substrate 1 is partially exposed.

As shown in FIG. 1B, the exposed substrate 1 is etched by a predetermined depth to form the trench 5. Then, the mask pattern 4 is removed by the known method, and the pad oxide film 2 is wet etched by a predetermined width.

As shown in FIG. 1C, after the surface of the vertical interface of the trench 5 is rounded and oxidized, the wetted portions are removed by wet etching. As a result, the surface of the vertical boundary surface of the trench 5 is rounded and smoothed. Then, an oxide film 6 is deposited on the entire surface of the substrate so as to be embedded in the trench 5, and then etched back so that the nitride film 3 is exposed, thereby making the surface flat.

As shown in FIG. 1D, the nitride film 3 and the pad oxide film 2 are removed, and a trench type device isolation film 7 is formed by a predetermined planarization process.

That is, as the surface of the boundary surface of the trench type isolation layer 7 has a gentle slope, the phenomenon in which the electric field is concentrated at the boundary between the active region and the field region is prevented.

However, there is a limit to completely rounding the boundary between the active area and the field area only by the above rounding oxidation process. Thus, after the ion implantation is performed on the sidewall of the trench using an extra mask, the rounding oxidation is performed. As a result, it is difficult to round the boundary completely.

Accordingly, the present invention has been made in view of the above-mentioned problems, and the device isolation film of the semiconductor device can improve the characteristics of the semiconductor device by more effectively rounding the surface of the interface between the active region and the field region of the trench type device isolation film. The purpose is to provide a formation method.

1A to 1D are cross-sectional views illustrating a method of forming a trench type isolation layer in a conventional semiconductor device.

2A to 2G are cross-sectional views illustrating a method of forming a trench type isolation layer in a semiconductor device according to an embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

11 semiconductor substrate 12 pad oxide film

13: nitride film 14: etch stop oxide film

15: mask pattern 16: spacer

17: trench 18: oxide film

19: device separator

A trench type isolation layer of a semiconductor device according to the present invention for achieving the above object is formed as follows. First, predetermined etch stop films for the pad oxide film, the nitride film, and the nitride film are sequentially formed on the semiconductor substrate, and the etch stop film and the nitride film are exposed so as to mask the active predetermined region of the substrate and to expose the substrate where the field region is to be formed. And the pad oxide film is patterned. Then, spacers are formed on both exposed sidewalls of the etch stop layer, the nitride layer, and the pad oxide layer, and the spacers and the exposed substrate are etched to form trenches of a predetermined depth. Thereafter, an insulating film is formed on the entire surface of the substrate to be filled in the trench, and the insulating film and the etch stop film are etched and planarized to expose the nitride film. Then, the nitride film and the pad oxide film are removed, the insulating film is removed so that the substrate is exposed, the substrate is planarized, and the trench type isolation film is completed.

According to the present invention described above, as the trench surface of the interface between the active region and the field region is etched in the form of a spacer, a trench type isolation layer having a smoothly rounded surface of the warp surface is formed.

(Example)

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

2A to 2G are cross-sectional views illustrating a method of forming a trench type isolation layer in a semiconductor device according to an embodiment of the present invention.

As shown in FIG. 2A, a pad oxide layer 12 is formed on the semiconductor substrate 11, and a nitride layer 13 is formed on the pad oxide layer 12 to act as an etch stop layer in a subsequent planarization process. . On the nitride film 13, a predetermined etching preventing oxide film 14 is then formed to protect the nitride film of the active region during the trench etching. Then, a mask pattern 15 is formed on the etch stop oxide film 14 to expose the region where the field region is to be formed.

As shown in FIG. 2B, the etching stop oxide film 14, the nitride film 13, and the pad oxide film 12 are etched by the etching process using the mask pattern 15 to form a field region. (11) is exposed.

As shown in Fig. 2C, the mask pattern 15 is removed by a known method, and wet-etched by a predetermined width of the pad oxide film 12 to remove it. Then, a polysilicon film or a nitride film is thickly deposited on the entire surface of the substrate so that the etching portion is embedded, and dry etching is performed. Accordingly, spacers 16 including polysilicon films or nitride films are formed on both sidewalls of the etched portion, that is, the exposed sidewalls of the pad oxide film 12, the nitride film 13, and the etch stop oxide film 14.

As shown in FIG. 2D, the spacers 16 and the substrate 11 exposed between the spacers 16 are simultaneously etched such that the interface surfaces of the active and field regions are etched along the topology of the spacers 16. The exposed substrate 11 is etched to a predetermined depth to form a gently rounded trench 17.

As shown in FIG. 2E, an oxide film 18 is deposited on the structure of FIG. 2D to be embedded in the trench 17. Then, as illustrated in FIG. 2F, the oxide film 18 and the etch stop oxide film 14 at the lower portion are etched back to expose the nitride film 13, and the surface is flat.

As shown in FIG. 2G, the nitride film 13 and the pad oxide film 12 are removed, and the substrate is planarized by the predetermined planarization process, and the trench type isolation film 19 is completed.

According to the above embodiment, as the trench is formed in the substrate using a spacer having a gentle topology, the surface of the vertical interface between the active area and the field area is smoothly rounded. Therefore, concentration of the electric field at the interface between the active region and the field region can be effectively prevented, so that the reliability of the semiconductor element is improved.

In addition, this invention is not limited to the said Example, It can variously deform and implement within the range which does not deviate from the technical summary of this invention.

Claims (6)

Sequentially forming predetermined etch stop films for the pad oxide film, the nitride film, and the nitride film on the semiconductor substrate; Masking the active predetermined region of the substrate and patterning the etch stop layer, the nitride layer, and the pad oxide layer to expose the substrate of the portion where the field region is to be formed; Forming spacers on both exposed sidewalls of the etch stop layer, the nitride layer, and the pad oxide layer; And, Forming a trench having a predetermined depth by etching the spacer and the exposed substrate. The method of claim 1, further comprising: forming an insulating film on the entire surface of the substrate to be embedded in the trench; Etching the insulating film and the etch stop film to expose the nitride film and to planarize them; Removing the nitride film and the pad oxide film; And, And removing the insulating film to expose the substrate to planarize the substrate. The method of claim 1, wherein forming the spacer Depositing a material film for spacers on the entire surface of the substrate; And etching the material film for spacers to expose the etch stop layer. 4. The method of claim 3, wherein the material film for spacers is a polysilicon film. The method of claim 3, wherein the material film for spacers is a nitride film. The method of claim 3, wherein the etch stop layer is an oxide layer.