KR19990058282A - Mode Coding Method and Apparatus for Use in Parallel Shape Coder - Google Patents

Abstract

The present invention relates to a method for encoding mode signals of a target block of M × N pixels having a binary value '0' or '255'. If the target block is not set to either "all_0" or "all_255", the target block is divided into an upper field and a lower field, where the upper field has all radix ( odd row, and the lower field contains all even rows of the target block to have M / 2 x N pixels. After encoding the upper field, the method encodes the lower field based on the upper field to generate modified lower field coding data and the modified lower mode.

Description

Mode coding method and apparatus for use in parallel shape coders

The present invention relates to a method and apparatus for encoding mode signals of a binary shape signal, and more particularly to a method for encoding mode signals using a correlation between two fields in a parallel shape coder. And to an apparatus.

In digital broadcast receiving systems such as video telephony, teleconferencing and high definition television systems, each video frame signal because the video line signal in the video frame signal includes a sequence of digital data referred to as pixel values. A large amount of digital data is required to define this. However, the available frequency bandwidth of a typical transmission channel is limited, which allows for the transfer of large amounts of digital data, especially to low bit rate video signal encoders used in video telephony and teleconferencing systems. However, it is essential to compress or reduce the volume of data using various data compression techniques.

In a low bit rate encoding system, one of such techniques for encoding video signals is a technique called object-oriented analysis-synthesis coding technique, where the input video image is divided into objects, the motion of each object, Three sets of parameters for defining the contour and pixel data are processed through different encoding channels.

One embodiment of such an object-oriented analysis-synthesis coding scheme is referred to as MPEG (Video Expert Group) 4 (MPEG-4), which provides low bit rate communication and interactive multimedia (e.g. gaming, interactive). Are designed to provide audio-video coding standards to allow content-based interactivity, improved coding efficiency and / or universal accessibility in applications such as TVs and surveillance equipment. .

According to MPEG-4, the input video image is divided into a number of video object planes (VOP's), which correspond to entities that are bitstreams that are accessible and manageable by the user. The VOP is referred to as an object and is represented by a bounding rectangle, the smallest of the rectangles whose width and height are integer multiples of the 16 pixels (macroblock size) that surrounds the object, so that the encoder processes the input video image in units of VOP. can do.

The VOP described in MPEG-4 includes shape information and color information consisting of luminance and chrominance data, wherein the shape information represented by binary shape signals is an alpha plane (an alpha plane). The alpha plane is divided into a number of binary alpha blocks (BABs) each having 16 x 16 binary pixels. Each binary pixel is classified as either a background pixel or an object pixel and is used to assign an object pixel within an object to have a different binary pixel value, for example, a value of 255, while a background located outside the object in the alpha plane. The pixel is used to be assigned to have a binary pixel value, for example a value of zero.

Each binary pixel in BAB is encoded using a conventional bitmap based shape coding method, such as a context-based arithmetic encoding (CAE) principle. For example, in intra mode, all binary pixels of BAB are encoded using intra CAE principle to generate intra coded BAB, but in intra CAE principle the content value for each binary pixel of BAB. Is computed using a predetermined number of binary pixel values, e.g., 10 surrounding each of said binary pixels in BAB. On the other hand, in inter mode, all binary pixels of the current BAB are encoded using the inter CAE principle to generate an inter-encoded BAB, where the content value of each binary pixel of the current BAB within the inter CAE principle Is a preset number of binary pixel values, e.g., four binary pixels surrounding each binary pixel in the current BAB and a preset number of binary values, e.g., five binary pixels in a boundary motion compensated BAB. (See MPEG-4 Video Verification Model Version 7.0, International Organization for Standardization, Coding of Moving Pictures And Associated Audio Information, ISO / IEC JTC1 / SC29 / WG11 MPEG97 / N1642, Bristol, April 1997, pp 28-30). ).

For example, if all binary pixels in a BAB are object pixels, a mode indicating that all binary pixels in a BAB are object pixels instead of encoding binary pixel values of the object pixels to generate encoded binary pixel values to be transmitted. It is desirable to encode the signal. By employing the above method, the coding efficiency can be increased by transmitting a corresponding encoding mode signal such as binary shape information for BAB.

Referring to Table 1, there are seven modes of binary alpha information of BAB according to the conventional mode coding principle, where the motion vector difference (MVD) for the shape of BAB is related to the motion vector (MV) for the shape and the shape. Is the difference between motion vector predictors (MVPs), and MVP is determined using conventional motion judgment principles (MPEG-4 Video Verfication Model Version 7.0, International Organization for Standardization, Coding of Moving Pictures And Associated Audio Information, ISO / IEC JTC / SC29 / WG11 MPEG97 / N1642, Bristol, April 1997, pp 20-23).

mode coding condition One MVD == 0 && no_update 2 MVD! = 0 && no_update 3 MVD == 0 && inter_CAE 4 MVD! = 0 && inter_CAE 5 intra_CAE 6 all_0 7 all_255

In Table 1, mode 1 indicates that the shape motion vector difference (MVP) for BAB is defined as 0 and all binary pixels in BAB do not need to be encoded, and mode 2 does not define MVD as 0 and in BAB Mode 3 indicates that all binary pixels do not need to be encoded, mode 3 indicates that MVD is defined as 0 and all binary pixels in BAB are encoded by the inter CAE principle, and mode 4 indicates that MVD is not defined as 0 and all binary in BAB The pixels indicate that they have been encoded by the inter CAE principle, mode 5 indicates that all binary pixels in the BAB have been encoded by the intra CAE principle, mode 6 indicates that all binary pixels in the BAB are defined as background pixels, and mode 7 indicates that in the BAB Indicates that all binary pixels are defined as object pixels.

Conventional binary shape encoding methods employing the conventional mode coding method described above are basic progressive coding methods. That is, in the conventional binary shape encoding method, the parallel coding technique performed by using the field-based motion estimation method is not used. Thus, even if the spatial and / or temporal correlation between the frames is smaller than the correlation of the fields, the parallel coding technique is not employed and the coding efficiency has not been increased.

It is therefore a first object of the present invention to provide a method and apparatus for efficiently coding mode signals in consideration of the correlation between two fields in a parallel shape coder.

It is a second object of the present invention to provide a method and apparatus for efficiently coding mode signals by changing the lower mode of the lower field based on the upper mode of the upper field.

According to the present invention, a method is provided for encoding mode signals of a target block of a binary shape signal, wherein the binary shape signal comprises a plurality of pictures, each picture comprising a first and a second binary. A plurality of blocks of M × N pixels having one of the values, and a target block representing M and N, each of which is a positive positive integer with one of the blocks of the current picture to be encoded, wherein the step includes:

(a) When the individual reference blocks have M × N pixels and all the pixels of the first and second reference blocks are first and second binary values, respectively, the threshold of an error of the target block for the first reference block is preset. Generating a first indication signal if it is not greater than, generating a second indication signal if the error of the target block for the second reference block is not greater than the predetermined threshold;

(b) in the case where the first and second display signals are not generated in step (a), the upper field of the target block includes all radix rows of the target block to have M / 2 x N pixels and a lower field. Dividing into lower fields including all even rows of the target block to have M / 2 x N pixels;

(c) coding the upper field to generate an upper mode and upper field coding data indicating a coding condition of the upper field coding data;

(d) coding the lower field based on the upper field encoding data to generate a lower mode and lower field coding data indicating a condition of the lower field coding data;

(e) changing the lower mode based on the upper mode to generate a changed lower mode;

(f) adding the upper mode to the modified lower mode to generate a mode.

The above objects and features of the present invention will become apparent from the following description of the preferred embodiments associated with the accompanying drawings.

1 is an apparatus diagram for coding modes of shape information based on a binary alpha block (BAB) according to a preferred embodiment of the present invention;

FIG. 2 is a detailed block diagram of the upper field coding circuit shown in FIG. 1;

3 is a detailed block diagram of the lower field coding circuit shown in FIG. 1;

4 illustrates a correlation between an upper field and a lower field in an I / P picture;

5A-5C show multiple candidate pixels for computing respective intra, inter and top context values.

<Description of the code | symbol about the principal part of drawing>

10: frame detector 20: frame divider

30: upper field coding unit 50: lower field coding unit

70: upper mode coding unit 83: lower mode generator

85: lower mode modulator 90: multiplexer

1, an apparatus for coding modes of shape information based on a binary alpg block (BAB) in an interlaced shape coder according to a preferred embodiment of the present invention is shown. , Wherein the shape information indicated in the binary shape signals is referred to as a picture, ie alpha plane. The alpha plane is divided into a number of binary alpha blocks, which are applied to the frame detection circuitry 10 as shape information, where a binary alpha block (BAB) is typically a positive integer in the range of 4-6. M and N have M × N binary pixels.

For simplicity of explanation, assume that the applied BAB is a predictive picture (P picture), which is a P picture predicted from the previous reference picture.

The frame detection circuit 10 checks whether the coding mode of each BAB is "all_0" or "all_255". In particular, the BAB is preferably divided into sixteen subblocks of 4 x 4 pixels. If all errors between all subblocks of BAB and all_0 subblock are less than or equal to the preset threshold, all binary pixels of BAB are changed to background pixels with pixel value '0', so that BAB is " all_0 " A display signal S ₀ = 'all_0' is provided to the multiplexer (MUX) 90, which is defined as, where all_0 subblocks are all subblocks having binary pixel values of '0'. If all errors between all subblocks of BAB and all_255 are less than or equal to the preset threshold, all binary pixels of BAB are changed to object pixels with pixel value '255', so that BAB is defined as "all_255". Display signal S ₀ = 'all_255' is provided to the MUX 90, where all_255 subblocks are all subblocks having a binary pixel value of '255'. If the coding mode of BAB is neither "all_0" or "all_255", the alpha plane of BAB is provided to frame divider 20.

Frame divider 20 divides each BAB with M × N binary pixels into top and bottom field BAB, where the top field BAB with M / 2 × N binary pixels includes all radix rows of each BAB. And the lower field BAB with M / 2 × N binary pixels includes all even rows of each BAB, and the frame divider 20 divides the upper and lower field BAB into upper and lower field coding circuits 30, To 50). If BAB has 16x16 pixels, it is preferable that both the top and bottom field BAB have 8x16 pixels.

2, a detailed block diagram of the upper field coding circuit 30 shown in FIG. 1 is shown, where the upper field BAB is provided to the field detection circuit 31 as the current field.

The field detection circuit 31 checks whether the coding mode of the current field is one of "all_0" or "all_255" based on the field unit. Initially, the current field containing 8x16 pixels is preferably divided into eight subblocks of 4x4 pixels. If necessary, the current field may be divided into 16 subblocks of 2 × 4 pixels.

If all errors between all subblocks of the current field and all_0 subblock are less than or equal to the preset threshold, all binary pixels of the current field are changed to background pixels with pixel value '0' so that the current field is A display signal S ₁ = 'all_0' indicating that it is defined as "all_0" is provided to the mode determining circuit 43, where all_0 subblocks are all subblocks having binary pixel values of '0'. If all errors between all subblocks of the current field and all_255 subblocks are less than or equal to the preset threshold, then all binary pixels of the current field are changed to object pixels with pixel value '255' so that the current field is An indication signal S ₁ = 'all_255' indicating that it is defined as "all_255" is provided to the mode MUX 90, where all_255 subblocks are all subblocks having binary pixel values of '255'. If the coding mode of the current field is one of " all_0 " or " all_255 &quot;, an indication signal S ₁ indicating that the current field is one of " all_0 " or " all_255 " If the coding mode of the current field is neither "all_0" nor "all_255", the current field is the field no_updata circuit 32, the ME & MC circuit 33, and the upper MUX 35 in the field reconstruction unit 44. Is provided.

The ME & MC circuit 33 determines a motion vector predictor (MVP) of the current field based on the candidate MVP retrieved from the memory 34 in the field reconstruction unit 44, and determines the motion vector of the current field. (MV) and motion vector difference (MVD), and perform motion compensation according to MV to generate a boundary motion compensated (boundary MC) field, and extract the MVD and boundary MC fields from the MVD coding circuit 36 and Provided to field no_update circuit 32, where MVD represents a displacement between MV and MVP, and the boundary MC field is motion compensated obtained by replacing the previous top / bottom field of each binary pixel corresponding to MVP by MV. Both the field (MC field) and the boundary of one pixel width around the MC field are shown.

The MVD coding circuit 36 generates an MVD signal S ₂ indicating whether or not the MVD is '0', and provides the MVD signal S ₂ to the mode determining circuit 43. If the MVD is not '0', the MVD coding circuit 36 encodes the MVD of the current field, and converts the encoded MVD data into an interbit arithmetic circuit (CAE unit) 45 in context_based arithmetic encoding unit (CAE unit) 45 via line L36. 40) and MUX 90.

In the meantime, the field no_update circuit 32 determines whether the current field is the same as the MC field, and provides the mode determining circuit 43 with a no_update signal S ₃ indicating whether the current field should be encoded. Initially, field no_update circuit 32 divides the current field into subblocks and the MC field into MC subblocks, with each MC subblock having 2 × 4 pixels or 4 × 4 pixels and having an MC field. Is obtained by removing the boundary of one pixel width around the boundary MC field. The field no_update circuit 32 determines whether each error between each subblock and the subblock corresponding to the MC subblock is less than or equal to a predetermined threshold. If all errors are less than or equal to the preset threshold, signal S ₃ preferably checks no_update, ie not_encoded, because the current field does not need to be encoded.

Conversely, if one or more errors are greater than a predetermined threshold, i.e., if a current field needs to be encoded as described below, field no_update circuit 32 performs an intra context_based arithmetic operation on the current field in CAE unit 45. The encoder (intra CAE) circuit 37 and the inter CAE circuit 39 are provided, and the boundary MC field is provided to the inter CAE circuit 39.

Intra CAE circuit 37 is retrieved from upper MUX 35 in reconstruction unit 44 via line L35 using conventional CAE principles to encode all binary pixels of the current field based on three adjacent reconstructed fields. Each adjacent reconstructed field adjacent to the current field in the upper left, upper or left direction includes 8 x 16 reconstructed pixels, respectively. In the conventional intra CAE principle, the intra content value of each binary pixel in the current field is computed using a predetermined number of binary pixel values, i.e., 10 candidate pixels surrounding each binary pixel, where the candidate pixels are All reconstructed pixels in three adjacent reconstructed fields and one or more intra-encoded pixels already encoded by the intra CAE principle are selected, wherein each binary pixel is assigned to the intra content value to be provided as an intra-encoded pixel for this. Encoded on the basis of Referring to FIG. 5A, ten candidate pixels C ₀ to C ₉ for the binary pixel shown in the hatching box (box0) are shown, where candidate pixel C ₁ is typically ahead of candidate C ₀ , where C ₂ is C It is encoded as precedes _1. intra encoded pixels are provided to the intra bit calculation circuit 38 and the selector 42 as the intra-CAE data.

The intra bit arithmetic block 38 calculates the number of bits required to represent intra CAE data and provides the comparator 41 with the number of bits of the intra CAE data.

On the other hand, the inter CAE circuit 39 encodes all the binary pixels of the current field based on the adjacent reconstructed field retrieved via the line L35, and encodes the boundary MC field using the inter CAE principle. In the inter CAE principle, the inter content value of each binary pixel in the current field is a predetermined number of binary pixel values, e.g., four reconstructed or inter-encoded fields and boundaries surrounding each binary pixel in the current field. It is computed using five boundary MC pixels in the MC field. Referring to FIG. 5B, nine candidate pixels C ₀ through C ₈ for binary pixels shown in hatched boxes in the inter CAE principle are shown, where each dotted box C ₄ through C ₈ represents a boundary in a boundary MC field. Represents an MC pixel and each candidate solid line box C ₀ to C ₃ represents a reconstructed pixel in a reconstructed field or an inter-encoded pixel in a current field. The boundary MC pixel C ₆ is the boundary MC field as if the binary pixel shown by the hatched box is the current field. Each binary pixel is encoded based on an inter content value to generate inter-encoded pixels for each binary pixel. All inter encoded pixels are provided to inter bit arithmetic circuit 40 and selector 42 as inter CAE data.

The inter bit arithmetic circuit 40 calculates the number of bits necessary to represent both inter CAE data and encoded MVD data, and provides this to the comparator 41.

The comparator 41 compares the number of bits of intra CAE data with the number of bits of inter CAE data and encoded MVD data. In the comparator 41, if the number of bits of the intra CAE data is smaller than the number of bits of the inter CAE data and the encoded MVD data, the intra / inter signal S ₄ representing the intra CAE data is selected by the selector 42 and the mode determining circuit 43. In other cases, an intra / inter signal S ₄ representing inter CAE data and encoded MVD data is provided to the selector 42 and the mode determination circuit 43.

In response to the intra / inter signal S ₄ , the selector 42 selects MVD data encoded with either intra CAE data or inter CAE data to provide the selected result to the MUX 95 via the line L42.

In the meantime, the mode determination circuit 43 generates an upper field based on the upper mode of the current field, that is, the signals S ₁ , S ₂ , S ₃ , S ₄ , and converts the upper mode into the upper field in the field reconstruction unit 440. To the MUX 35 and the upper mode coding circuit 70 shown in FIG.

In response to the upper mode output from the mode decision circuit 43, the upper MUX 35 reconstructs the current field to generate a reconstructed field. In other words, the upper MUX 35 replaces "all_0", "all_255", the current field itself or the MC field among the boundary MC BABs input from the MC & ME circuit 33 having the BAB reconstructed based on the upper mode. . The reconstructed field is provided from the upper MUX 35 to the memory 34, the intra CAE circuit 37 and the inter CAE circuit 39 via the line L35 to process the next field. The reconstructed field is also provided to the upper CAE circuit 66 and the lower MUX 55 shown in FIG. 3 via line L35 to process the lower field.

Referring back to FIG. 1, the top mode coding circuit 70 is based on conventional statistical coding techniques to provide the top mode signal to the bottom mode modular 85 and the MUX 90 in the bottom mode coding circuit 80. Generates the top mode signal for the current BAB. Referring to Table 2, typical seven upper mode signals T1 through T7 for upper field BAB in a P picture based on signals S ₁ , S ₂ , S ₃ , S ₄ are illustrated, where T1 is the shape of BAB. The motion vector difference MVD is defined as 0 and all binary pixels in the first upper mode and BAB need not be encoded, and the like.

top mode top mode signal MVD == 0 && No_Update (T1) 11110 MVD! = 0 && No_Update (T2) 110 MVD == 0 && inter_CAE (T3) 10 MVD == 0 && inter_CAE (T4) 0 intra_CAE (T5) 1110 all_0 (T6) 111110 all_255 (T7) 111111

Referring to Fig. 3, a detailed block diagram of the bottom field coding circuit shown in Fig. 1 is shown, and the bottom field BAB is provided to the field detection circuit 51 as another current field. Since the lower field coding circuit 50 is similar to the upper field coding circuit 30 except for the CAE coding unit 65 and the mode determining circuit 63, the lower field coding circuit is briefly described as follows.

In the field detection circuit 51, a display signal S ₆ indicating that the current field is defined as one of "all_0" and "all_255" is provided to the mode determining circuit 63. If the coding mode of the current field is neither "all_0" nor "all_22", the current field is sent to the field no_update circuit 52, the ME & MC circuit 53, and the lower MUX 55 in the field reconstruction unit 64. Is provided.

The ME & MC circuit 53 generates a motion vector predictor (MVP) of the current field based on the candidate MVP retrieved from the memory 64 in the field reconstruction unit 64 in accordance with conventional MPEG-4 principles, where each The candidate MVP of is preferably selected from the reconstructed lower fields in memory 34. Typically the upper field coding circuit 30 and the lower field coding circuit 50 have a memory 34. After computing the MV and MVD of the current field, the ME & MC circuit 53 provides the MVD and border MC fields to the MVD coding circuit 56 and the field no_update circuit 52, respectively.

In fact, the MVD coding circuit 56, which is the same as the MVD coding circuit 36, provides the mode determining circuit 63 with an MVD signal S ₆ indicating whether the MVD is '0', and if there is an MVD, encoding and encoding the MVD of the current field. The MVD data itself is provided to the inter-bit arithmetic circuit 60 and the MUX 90 via the line L56.

In the meantime, the field no_update circuit 52 provides the no_update signal S ₇ to the mode determination circuit 63, where the no_update signal S ₇ indicates whether the current field is the same as the MC field, but the current field should be encoded. . If the current field is to be encoded as described below, the field no_update circuit 52 provides the current field further to the upper CAE circuit 66, except that the similar manner described above with respect to the upper field coding circuit 30. Provide the current field and the boundary MC field to the CAE coding unit 65.

The CAE coding unit 65 is similar to the CAE unit 45 shown in FIG. 2, except that the CAE coding unit 65 further includes an upper CAE circuit 66, an upper mode selection circuit 67, and an upper bit operation circuit 68. Do. In other words, intra CAE circuit 57 is a predetermined number of binary pixel values surrounding each binary pixel, for example ten candidate pixels C ₀ through C, as shown in FIG. 5A in accordance with the intra CAE principle. An intra content value for each binary pixel of the current field is calculated using ₉ , and each binary pixel is encoded based on the content value to generate intra encoded data. In addition, the inter CAE circuit 59 may have a predetermined number of binary pixel values surrounding each of the binary pixels in the current field, for example, four reconstructed or inter-encoded pixels C, as shown in FIG. 5B. Compute the inter content value of each binary pixel in the current field using ₀ to C ₃ and five boundary MC pixels C ₄ to C ₈ in the boundary MC field, and encode each binary pixel based on this inter content value. To generate inter-encoded data.

In the meantime, the upper CAE circuit 66 encodes all the binary pixels of the current field based on the upper field retrieved and reconstructed through the line L35 using the upper CAE principle according to the present invention. Initially, for each of the binary pixels, i.e., the bottom pixel, a predetermined number, e.g., for each of the binary pixels, the six reconstructed top pixels before each division in the original BAB before splitting into upper / lower fields It is detected as upper field content pixels based on the position of the pixel. Referring to FIG. 5C, seven candidate pixels C ₀ through C ₆ are shown for binary pixels drawn in hatched boxes in the inter CAE principle, where each dotted box C ₁ through C ₆ represents an upper field in the reconstructed upper field. Represents the content pixel and the solid line box C ₀ represents the upper encoded pixel in the current field, ie, the lower field BAB. The upper field content pixel C ₅ is the upper field as if each of the binary pixels drawn by the hatched box is the lower field. After calculating the upper content value of each binary pixel in the current field using the seven binary pixel values of the candidate pixels as detected above, the upper CAE circuit 66 encodes each binary pixel based on the upper content value. Thereby generating an upper encoded pixel. All inter-encoded pixels are provided to the top mode selector circuit 670 and selector 62 as top CAE data.

The upper mode selection circuit 67 provides the no_update_top signal S ₈ to the mode determination circuit 63, where the no_update_top signal S ₈ is predicted based on the current field, i.e., the upper field content pixels in the lower field BAB. Indicates whether it is actually equal to the upper field BAB. If the lower field BAB is equal to the upper field BAB, the display signal S ₈ indicates "not coded as a predicted value", and otherwise, the display signal S ₈ is "coded with the upper field content", ie, the upper CAE data. Indicates. If the upper CAE data is different from the upper field BAB, the upper mode select circuit 67 provides the upper CAE data to the upper bit arithmetic circuit 68.

The intra bit arithmetic circuit 58, the inter bit arithmetic circuit 60, and the upper bit arithmetic circuit 68 are not only bits of intra CAE data, bits of inter CAE data but also bits of encoded MVD data and upper CAE data The numbers are respectively calculated and provided to the comparator 61 to compare them with each other.

From the comparator 61, an intra / inter / upper signal S ₉ is provided to the selector 620 and the mode decision circuit 63 indicating that the intra CAE data, the inter CAE data, and the upper CAE data have a small number of bits. In response to the inter / upper signal S ₉ , the selector 62 selects one of the intra CAE data, the inter CAE data, and the upper CAE data, and provides the selected result to the MUX 90 via the line L62.

In the meantime, the mode determination circuit 63 generates the field coding mode of the current field based on the signals S ₅ , S ₆ , S ₇ , S ₈ , and S ₉ , with the field coding modes being seven conventional ones in MPEG-4. In addition to the modes, a field coding mode is selected from nine field coding modes including two or more specific modes, that is, "coded with upper field content" and "not coded with prediction". 64 to lower MUX 55 and lower mode generator 83 in lower mode coding circuit 80 shown in FIG.

In response to the field coding mode output from the mode determination circuit 63, the lower MUX 55 reconstructs the current field, that is, the lower field BAB. In other words, in response to the field coding mode, in the lower MUX 55, the "all_0" field, the "all_255" field, the current field input from the field detection circuit 951, the MC input from the ME & MC circuit 53 One of the field and the upper field input from the upper MUX 35 is replaced with the reconstructed field for the current field. The reconstructed field is provided from the lower MUX 55 to the intra CAE circuit 57 and the inter CAE circuit 59 via the line L55 to process the next lower field data.

Referring back to FIG. 1, the lower mode generator 83 in the lower mode coding circuit 80 generates a lower mode signal for the current lower field based on conventional statistical coding techniques. The lower mode signal is applied to the lower mode modulator 85 to be modulated by the upper mode signal. The lower mode modulator 85 generates a modified lower mode signal that depends on the upper mode signal.

top mode T1 T2 T3 T4 T5 T6 T7 bottmmode B1 110 0 1110 11110 1111110 11110 11110 B2 0 110 11110 1110 111110 111110 111110 B3 1110 11110 0 110 11110 110 110 B4 11110 1110 110 0 1110 1110 1110 B5 1111110 1111110 1111110 1111110 0 10 10 B6 11111110 11111110 11111110 11111110 11111110 x 111111 B7 11111111 11111111 11111111 11111111 11111111 111111 x B8 10 10 10 10 10 x xx B9 111110 111110 111110 111110 1110 0 0

Referring to Table 3, 59 modified lower mode signals are illustrated for the lower field modified by the seven mode signals, where i is 1 to 7 where Bi is the lower field, as Ti is the upper field, and , B8 and B9 represent "coded with upper field content" and "not coded with predicted value", respectively. In the sixth upper mode T6, since "all_0" for the frame BAB has already been checked in the frame detection circuit 10, there is no sixth lower mode B6, i.e., "all_0" in the lower mode.

Referring back to FIG. 1, the MUX 90 multiplies the display signal S ₀ , the upper mode signal, the lower mode signal, and the upper encoded data to the lower encoded data and provides it to a transmitter for transmission (not shown).

Referring to FIG. 4, the correlation between the top field and the bottom field in an I / P picture is shown in accordance with the present invention, wherein the I picture is encoded without considering any other reference picture and the P picture is a previous one. It is predicted from the reference picture. For an I picture, the lower field can be encoded by either the intra coding principle or the upper coding principle shown by dashed lines, while the upper field is encoded only by the intra coding principle. In contrast, for a P picture, the lower field may be encoded by one of the intra coding principle, the inter coding principle shown by the solid line, and the upper coding principle shown by the dashed line, while the upper field may be encoded by the intra coding principle or the solid line. It can be encoded by one of the illustrated inter coding principles.

While the invention has been described with respect to particular implementations, those skilled in the art will recognize that various changes and modifications can be made without departing from the spirit and scope of the invention as defined in the following appended claims.

Claims (14)

M and N are positive integers, each picture being a binary shape signal comprising a plurality of pictures divided into a number of blocks of M × N pixels having one of the first and second binary values A method for encoding mode signals of a target list representing one of blocks of a current picture to be encoded, wherein (a) When the individual reference blocks have M × N pixels and all the pixels of the first and second reference blocks are first and second binary values, respectively, the threshold of an error of the target block for the first reference block is preset. Generating a first indication signal if it is not greater than, generating a second indication signal if the error of the target block for the second reference block is not greater than the predetermined threshold; (b) if the first and second display signals are not generated in step (a), an upper field and M / including an all odd row of the target block such that the target block has M / 2 x N pixels; Dividing into lower fields including all even rows of the target block to have 2 x N pixels; (c) coding the upper field to generate an upper mode and upper field coding data indicating a coding condition of the upper field coding data; (d) coding the lower field based on the upper field encoding data to generate a lower mode and lower field coding data indicating a condition of the lower field coding data; (e) changing the lower mode based on the upper mode to generate a changed lower mode; (f) adding the upper mode to the modified lower mode to generate a mode Mode signal encoding method comprising a. The method of claim 1, wherein step (c) comprises: (c1) When the individual reference fields have M / 2 × N pixels and all the pixels of the first and second reference fields are first and second binary values, respectively, an error of the upper field with respect to the first reference field is obtained. Generating a first upper indication signal if greater than a predetermined threshold, and generating a second upper indication signal if an error of the upper field relative to the second reference field is not greater than a predetermined threshold. Wow, (c2) if the first and second upper indication signals have not been generated in step (c1), by motion estimation and compensation of the upper field based on one or more previous pictures of the current picture, the motion vector and the upper field Generating motion vector information comprising a motion compensated field comprising a field most similar to a; (c3) calculating a motion compensation error (MCE) between the upper field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; (c4) generating an upper MVD signal indicating whether the MVD is 0; (c5) encoding the MVD to generate MVD data when the MVD is not 0; (c6) setting an upper no_update signal indicating whether the MCE is smaller than the preset threshold; (c7) when the MCE is not less than the predetermined threshold, intra coded data generated by encoding pixels of the upper field based on preset pixels of the upper field and the motion compensated with the upper field. Generating inter coded data provided by encoding the pixels of the upper field based on current pixels included in a field; (c8) generating an intra / inter signal when one of the intra coded data or the inter coded data is selected; (c9) determining an upper mode based on the first / second upper indication signals, the upper MVD signal, the upper no_update signal and / or the intra / inter signal. Mode signal encoding method comprising a. The method of claim 2, wherein step (c8) comprises: (c81) calculating the number of bits of the intra coded data and the number of bits of the inter coded data; (c82) comparing the number of bits of the intra coded data and the number of bits of the inter coded data to select a small number of bits; (c83) in response to the small number of bits, generating the inter / intra signal indicating whether the number of bits of the intra coded data is less than the number of bits of the inter coded data; (c84) in response to the intra / inter signal, providing one of the intra coded data or the inter coded data as upper field coded data Mode signal encoding method comprising a. The method of claim 2, wherein step (d) (d1) When the individual reference fields have M / 2 x N pixels and all the pixels of the first and second reference fields are first and second binary values, respectively, an error of the lower field with respect to the first reference field is obtained. Generating a first lower indication signal if not greater than a predetermined threshold and generating a second lower indication signal if an error of the lower field for the second reference field is not greater than a predetermined threshold. Wow, (d2) if the first and second lower indication signals have not been generated in step (d1), by motion estimation and compensation of the lower field based on one or more previous pictures of the current picture, the motion vector and the lower field; Generating motion vector information comprising a motion compensated field having a most similar field for; (c3) calculating a motion compensation error (MCE) between the lower field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; (c4) generating a lower MVD signal indicating whether the MVD is 0; (c5) encoding the MVD to generate MVD data when the MVD is not 0; (c6) setting a lower no_update signal indicating whether the MCE is smaller than the preset threshold; (c7) when the MCE is not less than the preset threshold, intra coded data generated by encoding the pixels of the lower field based on preset pixels of the lower field and the motion compensated with the lower field. Generating inter coded data provided by encoding the pixels of the lower field based on current pixels included in a field; (c8) generating an intra / inter signal when one of the intra coded data or the inter coded data is selected; (c9) determining a lower mode based on the first / second lower display signals, the lower MVD signal, the lower no_update signal, and / or the intra / inter signal. Mode signal encoding method comprising a. The method of claim 4, wherein step (d8), (d81) calculating the number of bits of the intra coded data, the number of bits of the inter coded data and the number of bits of the upper coded data; (d81) comparing the number of bits of the intra coded data with the number of bits of the inter coded data and the number of bits of the upper coded data to select a minimum number of bits; (d83) generating, in response to the minimum number of bits, the intra / inter / upper signal indicating that the number of bits among the intra coded data, the inter coded data, and the upper coded data is minimum; (d84) in response to the intra / inter / top signal, generating one of the intra coded data, the inter coded data, and the top coded data as lower field coded data; Mode signal encoding method comprising a. The method of claim 4, wherein step (d) (d10) comparing the upper coded data of the lower field with the upper field to generate an upper associated signal indicating whether the upper coded data is actually identical to the upper field; (d11) changing the lower mode based on the “not coded with prediction” to generate a changed lower mode Mode signal encoding method comprising a. 5. The method according to claim 2 or 4, wherein the intra coded data is provided by an intra content based arithmetic encoding (CAE0 method and the inter coded data is provided by an inter CAE method. M and N are positive integers, each picture being a binary shape signal comprising a plurality of pictures divided into a number of blocks of M × N pixels having one of the first and second binary values An apparatus for encoding mode signals of a target list representing one of blocks of a current picture to be encoded, wherein When the individual reference blocks have M × N pixels and all the pixels of the first and second reference blocks are first and second binary values, respectively, the error of the target block for the first reference block is greater than a predetermined threshold. Frame detecting means for generating a first display signal if not, and for generating a second display signal if the error of the target block with respect to the second reference block is not greater than the preset threshold; A frame for dividing the target block into an upper field containing all radix rows of the target block to have M / 2 × N pixels and a lower field containing all even rows of the target block to have M / 2 × N pixels Dividers, An upper field coder for coding the upper field to generate an upper mode and upper field coding data indicating a coding condition of the upper field coding data; A lower field coder for coding a lower mode and lower field coding data indicating a coding condition of the lower field coding data, A lower mode modulator for changing the lower mode based on the upper mode to generate a changed lower mode; A multiplexer for adding the upper mode to the modified lower mode to generate a mode Mode signal encoding apparatus comprising a. The method of claim 8, wherein the upper field coder, The individual reference blocks have M / 2 x N pixels and when all the pixels of the first and second reference fields are the first and second binary values, respectively, the error of the upper field for the first reference field is preliminary. Means for generating a first upper indication signal if not greater than a predetermined threshold, and generating a second upper indication signal if an error of the upper field with respect to the second reference field is not greater than a predetermined threshold; , Means for generating motion vector information comprising a motion vector and a motion compensated field comprising a field most similar to the top field by motion estimation and compensating the top field based on one or more previous pictures of a current picture; Means for calculating a motion compensation error (MCE) between the upper field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; Means for generating an upper MVD signal indicating whether the MVD is zero; Means for encoding the MVD to generate MVD data when the MVD is not zero; Means for setting an upper no_update signal indicating whether the MCE is less than the predetermined threshold; The intra coded data generated by encoding the pixels of the upper field based on preset pixels of the upper field and the current field of the upper field based on current pixels included in the upper field and the motion compensated field. An intra / inter encoder for generating inter coded data provided by encoding the pixels; An intra / inter signal generator for generating an intra / inter signal when one of the intra coded data or the inter coded data is selected; Means for determining the upper mode based on the first / second upper indication signals, the upper MVD signal, the upper no_UPDATE signal and / or the intra / inter signal Mode signal encoding apparatus comprising a. The method of claim 9, wherein the intra / inter signal generator, Means for calculating the number of bits of said intra coded data and the number of bits of said inter coded data; Means for comparing the number of bits of the intra coded data and the number of bits of the inter coded data to select a small number of bits; Means for generating the intra / inter signal in response to the small number of bits indicating whether the number of bits of the intra coded data is less than the number of bits of the inter coded data; Means for providing one of the intra coded data or the inter coded data as top field coded data in response to the intra / inter signal Mode signal encoding apparatus comprising a. The method of claim 9, wherein the lower field coder, The individual reference blocks have M / 2 × N pixels and when all the pixels of the first and second reference fields are the first and second binary values, respectively, the error of the lower field for the first reference field is preliminary. Means for generating a first lower indication signal if it is not greater than a predetermined threshold, and generating a second lower indication signal if an error of the lower field for the second reference field is not greater than a preset threshold; , Means for generating motion vector information comprising a motion vector and a motion compensated field comprising a field most similar to the lower field by motion estimation and compensation of the lower field based on one or more previous pictures of a current picture; Means for calculating a motion compensation error (MCE) between the lower field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; Means for generating a lower MVD signal indicating whether the MVD is zero; Means for encoding the MVD to generate MVD data when the MVD is not zero; Means for setting a lower no_update signal indicating whether the MCE is less than the preset threshold; Intra-coded data generated by encoding the pixels of the lower field based on preset pixels of the lower field, the lower field and the current pixels included in the motion compensated field; An intra / inter / upper encoder for generating the upper coded data provided by encoding the pixels of the lower field based on inter-coded data provided by encoding the pixels and preset pixels included in the upper field; , An intra / inter / top signal generator for generating an intra / inter / top signal when one of the intra coded data, the inter coded data and the top coded data is selected; Means for determining the bottom mode based on the first and second bottom indication signals, the bottom MVD signal, the bottom no_update signal and / or the intra / inter / top signal. Mode signal encoding apparatus comprising a. The method of claim 11, wherein the intra / inter / upper signal generator, Means for calculating the number of bits of said intra coded data, the number of bits of said inter coded data and said top coded data; Means for comparing the number of bits of said intra coded data, the number of bits of said inter coded data and the number of bits of said top coded data to select a small number of bits; Means for generating the intra / inter / upper signal in response to the small number of bits indicating that the number of bits among the number of bits of the intra coded data, the inter coded data and the top coded data is minimal; Means for generating the intra coded data, the inter coded data, and the top coded data as lower field coded data in response to the intra / inter / top signal. Mode signal encoding apparatus comprising a. The method of claim 11, wherein the lower field coder, Means for comparing the upper coded data of the lower field with the upper field to generate an upper associated signal indicating whether the upper coded data is actually identical to the upper field; Means for changing the lower mode based on “not coded with prediction” to generate a changed lower mode Mode signal encoding apparatus further comprising. 12. The apparatus of claim 9 or 11, wherein the intra coded data is provided by an intra content based arithmetic encoding (CAE) method and the inter coded data is provided by an inter CAE method.