KR100283579B1 - Method and apparatus for coding mode signals in interlaced shape coding technique - Google Patents

Abstract

The present invention relates to a method for encoding mode signals of a target block of MxN pixels having a binary value of '0' or '255'. In the present invention, if the target block is not set to either " all_0 " or " all_255 ", the target block is divided into an upper field and a lower field, where the upper field includes all odd rows of the target block And the lower field is composed of M / 2xN pixel blocks including all even rows of the target block. Subsequently, the upper field is encoded, and the lower field coding data modified and the modified lower mode are generated by encoding the lower field based on the upper field.

Description

METHOD AND APPARATUS FOR CODING MODE SIGNALS IN INTERLACED SHAPE CODING TECHNIQUE BACKGROUND OF THE INVENTION [0001]

The present invention relates to a method and apparatus for encoding mode signals of a binary shape signal, and more particularly to a method and apparatus for encoding mode signals using a correlation between two fields in a moving shape coder. ≪ / RTI >

In digital broadcast receiving systems such as video telephony, teleconferencing and high definition television systems, because the video line signal in the video frame signal contains a sequence of digital data referred to as pixel values, each video frame signal A large amount of digital data is required. However, since the usable frequency bandwidth of a conventional transmission channel is limited, it allows a large amount of digital data to be transmitted, particularly to low bit rate video signal encoders used in video telephony and teleconferencing systems , It is necessary to compress or reduce the volume of data using various data compression techniques.

For low bit rate encoding systems, one such technique for encoding video signals is a technique referred to as object-oriented analysis-synthesis coding technique, wherein an input video image is divided into objects and the motion, The three sets of parameters for defining contour and pixel data are processed through different encoding channels.

One embodiment of such an object-oriented analysis-synthesis coding scheme is referred to as MPEG-4), which may be implemented as low bit rate communication, interactive multimedia (e.g., games, interactive TV, Video coding standards to allow content-based interactivity, improved coding efficiency, and / or universal accessibility in applications.

According to MPEG-4, an input video image is divided into a number of Video Object Planes (VOPs), which correspond to entities that are bitstreams that the user can access and manipulate. The VOP is referred to as an object, and its width and height are represented by bounding rectangles, which are the minimum size among rectangles that are integral multiples of 16 pixels (macro block size) surrounding the object. Therefore, the encoder processes the input video image in units of VOP can do.

The VOP described in MPEG-4 includes shape information and color information composed of luninace and chrominance data, in which the shape information represented by binary shape signals is represented by alpha plane alpha plane. The alpha plane is divided into a number of binary alpha blocks (BAB) each having 16x16 binary pixels. Each binary pixel is classified as one of a background pixel or object pixel and the object pixel in the object is used to be assigned to have a different binary pixel value, for example, a value of 255, while the background located outside the object in the alpha plane The pixel is used to be assigned to have a binary pixel value, for example, a value of zero.

Each binary pixel in the BAB is encoded using a conventional bitmap-based shape coding method, such as the principle of context-based arithmetic encoding (CAE). For example, in intra mode, all binary pixels of the BAB are encoded using the intra CAE principle, thereby generating the intra-coded BAB, and the content value for each binary pixel of the BAB in the intra CAE principle is A predetermined number of binary pixel values, for example, ten surrounding the respective binary pixels in the BAB. On the other hand, in the inter mode, all binary pixels of the current BAB are encoded using the inter-CAE principle to generate the inter-encoded BAB. Where the content value of each binary pixel of the current BAB in the inter-CAE principle is a predetermined number of binary pixel values, for example, four binary pixels surrounding each binary pixel in the current BAB and a predetermined number of binary values, (MPEG-4 Video Verification Model Version 7.0, International Organization for Standardization, Coding of Moving Pictures and Associated Audio Information, ISO / IEC JTC1 / SC29 / WG11 MPEG 97 / N1642, Bristol, April 1997, pp 28-30).

For example, if all of the binary pixels in the BAB are object pixels, instead of encoding the binary pixel values of the object pixels to generate encoded binary pixel values to be transmitted, a mode that notifies all binary pixels in the BAB to object pixels It is desirable to encode the signal. By employing the above-described method, it is possible to increase the coding efficiency by transmitting a corresponding encoding mode signal such as binary shape information for the BAB.

Referring to Table 1, there are seven modes for binary alpha information of a BAB according to a conventional mode coding principle, wherein a motion vector difference (MVD) with respect to the shape of the BAB includes a motion vector (MV) And the MVP is determined using a conventional motion estimation principle (MPEG-4 Video Verification Model Version 7.0, International Organization for Standardization, Coding of Moving Pictures and Associated Audio Information, ISO / IEC JTC / SC29 / WG11 MPEG97 / N1642, Bristol, April 1997, pp 20-23).

mode Coding condition One MVD == 0 && no_update 2 MVD! = 0 && no_update 3 MVD == 0 && inter_CAE 4 MVD! = 0 && inter_CAE 5 intra_CAE 6 all_0 7 all_255

In Table 1, Mode 1 indicates that the shape motion vector difference (MVP) for the BAB is defined as 0 and that all binary pixels in the BAB do not need to be encoded, and Mode 2 indicates that MVD is not defined as 0 and that all Mode 3 indicates that MVD is defined as 0 and that all binary pixels in the BAB have been encoded by the inter-CAE principle, mode 4 indicates that MVD is not defined as 0 and that all binary Mode 5 indicates that all binary pixels in the BAB have been encoded by the intra CAE principle, mode 6 indicates that all binary pixels in the BAB are defined as background pixels, and mode 7 indicates that all binary pixels in the BAB have been encoded by the intra CAE principle, All the binary pixels are defined as object pixels.

Conventional binary shape encoding methods employing the conventional mode coding method described above are basic progressive coding methods. That is, in the conventional binary shape encoding method, the motion-based coding technique using the field-based motion estimation method is not used. Thus, even if the spatial and / or temporal correlation between frames is smaller than the correlation of the fields, the transcoding technique is not employed and the coding efficiency is not increased.

Therefore, a fundamental object of the present invention is to provide a method and apparatus for efficiently coding mode signals considering the correlation between two fields in a moving shape coder.

It is another object of the present invention to provide a method and apparatus for efficiently coding mode signals by changing the lower mode of the lower field based on the upper mode of the upper field.

According to an aspect of the present invention, there is provided a method for decoding a plurality of pictures (pictures), each of which is divided into blocks of MxN (M and N are positive integers) pixels each having one of first and second binary values ) Comprising: (a) determining a target pixel value for a first M × N reference block having a first binary pixel value, the method comprising the steps of: (a) Generating a first indication signal when an error of the block is not greater than a predetermined threshold and determining whether an error of the target block with respect to a second MxN reference block having a second binary pixel value is greater than the predetermined threshold Generating a second display signal if not greater; (b) if the first and second display signals are not generated in the step (a), the target block is divided into an upper field and a lower field of each M / 2xN pixel including all odd rows and even rows Dividing into fields; (c) coding the top field to generate a top mode indicating coding conditions of the top field coding data and the top field coding data; (d) coding the lower field based on the upper field coding data to generate a lower mode indicating a condition of the lower field coding data and the lower field coding data; (e) changing the lower mode based on the upper mode to generate a modified lower mode; (f) generating the mode signal by adding the upper mode to the changed lower mode.

1 is a block diagram of an apparatus for coding modes of shape information based on a binary alpha block (BAB) according to a preferred embodiment of the present invention;

FIG. 2 is a detailed block diagram of the upper field coding circuit shown in FIG. 1,

FIG. 3 is a detailed block diagram of the lower field coding circuit shown in FIG. 1,

4 is a diagram showing a correlation between an upper field and a lower field in an I / P picture,

Figures 5A-5C illustrate a plurality of candidate pixels for computing respective intra, inter, and top context values.

Description of the Related Art

10: frame detector 20: frame divider

30: upper field coding circuit 50: lower field coding circuit

70: upper mode coding circuit 83: lower mode generator

85: Bottom mode modulator 90: Multiplexer

Referring to FIG. 1, there is shown an apparatus for coding modes of shape information based on a binary alpha block (BAB) in an interlaced shape coder according to a preferred embodiment of the present invention, Here, the shape information displayed in the binary shape signals is referred to as a picture, that is, an alpha plane. The alpha plane is divided into a plurality of binary alpha blocks, and the binary alpha blocks are applied to the frame detection circuit 10 as shape information. Where the binary alpha block BAB typically has M × N binary pixels of positive integers M and N in the range of 4 to 6.

To simplify the explanation, it is assumed that the applied BAB is a predictive picture (P picture) which is a P picture predicted from a previous reference picture.

The frame detection circuit 10 checks whether the coding mode of each BAB is " all_0 " or " all_255 ". In particular, the BAB is preferably divided into 16 subblocks of 4x4 pixels. If all errors between all subblocks of the BAB and all_0 subblocks are less than or equal to a predetermined threshold, then all binary pixels of the BAB are changed to background pixels having a pixel value of '0' as there is provided a display signal S ₀ = 'all_0' the multiplexer (MUX) (90) indicating that the definition in which all_0 subblock is a subblock having all of the binary pixel values of "0". If all errors between all subblocks of the BAB and all_255 are less than or equal to a predetermined threshold, all binary pixels of the BAB are changed to object pixels having the pixel value of '255', and the BAB is defined as " all_255 " A display signal S ₀ = 'all_255' is provided to the MUX 90, where all_255 subblocks are all subblocks having binary pixel values of '255'. If the coding mode of the BAB is neither " all_0 " nor " all_255 ", the alpha plane of the BAB is provided to the frame divider 20.

The frame divider 20 divides each BAB having MxN binary pixels into upper and lower field BABs. Where the upper field BAB with M / 2xN binary pixels contains all odd rows of each BAB and the lower field BAB with M / 2xN binary pixels contains all odd rows of each BAB. The frame divider 20 provides the upper and lower fields BAB to the upper and lower field coding circuits 30 and 50, respectively. If the BAB has 16x16 pixels, then the upper and lower fields BAB preferably all have 8x16 pixels.

FIG. 2 is a detailed block diagram of the upper field coding circuit 30 shown in FIG. 1, wherein the upper field BAB provided from the frame divider 20 is shown as being provided to the field detection circuit 31 as the current field.

The field detection circuit 31 checks whether the coding mode of the current field is one of " all_0 " or " all_255 " Initially, the current field containing 8x16 pixels is preferably divided into 8 subblocks of 4x4 pixels. If necessary, the current field may be divided into 16 sub-blocks of 2x4 pixels.

If all errors between all subblocks in the current field and all_0 subblocks are less than or equal to a predetermined threshold, then all binary pixels in the current field are changed to background pixels with pixel value '0' there is provided a "all_0" indication signal S ₁ = 'all_0' the mode determination circuit 43 to indicate that as defined, wherein the all_0 subblock is a subblock having all of the binary pixel values of "0". If all errors between all subblocks in the current field and all_255 subblocks are less than or equal to a predetermined threshold, all binary pixels in the current field are changed to object pixels having pixel value '255' A display signal S ₁ = 'all_255' indicating that it is defined as "all_255" is provided to the mode MUX 90, where all_255 subblocks are all subblocks having a binary pixel value of '255'. If one of the coding mode of the current field, "all_0" or "all_255", is provided in the current field is "all_0" or "all_255" is one of the indication of the signal S ₁ is the mode decision circuit 43. If the coding mode of the current field is neither " all_0 " nor " all_255 ", the current field is the field no_updata circuit 32 and the upper MUX 35 in the ME & MC circuit 33 and the field reconstruction unit 44, .

The ME & MC circuit 33 determines a motion vector predictor (MVP) of the current field based on the candidate MVP retrieved from the memory 34 in the field reconstruction unit 44, (MV) and a motion vector difference (MVD), performs motion compensation according to MV to generate a boundary motion compensated (boundary MC) field, and performs MVD and boundary MC fields to MVD coding circuit 36 and To the field no_update circuit 32, where MVD represents the displacement between MV and MVP, and the boundary MC field is the motion compensated field obtained by replacing the previous upper / lower field of each binary pixel corresponding to MVP by MV Field (MC field) and the border of one pixel width around the MC field.

The MVD coding circuit 36 generates the MVD signal S ₂ indicating whether or not the MVD is '0', and provides the MVD signal S ₂ to the mode decision circuit 43. If the MVD is not '0', the MVD coding circuit 36 encodes the MVD of the current field and the MVD data encoded by the MVD coding circuit 36 is sent to the content-based arithmetic encoding unit (CAE unit) To the inter bit operation circuit 40 and the MUX 90 in the memory 45.

During this time, the field no_update circuit 32 determines whether the current field is equal to the MC field, and provides a no_update signal S ₃ to the mode decision circuit 43 indicating whether the current field should be encoded. Initially, the field no_update circuit 32 divides the current field into subblocks and the MC field into MC subblocks. At this time, each MC sub-block has 2 × 4 pixels or 4 × 4 pixels, and the MC field is obtained by removing the border of one pixel width around the boundary MC field. The field no_update circuit 32 determines whether the error between each sub-block and each sub-block corresponding to the MC sub-block is less than or equal to a predetermined threshold. If all errors are less than or equal to the predetermined threshold, the signal S ₃ preferably identifies no_update, i.e. not_encoded, since the current field does not need to be encoded.

On the other hand, if one or more errors are greater than a predetermined threshold, i. E. That it is necessary for the current field to be encoded as described below, the field no_update circuit 32 sends the current field to the intra CAE circuit (37) and an inter-CAE circuit (39), and provides a boundary MC field to the inter-CAE circuit (39).

The intra CAE circuit 37 is retrieved from the upper MUX 35 in the reconstruction unit 44 via line L35 using the normal CAE principle to encode all binary pixels of the current field based on three adjacent reconstructed fields , Each adjacent reconstructed field adjacent to the current field in the upper left, upper, or left direction contains 8 x 16 reconstructed pixels each. In a typical intra CAE principle, the intra content value of each binary pixel in the current field is computed using a predetermined number of binary pixel values, i. E. Ten candidate pixels surrounding the respective binary pixel, Selected from among all the reconstructed pixels in the three adjacent reconstructed fields and one or more intra-encoding pixels already encoded by the intra-CAE principle, wherein each of the binary pixels has an intra-content value to be provided as an intra- Quot; Referring to Figure 5a, hatched needle box is shown 10 number of candidate pixels C ₀ to C ₉ for the binary pixels shown in the (box), where the candidate pixels C ₁ is typically ahead of the candidate C _0, C ₂ is Lt; RTI ID = 0.0 > C _{1. &} Lt; / RTI > The intra-encoded pixels are provided to the intra-bit operation circuit 38 and the selector 42 as intra CAE data.

The intra-bit operation block 38 calculates the number of bits required to represent the intra CAE data, and provides the number of bits of the intra CAE data to the comparator 41.

On the other hand, the inter-CAE circuit 39 encodes all the binary pixels of the current field based on the adjacent reconstructed field retrieved through the line L35 and encodes the boundary MC field using the inter-CAE principle. For the inter-CAE principle, the inter-content value of each binary pixel in the current field is a predetermined number of binary pixel values, e.g., four reconstructed or inter-encoded fields surrounding the respective binary pixel in the current field, Is calculated using five boundary MC pixels in the MC field. Referring to FIG. 5B, there are shown nine candidate pixels C ₀ through C ₈ for the binary pixels shown in the hatched box in the inter-CAE principle, where each dotted box C ₄ through C ₈ represents the boundary MC pixels and each candidate solid line box C ₀ to C ₃ represents the reconstructed pixel in the reconstructed field or the inter-encoded pixel in the current field. The boundary MC pixel C ₆ is the boundary MC field is the same as the binary field shown by the hatched box is the current field. Each binary pixel is encoded based on the inter-content value to generate inter-encoded pixels for each binary pixel. All inter-encoded pixels are provided to inter-bit operation circuit 40 and selector 42 as inter-CAE data.

The inter bit operation circuit 40 calculates the number of bits required to represent both the inter-CAE data and the encoded MVD data, and provides the calculated number of bits to the comparator 41. [

The comparator 41 compares the number of bits of the intra CAE data with the number of bits of the inter-CAE data and the encoded MVD data. In the comparator 41, if the number of bits of the intra CAE data is smaller than the number of bits of the interleaved CAE data and the encoded MVD data, the intra / inter signal S ₄ representing the intra CAE data is output to the selector 42 and the mode determination circuit 43, And the intra / inter signal S ₄ representing the inter-CAE data and the encoded MVD data is provided to the selector 42 and the mode determination circuit 43 in the other cases.

In response to the intra / inter signal S ₄ , the selector 42 provides the selected result to the MUX 95 via the line L 42 by selecting the encoded MVD data and either the intra CAE data or the inter-CAE data.

During this time, the mode decision circuit 43 generates an upper field based on the upper mode of the current field, i.e., the signals S ₁ , S ₂ , S ₃ and S ₄ , The upper MUX 35 and the upper mode coding circuit 70 shown in Fig.

In response to the upper mode output from the mode decision circuit 43, the upper MUX 35 reconstructs the current field and generates a reconstructed field. More specifically, the upper MUX 35 replaces "all_0", "all_255", the current field itself or the MC field of the boundary MC BAB input from the MC & ME circuit 33 having the reconstructed BAB based on the upper mode do. The reconstructed field is provided to the memory 34, the intra CAE circuit 37 and the inter-CAE circuit 39 from the upper MUX 35 via line L35 to process the next field. The reconstructed field is also provided to upper CAE circuit 66 and lower MUX 55 shown in FIG. 3 via line L35 to process the lower field.

Referring again to Figure 1, the upper mode coding circuit 70 is configured to generate a lower mode signal based on conventional statistical coding techniques to provide the upper mode signal to the lower mode modulator 85 and the MUX 90 in the lower mode coding circuit 80 And generates a top mode signal for the current BAB. Referring to the following Table 2, typical seven top mode signals T1 to T7 for the top field BAB in a P picture based on signals S ₁ , S ₂ , S ₃ , S ₄ are illustrated. Where T1 is defined as a shape motion vector difference (MVD) for BAB = 0 and that all the binary pixels in the first top mode and BAB need not be encoded, and so on.

Top mode Top mode signal MVD == 0 && No_Update (T1) 11110 MVD! = 0 && No_Update (T2) 110 MVD == 0 && inter_CAE (T3) 10 MVD == 0 && inter_CAE (T4) 0 intra_CAE (T5) 1110 all_0 (T6) 111110 all_255 (T7) 111111

FIG. 3 is a detailed block diagram of the lower field coding circuit shown in FIG. 1, in which the lower field BAB is shown as being provided to the field detection circuit 51 as another current field. Since the lower field coding circuit 50 is similar to the upper field coding circuit 30 except for the CAE coding unit 65 and the mode decision circuit 63, the lower field coding circuit is briefly described as follows.

In the field detection circuit 51, the indication signal S ₆ indicating that the current field is defined as either "all_0" and "all_255" is provided to the mode decision circuit 63. If the coding mode of the current field is neither " all_0 " nor " all_22 ", the current field is supplied to the field no_update circuit 52, the ME & MC circuit 53 and the lower MUX 55 in the field reconstruction unit 64 / RTI >

The ME & MC circuit 53 generates a motion vector predictor (MVP) of the current field based on the candidate MVP retrieved from the memory 64 in the field reconstruction unit 64 in accordance with conventional MPEG-4 principles, The candidate MVP of the memory 34 is preferably selected from the reconstructed subfields in the memory 34. [ Typically, the upper field coding circuit 30 and the lower field coding circuit 50 have a memory 34. After computing the MV and MVD of the current field, the ME & MC circuit 53 provides the MVD and boundary MC fields to the MVD coding circuit 56 and the field no_update circuit 52, respectively.

In fact, the same MVD coding circuit 56 and the MVD coding circuit 36 and MVD to provide the MVD signal S ₆ indicating whether this is a '0' to the mode determination circuit 63 and, if the MVD encodes the MVD of the current field encoding MVD data itself to the inter bit operation circuit 60 and MUX 90 via line L56.

During this time, the field no_update circuit 52 provides the no_update signal S ₇ to the mode decision circuit 63. The no_update signal S ₇ are to be encoded because of the current field, the current field to indicate whether the same magazine and the MC field. If the current field is to be encoded as described below, the field no_update circuitry 52 is similar to the upper field coding circuit 30 described above for the upper field coding circuit 30, except that it further provides the current field to the upper CAE circuitry 66 To the CAE coding unit 65 with the current field and boundary MC field.

The CAE coding unit 65 is similar to the CAE unit 45 shown in FIG. 2 except that it further includes an upper CAE circuit 66 and an upper mode selection circuit 67 and an upper bit operation circuit 68 Do. In other words, the intra CAE circuit 57 generates a predetermined number of binary pixel values surrounding each binary pixel, for example, 10 candidate pixels C ₀ through C ₉ to calculate intra-content values for each binary pixel in the current field, and encode each binary pixel based on the content value to generate intra-encoded data. In addition, the inter-CAE circuit 59 may include a predetermined number of binary pixel values surrounding each binary pixel in the current field, for example, four reconstructed or inter-encoded pixels C ₀ to C ₃ and the five boundary MC pixels C ₄ to C ₈ in the boundary MC field are used to calculate the inter-contents value of each binary pixel in the current field, and based on the calculated inter- To generate inter-encoded data.

During this time, the upper CAE circuit 66 encodes all the binary pixels of the current field based on the reconstructed top field, retrieved via line L35 using the upper CAE principle according to the present invention. Initially, for each binary pixel, i. E. The bottom pixel, a predetermined number, e. G., Of each of the six reconstructed top pixels for each binary pixel in the original BAB before being divided into the top / And are detected as upper field content pixels based on the position of the binary pixel. Referring to FIG. 5C, there are shown seven candidate pixels C ₀ through C ₆ for a binary pixel drawn with a hatched box in the inter-CAE principle, where each dotted box C ₁ through C ₆ is a top field in the reconstructed top field And the solid line box C ₀ represents the upper encoded pixel in the current field, i.e., the lower field BAB. The upper field content pixel C ₅ is the upper field is the same as each binary pixel drawn with the hatched box is the lower field. The upper CAE circuit 66 computes the upper content value of each binary pixel in the current field using the seven binary pixel values of the detected candidate pixels and then encodes each binary pixel based on the upper content value To generate an upper encoded pixel for it. All inter-encoded pixels are provided to the upper mode selection circuit 670 and the selector 62 as upper CAE data.

Top mode selection circuit 67 provides no_update_top signal S ₈ to the mode determination circuit 63. Here, the no_update_top signal S ₈ indicates whether the predicted upper CAE is actually equal to the upper field BAB based on the current field, i.e., the upper field content pixels in the lower field BAB. "Being coded with top field information" bottom field BAB is when the same as the top field BAB, the display signal S ₈ represents "not coded with the predictive value", in the case other than the indication signal S _8, that is, the top CAE data . When the upper CAE data is different from the upper field BAB, the upper mode selection circuit 67 provides the upper CAE data to the upper bit operation circuit 68.

The intra-bit arithmetic circuit 58, the inter-bit arithmetic circuit 60 and the upper bit arithmetic circuit 68 calculate the number of bits for the intra CAE data, the number of bits of the inter-CAE data, And provides them to the comparator 61 for comparison with each other.

An intra / inter / upper signal S ₉ is provided from the comparator 61 to the selector 620 and the mode decision circuit 63 indicating that the intra CAE data, the inter-CAE data and the upper CAE data have a small number of bits. in response to the inter / top signal S _9, the selector 62 selects one of the intra CAE data, the inter CAE data and the top CAE data, and provides the selected result to the MUX (90) through a line L62.

During this time, the mode determination circuit 63 generates a field coding mode of the current field based on the signals S ₅ , S ₆ , S ₇ , S ₈ , and S ₉ , Modes, i.e., nine field coding modes, including " coded as top field content " and " not coded as predicted value, " to select the field coding mode from the reconstruction unit 64 to the lower mode generator 83 in the lower MUX 55 and the lower mode coding circuit 80 shown in Fig.

In response to the field coding mode output from the mode determination circuit 63, the lower MUX 55 reconstructs the current field, i.e., the lower field BAB. In other words, in response to the field coding mode, in the lower MUX 55, the "all_0" field, the "all_255" field, the current field input from the field detection circuit 51, One of the MC field and the upper field input from the upper MUX 35 is replaced with a reconstructed field for the current field. The reconstructed field is provided to the intra-CAE circuit 57 and inter-CAE circuit 59 from the lower MUX 55 via line L55 to process the next subfield data.

Referring back to FIG. 1, the lower mode generator 83 in the lower mode coding circuit 80 generates a lower mode signal for the current lower field based on a conventional statistical coding technique. The lower mode signal is applied to the lower mode modulator 85 so as to be changed by the upper mode signal. The lower mode modulator 85 generates a modified lower mode signal that depends on the upper mode signal.

Top mode T1 T2 T3 T4 T5 T6 T7 Bottom mode B1 110 0 1110 11110 1111110 11110 11110 B2 0 110 11110 1110 111110 111110 111110 B3 1110 11110 0 110 11110 110 110 B4 11110 1110 110 0 1110 1110 1110 B5 1111110 1111110 1111110 1111110 0 10 10 B6 11111110 11111110 11111110 11111110 11111110 x 111111 B7 11111111 11111111 11111111 11111111 11111111 111111 x B8 10 10 10 10 10 x xx B9 111110 111110 111110 111110 1110 0 0

Referring to Table 3, a typical 59 modified lower mode signals are illustrated for the lower field modified by the 7 mode signals, where i is 1 to 7, Bi is the lower field and Ti is the upper field , B8 and B9 denote " coded as top field content " and " not coded as predicted value ", respectively. In the sixth top mode T6, since "all_0" for the frame BAB has already been examined in the frame detection circuit 10, there is no sixth bottom mode B6, namely "all_0" in the bottom mode.

Referring again to FIG. 1, the MUX 90 multiplexes the display signal S ₀ , the upper mode signal, the lower mode signal, and the upper encoded data into the lower encoded data and provides the multiplexed data to a transmission transmitter (not shown).

Referring to FIG. 4, a correlation between an upper field and a lower field in an I / P picture is shown according to the present invention, wherein an I picture is encoded without considering any other reference picture, Is predicted from the reference picture. For an I picture, the bottom field may be encoded by one of the intra coding principles or top coding principles shown in dashed lines, while the top field is encoded only by the intra coding principle. Conversely, for a P picture, the bottom field may be encoded by one of the intra coding principles, the inter coding principle shown by the solid line and the top coding principle shown by the dashed line, while the top field may be encoded by the intra coding principle May be encoded by one of the illustrated inter coding principles.

Although the present invention has been described in terms of specific embodiments, it will be understood by those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention as defined in the following claims.

Claims (14)

A target representing one of the blocks of the binary shape signal comprising a plurality of pictures, wherein M and N are positive integers that are excellent and are divided into blocks of MxN pixels each having one of the first and second binary values A method for encoding mode signals of a block, (a) generating a first display signal when an error of the target block for a first M × N reference block having a first binary pixel value is not greater than a predetermined threshold value, and generating a second binary pixel value Generating a second indication signal when the error of the target block for a second MxN reference block having a second threshold value is not greater than the predetermined threshold; (b) if the first and second display signals are not generated in the step (a), the target block is divided into an upper field and a lower field of each M / 2xN pixel including all odd rows and even rows Dividing into fields; (c) coding the top field to generate a top mode indicating top field coded data and coding conditions of the top field coding data; (d) coding the lower field based on the upper field coded data to generate a lower mode indicating lower field coded data and a condition of the lower field coded data; (e) changing the lower mode based on the upper mode to generate a modified lower mode; (f) adding the upper mode to the modified lower mode to generate a mode signal. 2. The method of claim 1, wherein step (c) (c1) generating a first upper display signal when an error of the upper field for a first M / 2xN reference field having a first binary pixel value is greater than a predetermined threshold, Generating a second upper display signal when an error in the upper field for a second M / 2xN reference field having a pixel value is not greater than a predetermined threshold; (c2) when the first and second upper display signals are not generated in the step (c1), motion estimation and compensation of the upper field based on one or more previous pictures of the current picture, Generating motion vector information including a motion compensated field having a field most similar to the motion compensated field; (c3) calculating a motion compensation error (MCE) between the top field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; (c4) generating an upper MVD signal indicating whether the MVD is 0; (c5) encoding the MVD to generate MVD data if the MVD is not zero; (c6) setting a top no_update signal indicating whether the MCE is less than the predetermined threshold; (c7) if the MCE is not less than the predetermined threshold, intra coded data generated by encoding the pixels of the upper field based on predetermined pixels of the upper field, Providing inter-coded data generated by encoding the pixels of the top field based on current pixels contained within the field; (c8) generating an intra / inter signal when one of the intra-coded data or the inter-coded data is selected; (c9) determining an upper mode based on the first / second upper display signals, the upper MVD signal, the upper no_update signal, and / or the intra / inter signal. Signal encoding method. 3. The method of claim 2, wherein step (c8) (c81) calculating the number of bits of the intra-coded data and the number of bits of the inter-coded data; (c82) comparing the number of bits of the intra-coded data with the number of bits of the inter-coded data to select a small number of bits; (c83) generating the inter / intra signal indicating whether the number of bits of the intra-coded data is smaller than the number of bits of the inter-coded data, in response to the selected small number of bits; (c84) in response to the intra / inter signal, providing one of the intra coded data or the inter-coded data as upper field coded data. 3. The method of claim 2, wherein step (d) (d1) generating a first lower display signal when the error of the lower field for a first M / 2xN reference field having a first binary pixel value is not greater than a predetermined threshold, Generating a second lower display signal if an error of the lower field for a second M / 2xN reference field having a binary pixel value is not greater than a predetermined threshold; (d2) when the first and second lower display signals are not generated in the step (d1), motion estimation and compensation of the lower field based on one or more previous pictures of the current picture, Generating motion vector information comprising a motion compensated field having a field most similar to a field; (d3) calculating a motion compensation error (MCE) between the bottom field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; (d4) generating a bottom MVD signal indicating whether the MVD is zero; (d5) generating MVD data by encoding the MVD when the MVD is not 0; (d6) setting a lower no_update signal indicating whether the MCE is less than the predetermined threshold; (d7) the intra-coded data generated by encoding the pixels of the lower field based on the predetermined pixels of the lower field and the intra-coded data generated by encoding the lower field and the motion compensation Providing inter-coded data generated by encoding the pixels of the bottom field based on current pixels contained within a field; (d8) generating an intra / inter signal when one of the intra-coded data or the inter-coded data is selected; (d9) determining the lower mode based on the first / second lower display signals, the lower MVD signal, the lower no_update signal and / or the intra / inter signal Mode signal encoding method. 5. The method of claim 4, wherein step (d8) (d81) calculating the number of bits of the intra-coded data, the number of bits of the inter-coded data, and the number of bits of the upper field coded data; (d82) selecting a minimum number of bits by comparing the number of bits of the intra-coded data, the number of bits of the inter-coded data, and the number of bits of the top field coded data; (d83) generating the intra / inter / upper signal indicating that the number of bits of the intra-coded data, the inter-coded data, and the top field coded data is minimum in response to the minimum number of bits; (d84) generating one of the intra-coded data, the inter-coded data, and the upper field coded data as lower field coded data in response to the intra / inter / upper signal / RTI > 5. The method of claim 4, wherein step (d) (d10) comparing the upper field coded data of the lower field with the upper field to generate an upper correlated signal indicating whether the upper field coded data is the same as the upper field; (d11) modifying the lower mode based on the upper correlation type signal to generate the modified lower mode. The method according to claim 2 or 4, Wherein the intra-coded data is provided by an intra-content based arithmetic encoding (CAE0 method and the inter-coded data is provided by an inter-CAE method. A target representing one of the blocks of the binary shape signal comprising a plurality of pictures, wherein M and N are positive integers that are excellent and are divided into blocks of MxN pixels each having one of the first and second binary values 8. An apparatus for encoding mode signals of a block, Generating a first display signal when an error of the target block with respect to a first M x N reference block having a first binary pixel value is not greater than a predetermined threshold value and generating a second display signal with a second binary pixel value, Frame detecting means for generating a second display signal when an error of the target block with respect to an M × N reference block of 2 is not larger than the preset threshold value; A frame divider for dividing the target block into an upper field and a lower field of each M / 2 占 N pixel including all odd rows and even rows; An upper field coder for coding the upper field to generate an upper mode indicating upper field coding data and a coding condition of the upper field coding data; A lower field coder for coding the lower field based on the upper field coding data to generate lower modes indicating lower field coding data and coding conditions of the lower field coding data; A lower mode modulator for modifying the lower mode based on the upper mode to generate a modified lower mode; And a multiplexer for generating the mode by adding the upper mode to the modified lower mode. 9. The apparatus of claim 8, wherein the upper field coder comprises: Generating a first upper display signal when an error of the upper field for a first M / 2xN reference field having a first binary pixel value is not greater than a predetermined threshold, Means for generating a second upper indication signal when the error of the upper field for a second M / 2 占 기준 reference field having a second threshold value is not greater than a predetermined threshold; Means for generating motion vector information comprising a motion compensated field having a motion vector and a field most similar to the top field by motion estimation and compensation of the top field based on one or more previous pictures of the current picture; Means for calculating a motion compensation error (MCE) between the top field and the most similar field and a motion vector difference (MVD) between the motion vector and its predictor; Means for generating an upper MVD signal indicating whether the MVD is 0; Means for generating MVD data by encoding the MVD if the MVD is not zero; Means for setting an upper no_update signal indicating whether the MCE is less than the predetermined threshold; Coded data generated by encoding the pixels of the upper field based on predetermined pixels of the upper field and the intra-coded data generated by encoding the pixels of the upper field based on the current pixels included in the upper field and the motion- An intra / inter encoder for providing the inter-coded data generated by the encoding of the intra / inter encoder; An intra / inter signal generator for generating an intra / inter signal when one of the intra-coded data or the inter-coded data is selected; And means for determining the upper mode based on the first / second upper display signals, the upper MVD signal, the upper no_UPDATE signal, and / or the intra / inter signal. . 10. The apparatus of claim 9, wherein the intra / inter signal generator comprises: Means for calculating the number of bits of the intra-coded data and the number of bits of the inter-coded data; Means for comparing the number of bits of the intra-coded data with the number of bits of the inter-coded data to select a small number of bits; Means for generating, in response to the small number of bits, the intra / inter signal indicating whether the number of bits of the intra-coded data is less than the number of bits of the inter-coded data; And means for providing, in response to the intra / inter signal, one of the intra coded data or the inter-coded data as upper field coded data. 10. The apparatus of claim 9, wherein the lower field coder comprises: Generating a first lower display signal when an error of the lower field for a first M / 2xN reference field having a first binary pixel value is not greater than a predetermined threshold, and generating a second lower pixel value Means for generating a second lower indication signal if the error of the lower field for a second M / 2xN reference field having a second threshold value is not greater than a predetermined threshold; Means for generating motion vector information comprising a motion compensated field having a motion vector and a field most similar to the bottom field by motion estimation and compensation of the bottom field based on one or more previous pictures of the current picture; Means for calculating a motion compensation error (MCE) between said bottom field and said most similar field and a motion vector difference (MVD) between said motion vector and its predictor; Means for generating a bottom MVD signal indicating whether the MVD is zero; Means for generating MVD data by encoding the MVD if the MVD is not zero; Means for setting a lower no_update signal indicating whether the MCE is less than the predetermined threshold; Coded data generated by encoding the pixels of the bottom field based on predetermined pixels of the bottom field, intra-coded data generated by encoding the pixels of the bottom field based on the bottom field and current pixels included in the motion- An intra / inter / upper encoder for generating the upper field coded data generated by encoding the pixels of the lower field based on the inter-coded data generated by the encoding of the upper field and the predetermined pixels contained in the upper field; An intra / inter / upper signal generator for generating an intra / inter / upper signal when one of the intra-coded data, the inter-coded data and the upper field coded data is selected; Means for determining the lower mode based on the first and second lower display signals, the lower MVD signal, the lower no_update signal and / or the intra / inter / upper signal, Device. 12. The apparatus of claim 11, wherein the intra / inter / Means for calculating the number of bits of the intra-coded data, the inter-coded data and the top field coded data; Means for comparing the number of bits of the intra-coded data, the inter-coded data and the top field coded data to select a small number of bits; Means for generating, in response to the small number of bits, the intra / inter / upper signal indicating that the number of bits in the number of bits of the intra coded data, the inter coded data and the top field coded data is a minimum; And means for generating, in response to the intra / inter / upper signal, the intra coded data, the inter-coded data and the top field coded data as lower field coded data. . 12. The apparatus of claim 11, wherein the lower field coder comprises: Means for comparing an upper field coded data of the lower field with the upper field to generate an upper correlated signal indicating whether the upper field coded data is the same as the upper field; And means for generating the modified lower mode by modifying the lower mode based on the upper correlated signal. 12. A method according to claim 9 or 11, characterized in that the intra-coded data is provided by an intra-content based arithmetic encoding (CAE) method and the inter-coded data is provided by an inter- Device.

Images