KR19990035422A - Main controller of optical subscriber system - Google Patents

Abstract

The present invention provides a main control device for an optical subscriber system (FLC-C) to control a system in an optical subscriber system (FLC-C) for connecting various subscribers to a network and to enable connection with a LAN. Unit).

The apparatus of the present invention is an optical subscriber system that enables a variety of subscribers to be distributed and connected to an ATM switching network, a public telephone network, and a dedicated network by using an optical cable. The IPC cell and the OAM cell are connected to a cell bus in an ATM manner. ATM matching unit 250 for connecting; A serial communication unit 240 providing a serial data connection function for IPC and command input / output; A memory unit 210 for storing a control program and storing various data; LAN matching unit 220 connected to the network management system for transmitting and receiving management information for the optical subscriber system; A digital communication unit 230 for providing a data communication channel associated with a digital channel connection (DCC); And a processor unit 200 that operates according to a program stored in the memory unit to control the units through the common buses 208 and 209, and processes IPC cells and OAM cells transmitted and received through the ATM matching unit 250. Include.

Therefore, the main controller according to the present invention has the effect of enabling the efficient operation and maintenance of the optical subscriber system by controlling and managing various boards of the optical subscriber system.

Description

A main control unit of fiber loop carrier-curb system

The present invention relates to an optical subscriber system (FLC-C: Fiber Loop Carrier-Curb) for connecting various subscribers to a network. In particular, the present invention relates to an optical subscriber system that controls a system and enables a connection with a LAN. A main control unit of a subscriber system.

In general, the subscriber network connects the subscriber terminal installed in the subscriber's home to the communication network. For general residential subscribers, which are mostly analog voice services, two- or four-wire copper cable (TP) is used as the subscriber network. I use it.

On the other hand, as the information society progresses today, as broadband data and video communication services increase, it is necessary to establish a broadband subscriber network. As such, subscriber access technology for constructing broadband subscriber network includes ADSL and HDSL using existing wired line, optical subscriber network technology (FTTH or FTTC) using optical cable, and wireless subscriber network to provide subscriber line wirelessly ( Wireless Local Loop (WLL). Here, the optical subscriber network using the optical cable is widely known as a FLC (Fibre Loop Carrier) system in which a DLC (Digital Loop Carrier) system is developed. The FLC system is an FLC-based system using ATM technology and an optical network unit (ONU). The trend is gradually developing to C.

In implementing such an optical subscriber system, a subscriber system requires a supervisory control function to facilitate maintenance and operation, minimize installation space, and reduce power consumption, and requires a connection with a computer network (NMS). That is, since the optical subscriber system must provide voice and DS0, DS1N, DS1E, DS3 level data services and interwork with network management devices, the optical subscriber system requires a main controller to control and operate the entire system.

Accordingly, the present invention has been proposed to meet the above necessity, and an object thereof is to provide a main controller for controlling each board and operating and maintaining the system in the optical subscriber system.

In order to achieve the above object, the apparatus of the present invention, in the optical subscriber system that allows a variety of subscribers located in a distributed manner to be connected to the ATM switching network, public telephone network, and private network by using the optical cable, connected to the cell bus IPC An ATM matching unit for connecting the cell and the OAM cell in an ATM manner; A serial communication unit providing a serial data connection function for IPC and command input / output; A memory unit for storing a control program and storing various data; LAN matching unit connected to the network management system for transmitting and receiving management information for the optical subscriber system; A digital communication unit for providing a data communication channel associated with a digital channel connection (DCC); And a processor unit operating according to a program stored in the memory unit to control the units through a common bus and to process IPC cells and OAM cells transmitted and received through the ATM matching unit.

1 is an overall configuration diagram of an optical subscriber system to which the present invention is applied,

2 is a block diagram showing the main controller of the optical subscriber system according to the present invention.

* Explanation of symbols for main parts of the drawings

200: processor unit 210: memory unit

220: LAN matching unit 230: digital communication matching unit

240: serial communication unit 250: ATM matching unit

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall configuration diagram of an optical subscriber system to which the present invention is applied, and FIG. 2 is a detailed block diagram showing a main controller according to the present invention.

The optical subscriber system to which the present invention is applied is installed in a telephone company and connected to a host digital terminal (HDT) 100 connected to an ATM network, a PSTN network, a dedicated line network, and distributed to subscribers and connected to the host digital terminal and an optical cable. It consists of a plurality of optical network units (ONU) 120. The host digital terminal (HDT: 100) is connected to the STM-4 (about 622Mbps) or STM-1 (about 155Mbps) level through the ATM switching network 12 and the ATM transmitting / receiving unit (ATRU). It is connected at the DS1 (about 1.544 Mbps) or DS1E (about 2.048 Mbps) level through the DS1E unit, and is connected at the DS1 level through the dedicated network 16 and the DS1L unit.

In FIG. 1, the HDT 100 includes two ATRUs 101-1 and 1-1-2, eight DS1Es 102-1 to 102-8, one DS1L 103, and eight OTRUs ( 104-1 to 104-8 and one main controller (MCU) 110 are connected through the cell bus 105, and one OTRU 104-1 to 104-8 includes two ONUs ( 121 to 121-16 may be connected respectively. Such a configuration is only one embodiment, and the technical idea of the present invention can be applied to various embodiments.

Referring to FIG. 1, a main control unit (MCU) 110 according to the present invention is mounted on a host digital terminal (HDT) 100 of FLC, which is a demand-intensive optical subscriber system, and manages, controls, and manages an optical network unit (ONU). Communication function with 120) and network management system (NMS). The main control unit (MCU) 110 uses IPC cells for all units connected to the HDT 100 to provision each unit and port, detect and recover a unit of failure, monitor performance, transfer, loopback, etc. It performs system management and control function of, and performs communication function with ONU 120 using OAM cell. In addition, the main control unit (MCU) 110 not only communicates with a network management system (NMS) (not shown) via a LAN, but also various commands related to overall maintenance of the HDT and ONU using the serial communication port (RS232C port) installed at the front. It provides overall management and control functions such as inputting a key and outputting system status. The main controller (MCU) 110 is a digital channel access (DCC) channel processing function of 192 Kbps extracted from the ATRUs 101-1 and 101-2, and an X.25 connection port and a parallel telemetry by the V.24 interface. It provides alarm transmission / reception with serial error management device (FADP) and serial telemetry.

As shown in FIG. 2, the main controller of the present invention for performing such a function includes: an ATM matching unit 250 connected to a cell bus (105 in FIG. 1) to connect an IPC cell and an OAM cell in an ATM manner; A serial communication unit 240 that provides a serial data connection function for IPC and command input / output; A memory unit 210 for storing a control program and storing various data; LAN matching unit 220 connected to the network management system for transmitting and receiving management information for the optical subscriber system; A digital communication unit 230 for providing a data communication channel associated with a digital channel connection (DCC); And a processor unit 200 that operates according to a program stored in the memory unit to control the units through the common buses 208 and 209, and processes IPC cells and OAM cells transmitted and received through the ATM matching unit.

The memory unit 210 includes a ROM (ROM: 211), a nonvolatile RAM (NVRAM: 212), a DRAM 213, a DRAM control and arbiter 214, and the LAN matching unit 220 includes a LAN controller ( 222, the Ethernet interface 221, and the digital communication unit 230 includes a LAP-B controller 231 and a LAP-D controller 232 and 233. Serial communication unit 240 is composed of MFP1 (241), MFP2 (242), MFP3 (243), ATM matching unit 250 is a cell bus switch (CUBIT: 251, 252), receiving FIFO (255, 256), conversion table ram ( TRAM: 253, 254). The processor unit 200 includes an address decoder 207 and a register unit 205 together with a clock generator, a reset circuit, and the like, which are not shown, and the operation state of the main controller is configured to be displayed on the display unit 206. These parts are connected to the processor 200 via the data bus 208 and the address bus 209, and the buffers 201, 202, 203, and 204 are used as necessary to increase driving capability and to transmit data. Buffer

Referring to FIG. 2, the entire data flow in the main controller can be largely divided into LAN data, IPC & OAM data, OS, DCC channel, and serial data.

LAN data input to the Ethernet interface 221 through the Ethernet port is processed on the Ethernet interface 220, the function of the physical layer, LAN controller 22, after the function of the media access control (MAC) layer is processed LAN controller By the DMA function at 22, it is stored in the DRAM 213 in the memory section. In this way, after the LAN data input through the LAN is stored in the DRAM 213, the LAN controller 222 issues an interrupt to the processor unit 200. Accordingly, the processor unit 200 may execute the DRAM 213. Read and process the relevant LAN data stored in. On the other hand, when transmitting the LAN data, the processor unit 200 writes the LAN data to be transmitted to the DRAM 213 and sets a specific register of the LAN controller 222. When a specific register is set, the LAN controller 222 reads LAN data stored in the DRAM 213 and transmits the LAN data to the LAN through the Ethernet interface 221.

IPC & OAM data is transmitted and received to the cell bus side through the ATM matching unit 250, the data input from the cell bus is written to the receiving FIFO (255, 256) through the cell bus switches (251, 252), the cell bus switches (251, 252) If the processor 200 is notified of the interrupt, the processor 200 reads data stored in the reception FIFOs 251 and 252. In cell transmission, the processor 200 directly transfers data to be transmitted to the cell bus switches 251 and 252 through the common buses 208 and 209, and the cell bus switches 251 and 252 attach the routing headers using the conversion tables 253 and 254. Send it to the cell bus. At this time, the cell bus switches 251 and 252 have a user port and a processor port. The transmission of the IPC cell and the transmission of the OAM cell are performed through the processor port, and the reception of the IPC cell is performed by receiving FIFOs 255 and 256 connected to the user port. The reception of the OAM cell may be performed using either a user port or a processor port.

In addition, IPC data can be transmitted through a serial communication path different from the cell bus side. This serial communication path is used to communicate with other units in case of communication with a clock (CLK) unit and when an error occurs on the cell bus. Used for communication. The OS and DCC channel data are processed through the DMA functions of the LAP-B controller 231 and the LAP-D controllers 232 and 233, and the serial data have RS232C and TBOS interface functions.

In FIG. 2, the ROM 210 of the memory unit 210 is implemented with eight 512K-byte flash memories, which can be expanded up to 4 Mbytes, and the DRAM 213 is composed of four 32-Mbyte DRAM modules, up to 128 Mbytes. The scalable, nonvolatile RAM (NVRAM) 212 is implemented with a capacity of 32K bytes to store various important data even when the power is turned off.

The address decoder 207 generates a chip select signal using the upper 16 bits of the address. The DRAM control and arbiter 214 includes an address mux unit, a lath / cas signal generation unit, a refresh control unit, a DTACK generation unit, and the like, which control the DRAM 213. Here, the DRAM 213 is shared by the processor unit 200, the LAN controller 222, the LAP-B controller 231, the LAP-D controller 232, and the LAP-D controller 233, so that they are DRAMs. A function for arbitrating when accessing 213 is implemented in the DRAM control and arbiter 214. Priorities in DRAM arbitration are allocated in order of processor 200, LAN controller 222, LAPB controller 231, LAPD controller 232, and LAPD controller 233.

As described above, the IPC channel may use a cell bus or a serial communication path, and the clock unit CLK UNIT may use only serial IPC. The IPC cell input from the cell bus is stored in the FIFOs 255 and 256 through the cell bus switches 251 and 252. When the IPC cell is transmitted to the processor 200 through an interrupt, the processor reads and processes the cells in the FIFOs 255 and 256. do. On the other hand, when the IPC cell is to be transmitted from the main controller 110 to another unit, when the IPC cell is inserted through the processor port in the cell bus switches 251 and 252, the cell bus switches 251 and 252 transmit through the cell bus. Serial communication is transmitted at a TTL level of 384 Kbps.

The OAM cell input from the ONU (120 in FIG. 1) is loaded on the cell bus via the OTRU, which is received by the cell bus switch (CUBIT) of the main controller. The cell bus switch (CUBIT: 251, 252) has a processor port and a user port. The OAM cell received from the ONU can be extracted from any of these ports. When extracted to a user port, the flow of the OAM cell is processed in the same path as that of the IPC cell, and the cell extracted to the processor port is processed by the processor 200 by an interrupt generated by the cell bus switch (CUBIT: 251, 252). Done. When the OAM cell is transmitted from the main control unit (MCU) in the ONU direction, it passes through the same processing path as that of the IPC cell.

The serial communication unit 240 provides an RS232C interface for board debugging, an RS422 interface for TBOS, and an RS232C interface for connection with an OS. These interfaces are provided through line drivers and MFPs. In the MFP, a watch dog timer (WDT) can be configured using an internal timer.

The LAN matching unit 220 stores the received data input through the Ethernet port in the DRAM 213 and transmits the transmission data stored in the DRAM to the LAN side. At this time, the Ethernet interface 221 processes the functions of the physical layer, and the LAN controller 222 processes the MAC layer. Ethernet interface can support AUI, 10BASE-T.

Looking at the interface with the cell bus in the ATM matching unit 250, 32-bit data transmission is possible using the cell bus switches (CUBIT: 251, 252), and provides a UTOPIA interface toward the physical layer. The CellBus switch (CUBIT: 251, 252) transmits a 53-byte ATM cell to be transmitted to another module by attaching a 12-byte routing header to the cellbus according to the contents of the conversion table 253,254. Separate the general user cell, OAM & IPC cell, and loopback cell from the cell. If it is a general user cell (HDT-ONU communication cell), the cell bus switches 251 and 252 remove the 12-byte routing header from the received user cell and write it to the FIFO (255, 256) through the user port. It extracts to the port and if it is a loopback cell, it loops back inside the cell bus switch (CUBIT: 251,252) and transmits it to the cell bus.

The LAP-B controller 231 is implemented using the MC68605 in the embodiment of the present invention, processes LAP-B data of X.25, and transmits and receives frames using the DMA function. The LAP-D controllers 232 and 233 are implemented using the MC68606, which can handle up to 8192 logical links and has a DMA function. The player section DCC channel data is processed using the DRAM 213 shared with the processor.

The register unit 205 is composed of two status registers and three control registers, and the display unit 206 is composed of light emitting diodes (LEDs) to display various states.

Looking at the address map of each building block in the embodiment of the present invention described above, it is allocated as shown in Table 1 below.

Address range Device name Remarks 0000 0000 ~ 07FF FFFF Local ram 128 MB 0800 0000 ~ 08FF FFFF NVRAM 32 KB 0900 0000 ~ 093F FFFF ROM 4 MB 0950 0000-0950 FFFF MFP1 Serial 0951 0000 ~ 0951 FFFF MFP2 TBOS 0952 0000 ~ 0952 FFFF MFP3 IPC 0953 0000 ~ 0953 FFFF LAN 32 bit 0954 0000 ~ 0954 FFFF Status register 1 32 bit 0955 0000 ~ 0955 FFFF Status register 2 32 bit 0956 0000 ~ 0956 FFFF Control register 1 32 bit 0957 0000 ~ 0957 FFFF Control register 2 32 bit 0958 0000 ~ 0958 FFFF Control register 3 32 bit 0960 0000 ~ 0960 FFFF LAP-D1 16 bit 0961 0000 ~ 0961 FFFF LAP-D2 16 bit 0962 0000 ~ 0962 FFFF LAP-B 16 bit 0963 0000 ~ 0963 FFFF Watchdog

0970 0000 ~ 0970 FFFF CUBIT1 8 bit 0971 0000 ~ 0971 FFFF FIFO1 8 bit 0972 0000 ~ 0972 FFFF CUBIT2 8 bit 0973 0000 ~ 0973 FFFF FIFO2 8 bit

Referring to Table 1 above, it can be seen that 32-bit status register 1 is assigned to addresses 0954 0000 to 0954 FFFF, and 32-bit control register 1 is assigned to addresses 0956 0000 to 0956 FFFF.

In the exemplary embodiment of the present invention, the status register 1 indicates power failure of boards mounted in the system and mounting and dismounting of each board, and the control register 1 is for controlling the LED of the display unit 206, and the FAIL, Emergency alarm (CR), main alarm (MJ), general alarm (MN), loopback (LB), ONU alarm (RMT), alarm history display (HST), audible alarm block (ACO), etc. are displayed.

As described above, the main controller according to the present invention has the effect of enabling the efficient operation and maintenance of the optical subscriber system by controlling and managing various boards of the optical subscriber system.

Claims (4)

In the optical subscriber system that allows a wide variety of subscribers to be distributed to the ATM switching network, public telephone network, and private network by using the optical cable, An ATM matching unit 250 connected to the cell bus and connecting the IPC cell and the OAM cell in an ATM manner; A serial communication unit 240 providing a serial data connection function for IPC and command input / output; A memory unit 210 for storing a control program and storing various data; LAN matching unit 220 connected to the network management system for transmitting and receiving management information for the optical subscriber system; A digital communication unit 230 for providing a data communication channel associated with a digital channel connection (DCC); And A processor unit 200 which operates according to a program stored in the memory unit to control the units through the common buses 208 and 209, and processes IPC cells and OAM cells transmitted and received through the ATM matching unit 250. The main controller of the optical subscriber system. According to claim 1, wherein the ATM matching unit 250 is a conversion table for storing routing-related information 253, FIFO (255, 256) for storing the received data, the processor unit 200 is provided when transmitting Attach the routing header obtained by accessing the conversion tables 253 and 254 to the cell, transmit the routing header to the cell bus side, analyze the routing header of the receiving cell, store the cell in the FIFOs 255 and 256, The main controller of the optical subscriber system, characterized in that consisting of the cell bus switch (251,252) to inform the (200). According to claim 1, The LAN matching unit 220 is the Ethernet interface 221 to perform the function of the physical layer for the Ethernet interface, and the data received through the Ethernet interface 221 the memory unit 210 And a LAN controller 222 configured to transmit the data stored in the memory unit to the LAN through the Ethernet interface 221 when transmission is requested from the processor unit 200. Main controller. According to claim 1, wherein the digital communication unit 230 is composed of a LAP-B controller 231 for transmitting data of the X.25 method and LAP-D controller (232,233) for digital channel access (DCC) data Key controller of the optical subscriber system characterized in that.