KR19990033160A - Method of manufacturing transistor of semiconductor device - Google Patents

Abstract

The present invention relates to a method for manufacturing a transistor of a semiconductor device.

In a conventional transistor fabrication process, a field oxide film formation process using an element isolation mask is first performed, followed by a transistor fabrication process. However, when the transistor is manufactured by such a process, it is difficult to control the critical dimension of the polysilicon film used as the gate because it becomes vulnerable to punch through due to the high integration of semiconductor devices, and the junction used as the source and drain. Is formed shallowly, in particular, separation between elements, latchup, and the like have been a problem.

According to the present invention for solving the above-described problems, the isolation oxide film in the trench serves as a device isolation layer by forming a trench in the semiconductor substrate, forming an isolation oxide film in the trench, and forming a source and a drain.

Description

Method of manufacturing transistor of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a transistor of a semiconductor device which can be applied to a highly integrated device by combining device isolation and transistor formation processes.

As semiconductor devices become more integrated, device separators for separating devices must be implemented in a small area.

A transistor manufacturing method of a conventional semiconductor device will be described with reference to FIG. 1.

The field oxide film 12 is formed in the selected region on the semiconductor substrate 11 by an oxidation process using an element isolation mask. The gate oxide layer 13 and the polysilicon layer 14 are sequentially stacked on the entire structure, and then selected regions of the polysilicon layer 14 and the gate oxide layer 13 are sequentially etched to form a gate structure. A low concentration impurity ion implantation region 15 is formed on the exposed semiconductor substrate 11 by a low concentration impurity ion implantation process for adjusting the threshold voltage. After depositing an oxide layer on the entire structure, spacers are etched to form spacers 16 on the sidewalls of the gate structure. The source / drain regions 17 are formed by performing a high concentration impurity ion implantation process.

When the transistor is manufactured by such a process, the semiconductor chip becomes vulnerable to punch through due to the high integration of semiconductor devices, so it is difficult to control the critical dimension of the polysilicon film used as the gate, and the junction portion used as the source and drain is difficult. It is formed shallowly, and in particular, isolation between devices, latch up, and the like are problematic.

Accordingly, an object of the present invention is to provide a method for manufacturing a transistor of a semiconductor device capable of solving the above-mentioned problems without using an element isolation mask.

According to an aspect of the present invention, a plurality of trenches are formed by etching selected regions of a semiconductor substrate, and then an isolation oxide layer is formed on the entire structure including the trenches, and the isolation oxide layer is formed on the trench. Forming a polysilicon film for the channel on the entire structure after remaining, and forming a gate oxide film over the polysilicon film for the channel between neighboring trenches of the plurality of trenches, and then performing polysilicon film deposition and patterning A gate electrode is formed on the gate oxide layer, and the inside of the trenches is embedded with a polysilicon layer, and a source / drain ion implantation process is performed on the embedded polysilicon layer to surround a source and a drain. And forming a region.

1 is a cross-sectional view of a device for explaining a transistor manufacturing method of a conventional semiconductor device.

2 (a) to 2 (e) are cross-sectional views of a device for explaining a transistor manufacturing method of a semiconductor device according to the present invention.

<Description of the symbols for the main parts of the drawings>

11 and 21: semiconductor substrate 12: field oxide film

13, 25: gate oxide film 14, 27: polysilicon film

15: low concentration impurity ion implantation region

16: spacer 17, 28: source / drain region

22: trench 23: oxide film for isolation

24 polysilicon film for channel 26 insulating film

The present invention will be described in detail with reference to the accompanying drawings.

2 (a) to 2 (d) are cross-sectional views of devices for explaining a transistor manufacturing method of a semiconductor device according to the present invention.

FIG. 2A is a cross-sectional view of a state in which a trench 22 is formed by etching a selected region of the semiconductor substrate 21 and then an isolation oxide film 23 is formed on the entire structure including the trench 22 by a CVD method. to be.

Referring to FIG. 2B, the semiconductor oxide film 21 is exposed by removing the isolation oxide film 23 by the CMP process and leaving the isolation oxide film 23 formed in the trench 22. A polysilicon film 24 for the channel is formed. A threshold voltage controlled ion implantation process is performed on the channel polysilicon film 24.

2C is a cross-sectional view of a state in which the gate oxide film 25 and the insulating film 26 are sequentially formed on the semiconductor substrate 21 between the trenches 22 in which the polysilicon film 24 for channels is formed. In this process, the gate oxide film 25 and the insulating film 26 are sequentially formed, and the insulating film 26 formed between the trenches 22 is left and the remaining portions are removed. The gate oxide film 25 is removed by performing an etching process using the remaining insulating film 26 as a mask.

FIG. 2D is a cross-sectional view of the polysilicon layer 27 formed on the entire structure after the insulating layer 26 is removed.

Referring to FIG. 2E, a gate is formed by sequentially removing the polysilicon layer 27 and the channel polysilicon layer 24 by an etching process using a gate mask to expose the semiconductor substrate 21. The polysilicon film 27 is embedded in the trench 22. An ion implantation process is then performed to form source / drain regions 28 in the trenches.

As described above, according to the present invention, since the source / drain is self-separated by an oxide film without the need for a separate device separation process, highly integrated devices can be reliably separated to prevent punch through, latch-up, and the like. effects, short channel effects, and the like can be eliminated. In addition, it is possible to manufacture a small transistor due to the high integration, it is not necessary to use a device isolation mask.

Claims (1)

Forming a plurality of trenches by etching selected regions of the semiconductor substrate, and forming an isolation oxide layer over the entire structure including the trenches; Leaving the isolation oxide in the trench and forming a polysilicon film for the channel on the entire structure; After forming a gate oxide layer on the channel polysilicon layer between adjacent trenches among the plurality of trenches, a polysilicon layer deposition and patterning process is performed to form a gate electrode on the gate oxide layer, and the inside of the trenches Filling the polysilicon film; And forming a source and drain region surrounded by an isolation oxide film by performing a source / drain ion implantation process on the buried polysilicon film.