KR19990002758A - Jitter measuring device and method of pulsed signal - Google Patents

Abstract

The present invention discloses an apparatus and method for measuring jitter of pulsed signals. The jitter measurement apparatus for a pulsed signal according to the present invention for measuring jitter of a pulsed signal input periodically with a high precision comprises a measurement section selector, a counter, and an arithmetic processor. The measurement section selector selects the measurement section of the pulsed signal by a desired section in response to the measurement start signal. The counter inputs a reference clock and counts the number of pulses of the reference clock in response to the pulsed signal of the predetermined period selected by the selection means. The calculation processing unit calculates the difference between the number of pulses counted at the counter and the preset pulse number in units of time, and divides the converted result by a predetermined number of cycles to calculate the jitter amount per one pulsed signal. Here, the preset pulse number is the number of pulses counted in response to the normal pulsed signal without jitter.

Description

Jitter measuring device and method of pulsed signal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to jitter measurement of pulsed signals, and more particularly, to an apparatus and method for measuring jitter of pulsed signals with high accuracy.

The pulsed signal output from the device or IC has jitter, which is a degree of shaking in the time axis of the waveform under the influence of internal circuits or output stages.

1 is a diagram illustrating an example of a jitter pulsed signal. T represents the amount of jitter. Jitter amount as shown in FIG. ) Is not always a constant, but an amount that changes irregularly along the time axis, so the normal amount of jitter ( ) Should be measured statistically and judged from the deviation.

In general, automatic test equipment (ATE) is not easy to measure jitter of pulsed signals. For example, a separate jitter measurement module must be built in or a general time measurement module can be used.

Here, since the general time measurement module of the automatic test equipment is a module for measuring periodic signal periods and amplitudes, there is a limit in measuring jitter indicating minute tremors of the pulsed signal, and the conventional jitter amount is measured. Since the measurement cannot be performed many times, the accuracy of the time measurement module has a problem that it is difficult to satisfy a predetermined jitter specification.

In addition, the automatic test equipment may have a jitter measurement module including a high precision timer for high accuracy, but has a complicated circuit configuration and a costly problem.

The technical problem to be achieved by the present invention is to provide a jitter measuring device for a pulsed signal for measuring the jitter of the pulsed signal with high accuracy by selecting a measurement section of the pulsed signal with a simple circuit configuration to obtain a normal jitter amount. have.

Another object of the present invention is to provide a jitter measuring method performed by the jitter measuring apparatus for the pulsed signal.

1 is a diagram illustrating a jitter pulsed signal by way of example.

2 is a circuit diagram of a preferred embodiment of the jitter measuring device of the pulsed signal according to the present invention.

3 is a waveform diagram of each part of the apparatus shown in FIG.

4 is a partially enlarged view of waveform diagrams denoted by A in FIG. 3.

FIG. 5 is a partially enlarged view of waveform diagrams denoted by B in FIG. 4.

6 is a flowchart illustrating a method of measuring jitter of a pulsed signal according to the present invention.

In order to achieve the above object, it is preferable that the apparatus for measuring jitter of a pulsed signal according to the present invention for measuring jitter of a pulsed signal input periodically with a measurement section selecting section, a counter, and a calculation processing section. The measurement section selector selects the measurement section of the pulsed signal by a desired section in response to the measurement start signal. The counter inputs a reference clock and counts the number of pulses of the reference clock in response to the pulsed signal of the predetermined period selected by the selection means. The calculation processing unit calculates the difference between the number of pulses counted at the counter and the preset pulse number in units of time, and divides the converted result by a predetermined number of cycles to calculate the jitter amount per one pulsed signal. Here, the preset pulse number is the number of pulses counted in response to the normal pulsed signal without jitter.

In order to achieve the above another object, the jitter measurement method of the pulsed signal according to the present invention for measuring the jitter of the periodically input pulsed signal with high precision, (a) selecting the measurement interval of the pulsed signal by the desired interval (b) counting the number of pulses of the reference clock according to the pulsed signal of the predetermined number of cycles selected in step (a), and (c) determining the difference between the number of pulses counted in step (b) and the preset number of pulses. (D) calculating the jitter amount per one pulsed signal by dividing the result converted in step (d) by the predetermined period selected in step (a). Here, the preset pulse number is the number of pulses counted in response to the normal pulsed signal without jitter. Accordingly, the cost is reduced by a circuit configuration simpler than the jitter measurement module including a high precision timer, and the jitter of the pulsed signal is measured more accurately than the simple time measurement module.

Hereinafter, with reference to the accompanying drawings the configuration and operation of the jitter measuring device of the pulse signal according to the present invention will be described as follows.

Figure 2 is a circuit diagram of a preferred embodiment of the jitter measurement device of the pulsed signal according to the present invention, the measurement section selector 100 for selecting a measurement section of the pulsed signal, counting the number of pulses of the reference clock during the selected measurement section By using the 16-bit counter 200 and the counted pulse number, the conventional jitter amount ( It is composed of arithmetic processing unit 300 for calculating a.

The jitter measuring apparatus shown in FIG. 2 is started while the enable signal EN1 input from the test equipment (not shown) is set from the high level to the low level.

The measurement section selector 100 selects the measurement section of the pulsed signal input through the input terminal IN as much as the desired section in response to the above-described enable signal EN1.

In a preferred embodiment, the measurement section selector 100 includes an 8-bit counter 102, an inverter 104, a D flip-flop 106, an inverted AND gate 108, and an AND gate 110.

When the 8-bit counter 102 is enabled by the low-level enable signal EN1 described above, the 8-bit counter 102 counts pulses of the pulsed signal input through the input terminal IN, and counts the high level when counting the 128th pulse. Output the signal. That is, the 8-bit counter 102 divides the pulsed signal by 256 and operates as a divider which outputs the divided result as a signal having a duty cycle of, for example, 50%. The 8-bit counter 102 outputs the 256-divided signal as the clock signal CLK1 of the D flip-flop 106 and outputs it as one input of the inverse AND gate 108.

The inverter 104 inputs and inverts the low-level enable signal EN1 described above, and outputs the inverted result as the input data D of the D flip-flop.

The D flip-flop 106 inputs and outputs the output of the inverter 104, that is, the high level signal, and the signal is output from the 8-bit counter 102 by the clock signal CLK1 and the inverse logical product to be described later. The clear signal output from the gate 108 ( If it is set as a low level signal in response to), the low level signal is continuously output. That is, the D flip-flop 106 operates as a pulse generator which generates one pulse. Here, the clock signal CLK1 and the clear signal ( ) Have inverted states, so the output Q of the D flip-flop 106 remains in its state once set to a low level signal.

The inverse AND gate 108 inputs the output of the 8-bit counter 102 and the output of the inverter 104 to inverse AND, and the result is a low level output Q of the D flip-flop 106 described above. Clear signal to clear Output as That is, the inverse AND gate 108 sets the output Q of the D flip-flop 106 to a low level in order to output only one pulse from the D flip-flop 106.

The AND gate 110 performs an AND operation on the pulsed signal input through the input terminal IN, the output of the inverter 104, and the output Q of the D flip-flop 106, and the result of the measurement section selector 100. Output as output of

As a result, one pulse is output from the D flip-flop 106 among the pulsed signals input through the input terminal IN after the enable signal EN1, which is the measurement start signal, is applied. When the pulse is a pulsed signal having a period corresponding to the period.

According to the foregoing, the D flip-flop 106 receives a clear signal when the 256-divided signal is input from the 8-bit counter 102 as the clock signal CLK1. Since it is set to the low level by), as a result, the pulse period signal of 128 cycles is selected by the measurement section selector 100.

Meanwhile, the 16-bit counter 200 shown in FIG. 2 inputs the output of the measurement section selection unit 100 as the enable signal EN2. The 16-bit counter 200 was previously reset by the reset signal RST output from the test equipment, and also inputs a reference clock CLK oscillating at, for example, 10 MHz from the test equipment.

When enabled by the above-described enable signal EN2, the 16-bit counter 200 counts the number of pulses of the reference clock CLK. That is, the 16-bit counter 200 counts the number of pulses of the reference clock CLK when the 128-periodic pulse signal, which is the enable signal EN2, is high, and sets the enable signal EN2 to the low level. The counted result is kept at '1' and '0' through the output pins QA ~ QP.

The calculation processing unit 300 reads out the number of pulses of the reference clock CLK counted by the 16-bit counter 200, and uses the number of pulses to determine the normal jitter amount ( Calculate For example, the arithmetic processing unit 100 converts the difference between the number of pulses read out from the 16-bit counter 200 and a preset pulse in units of time, and converts the converted result to the number of cycles of the pulsed signal in the measurement section, that is, 128. Dividing by the normal amount of jitter per pulsed signal )

Hereinafter, the jitter amount calculated by the calculation processing unit 300 ( ) As a numerical example.

If the pulsed signal selected by the measurement section selector 100 is a jitter-free signal, that is, no shaking at all, the output of the 16-bit counter 200 is as follows. In this case, it is assumed that the frequency of the pulsed signal input through the input terminal IN is 25 KHz, the duty cycle is 50%, and the frequency of the reference clock CLK is 10 MHz.

[Equation 1]

Output = High section of pulsed signal cycle * Number of cycles of measurement section / reference clock period

= {(1 / 25KHz) /2.0} * 128 / (1 / 10MHz)

= (40μs / 2.0) * 128 / 0.1μs

= 25600

= BIN (0110 0100 0000 0000)

As such, when the output of the 16-bit counter 200 obtained in Equation 1 is a normal signal when the 128-period pulsed signal input as the enable signal EN2 is a normal signal, This is the result of counting the pulse number of CLK).

However, in the case where the pulsed signal is an abnormal signal with jitter, that is, when there is a shake, the high section of the pulsed signal becomes longer. For example, the output of the 16-bit counter 200 is represented as BIN (0110 0100 0101 1010) = 25690 through QA to QP, and when this binary value is read by the operation processor 300, the jitter amount ( ) Can be obtained as in Equation 2.

[Equation 2]

= | Normal pulses-abnormal pulses | * Reference clock period / number of cycles

= | 25600-25690 | * 0.1μs / 128

= 0.0703 μs

In this way, the jitter amount calculated by the calculation processing unit 300 ( ) Is determined against a predetermined jitter specification specified in the test equipment. In addition, this jitter amount ( ) Is measured several times to several tens by the jitter measuring device according to the present invention so that the deviation value of the dispersion is correlated with the actual jitter amount.

FIG. 3 is a waveform diagram of each part of the apparatus shown in FIG. 2, FIG. 4 is a partial enlarged view of waveform diagrams denoted by A in FIG. 3, and FIG. 5 is a partial enlarged view of waveform diagrams denoted by B in FIG. 4.

3 to 5, the operation of the jitter measuring apparatus according to the present invention shown in Figure 2 can be seen more clearly. When the enable signal EN1, which is a measurement start signal, is set to the low level and applied to the 8-bit counter 102, the pulsed signal input through the input terminal IN is divided into 256 and the clock signal of the D flip-flop 106 ( Output as CLK1).

Clear signal of D flip-flop 106 ) Is the clock signal CLK1 that is the output of the 8-bit counter 102 and the enable signal inverted through the inverter 104 (). ) Is an inverse AND product. Accordingly, the output Q of the D flip-flop 106 is divided into the clock signal CLK1 and the clear signal ( ) Only one pulse is output and remains low.

Therefore, as shown in FIG. 3, the enable signal EN2 input to the 16-bit counter 200 is a pulsed signal input through the input terminal IN and an inverted enable signal ( ) And the output Q of the D flip-flop 106 are the result of logical AND, in particular, determined by the output Q of the D flip-flop 106.

Hereinafter, a jitter measuring method performed by the above-described jitter measuring apparatus of a pulsed signal will be described with reference to the accompanying drawings.

6 is a flowchart illustrating a method of measuring jitter of a pulsed signal according to the present invention.

First, in order to measure the jitter many times so that the conventional jitter amount can be obtained, the measurement section is selected by the desired section in the continuous pulsed signal (step 620). After operation 620, the number of pulses of the reference clock is counted according to the pulse signal of a predetermined period selected as the measurement interval (operation 640). That is, the number of pulses of the reference clock is counted during the high period of the pulsed signal of the predetermined period.

Thereafter, in operation 640, the difference between the actual counted pulse number and the preset pulse number is obtained, and the difference is multiplied by the reference clock period to convert the difference in time units (step 660). Here, the preset pulse number is the number of pulses of the reference clock counted accordingly when the pulse signal of a predetermined period is a normal signal.

Thereafter, by dividing the result of step 660 by the predetermined number of cycles selected in step 620, the amount of jitter per pulsed signal of one cycle ( (Step 680).

The apparatus and method for measuring jitter of a pulsed signal according to the present invention described above, for example, selects a 128-period pulsed signal as a measurement target, and thus the conventional jitter amount ( ) Increases the precision of the actual measured time by 128 times compared to the time measurement module included in the conventional automatic test equipment. This overcomes the limitations of the assurance accuracy of automated test equipment with a simple application without the aid of a separate jitter measurement module with a high precision timer.

In addition, although the jitter measuring apparatus of the pulsed signal according to the present invention shown in FIG. 2 has been described as being limited to one embodiment, it will be apparent to those skilled in the art that modifications are possible without being limited to the above-described embodiments. will be. For example, instead of the 8-bit counter 102, the measurement section selector 100 may use another frequency divider that is divided at a desired frequency division rate, or another bit counter may be used instead of the 16-bit counter 200. Also, jitter amount ( Although the arithmetic processing unit 300 is included in order to explain the overall operation of outputting), actually, the test equipment (not shown) directly reads the output of the 16-bit counter 200 so that the jitter amount ( Calculate

As described above, the apparatus and method for measuring jitter of a pulsed signal according to the present invention reduces the cost by a simple circuit configuration than a jitter measuring module including a high precision timer, and reduces jitter of the pulsed signal than a simple time measuring module. It is effective to measure with high precision.

Claims (4)

In the jitter measuring device of the pulsed signal for measuring the jitter of the pulsed signal periodically input with high accuracy, Measurement section selecting means for selecting the measurement section of the pulsed signal by a desired section in response to a measurement start signal; A counter for inputting a reference clock and counting the number of pulses of the reference clock in response to the pulsed signal of a predetermined number of cycles selected by the selection means; And And arithmetic processing means for converting the difference between the number of pulses counted in the counter and a predetermined number of pulses in units of time, and dividing the converted result by the predetermined number of cycles to calculate the amount of jitter per pulsed signal in one period. and, And said preset pulse number is a pulse number counted in response to a normal pulsed signal without jitter. The method of claim 1, wherein the measurement section selection means, Dispensing means for dispensing the pulsed signal into a dispensing period corresponding to the desired section in response to the measurement start signal; An inverter for inverting the measurement start signal; Pulse generation means for inputting the output of the inverter and outputting the signal as one signal having a pulse in response to the output and the clear signal of the frequency division means; Inverted AND product for inverting AND the output of the distributing means and the output of the inverter, and outputting the inverted AND product as the clear signal; And And a logical multiplication means for logically multiplying the pulsed signal, the output of the inverter, and the output of the pulse generating means. The method of claim 2, wherein the pulse generating means, J flip-flop, characterized in that it is a D flip-flop which inputs the output of the inverter as input data, inputs the output of the distributing means as a clock signal, and inputs the output of the inverse AND product as the clear signal. Measuring device. In the jitter measurement method of the pulsed signal for measuring the jitter of the pulsed signal input periodically, with high accuracy, (a) selecting a measurement section of the pulsed signal by a desired section; (b) counting the number of pulses of a reference clock according to the pulsed signal of a predetermined number of cycles selected in step (a); (c) converting the difference between the number of pulses counted in step (b) and a preset pulse number in units of time; (d) dividing the result converted in the step (c) by the predetermined number of cycles selected in the step (a) to calculate the amount of jitter per pulsed signal in one period; Wherein the preset number of pulses is a number of pulses counted in response to a normal pulsed signal having no jitter.