KR19990000386A - Leadframe of Semiconductor Package - Google Patents
Leadframe of Semiconductor Package Download PDFInfo
- Publication number
- KR19990000386A KR19990000386A KR1019970023258A KR19970023258A KR19990000386A KR 19990000386 A KR19990000386 A KR 19990000386A KR 1019970023258 A KR1019970023258 A KR 1019970023258A KR 19970023258 A KR19970023258 A KR 19970023258A KR 19990000386 A KR19990000386 A KR 19990000386A
- Authority
- KR
- South Korea
- Prior art keywords
- tin
- lead frame
- semiconductor package
- lead
- plating
- Prior art date
Links
Landscapes
- Electroplating Methods And Accessories (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
리드프레임 본체의 표면을 주석(Sn)-비스무스(Bismuth)의 합금으로 도금하므로서 인체나 환경에 유해한 영향을 끼치지 않고, 인쇄회로기판에 실장하는 경우 고온의 융점으로 인한 열적 충격(thermal shock)등의 문제가 발생하지 않으며, 도금경도가 강하기 때문에 포밍공정에서 도금조각, 도금깍임등을 방지할 수 있다.The surface of the lead frame body is plated with a tin (Sn) -bismuth alloy, which does not adversely affect the human body or the environment, and when mounted on a printed circuit board, thermal shock due to high melting point It does not occur, and because the plating hardness is strong, it is possible to prevent the plating pieces, plating chipping, etc. in the forming process.
Description
내용없음No content
본 발명은 반도체 패키지의 리드프레임에 관한 것으로, 보다 상세하게는 표면을 주석-비스무스 합금으로 도금처리한 반도체 패키지의 리드프레임에 관한 것이다.The present invention relates to a lead frame of a semiconductor package, and more particularly, to a lead frame of a semiconductor package in which a surface is plated with a tin-bismuth alloy.
수지나 세라믹 등의 성형 수지를 이용하여 반도체 소자를 봉지하는 형태의 반도체 패키지는 종래부터 널리 이용되어져 왔다. 반도체 패키지 내부에 봉지된 반도체 소자의 전극과 외부 환경과는 그 대부분이 금속제의 띠 모양의 박판을 프레스 가공에 의해 일체로 성형시킨 리드 프레임의 리드를 사용하여 접속하고 있다.BACKGROUND OF THE INVENTION A semiconductor package in a form of sealing a semiconductor element by using a molding resin such as resin or ceramic has been widely used in the past. Most of the semiconductor element encapsulated inside the semiconductor package and the external environment are connected to each other by using a lead frame lead formed by integrally forming a strip of thin metal strip by press working.
일반적으로 성형이 완료된 반도체 패키지의 리드프레임에 있어서, 산화를 방지하고 전기전도성을 향상시키며, 반도체 패키지를 인쇄회로기판(PCB)에 실장하는 경우 기판과의 접합력을 증대시키기 위하여 리드프레임의 표면에 전기도금(electro solder palting)을 실시한다.In general, in a lead frame of a molded semiconductor package, it prevents oxidation and improves electrical conductivity, and when the semiconductor package is mounted on a printed circuit board (PCB), the surface of the lead frame may be electrically Electro solder palting is performed.
도 1을 참조하면, 종래에는 리드프레임 본체(1)의 표면을 주석(Sn)-납(Pb)의 합금(2)을 이용하여 도금하였다. 주석-납 합금을 사용하는 주된 이유는 주석이나 납을 개별적으로 사용할 때에 비해 여러 가지 이점을 갖기 때문이다. 이를 구체적으로 설명하면, 순수한 주석만을 사용하여 리드프레임에 도금하는 경우에는 주석 위스커(tin wisker)의 성장으로 리드간에 단락이 발생하여 품질이 저하되며 고가의 주석만을 사용하므로 제조원가가 상승한다는 문제가 발생하였다. 이에 따라 저가의 납을 포함하는 주석-납의 합금을 사용하여 왔다.Referring to FIG. 1, conventionally, the surface of the lead frame body 1 is plated using an alloy 2 of tin (Sn) -lead (Pb). The main reason for using tin-lead alloys is that they have several advantages over the use of tin or lead individually. Specifically, when the lead frame is plated using pure tin only, short circuit occurs between leads due to the growth of tin whiskers, which degrades the quality and increases the manufacturing cost because only expensive tin is used. It was. Accordingly, tin-lead alloys containing inexpensive lead have been used.
그러나 주석-납 합금에 포함된 납은 인체에 매우 유해한 중독성 물질이고 환경유해 인자로서 환경법규 및 환경단체등에 의해 사회적으로 제한과 규제를 받는 다는 문제점이 있다. 또한 주석-납 합금은 도금 경도(hardness)가 약하기 때문에 도금을 한 후에 포밍공정에서 도금조각(tin flake)이 발생한다는 문제점이 있다.However, the lead contained in the tin-lead alloy has a problem that it is very toxic and harmful to the human body and is socially restricted and regulated by environmental regulations and environmental groups as environmentally harmful factors. In addition, the tin-lead alloy has a problem in that a tin flake occurs in the forming process after plating because the plating hardness is weak.
따라서 본 발명의 목적은 인체 및 환경에 무해하고 도금경도가 강한 물질로 도금된 리드프레임을 제공하는데 있다.Accordingly, an object of the present invention is to provide a lead frame plated with a material that is harmless to humans and the environment and has a strong plating hardness.
도 1은 종래의 주석-납 합금으로 도금한 리드프레임의 단면도이고,1 is a cross-sectional view of a lead frame plated with a conventional tin-lead alloy,
도 2는 본 발명의 주석-비스무스 합금으로 도금한 리드프레임의 단면도이다.2 is a cross-sectional view of a lead frame plated with a tin-bismuth alloy of the present invention.
<도면의주요부분에사용된부호의설명><Description of the symbols used in the main parts of the drawing>
1 : 리드프레임 본체2 : 주석-납 합금1: lead frame body 2: tin-lead alloy
3 : 주석-비스무스 합금3: tin-bismuth alloy
본 발명에 따르면, 리드프레임 본체의 표면을 주석(Sn)-비스무스(Bismuth)의 합금으로 도금한 반도체 패키지의 리드프레임이 개시된다.According to the present invention, a lead frame of a semiconductor package is disclosed in which a surface of a lead frame body is plated with an alloy of tin (Sn) -bismuth.
이하 첨부된 도면을 참조하여 본 발명을 구체적으로 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
도 2를 참조하면, 리드프레임 본체(1)의 상하표면은 주석(Sn)-비스무스(Bismuth)의 합금(3)으로 도금된다.Referring to FIG. 2, the upper and lower surfaces of the lead frame body 1 are plated with an alloy 3 of tin (Sn) -bismuth.
이와 같이 구성된 리드프레임의 이점을 이하에 설명한다.The advantages of the lead frame constructed in this way will be described below.
먼저, 납을 포함하지 않기 때문에 인체나 환경에 유해한 영향을 끼치지 않는다.First, since it does not contain lead, it does not have a harmful effect on the human body or the environment.
또한 리드프레임주석-비스무스 합금은 기존의 주석-납 합금과 유사한 용융점을 갖기 때문에 인쇄회로기판에 실장하는 경우 고온의 융점으로 인한 열적 충격(thermal shock)등의 문제가 발생하지 않는다.In addition, since the lead frame tin-bismuth alloy has a melting point similar to that of the conventional tin-lead alloy, there is no problem of thermal shock due to high melting point when mounted on a printed circuit board.
또한 도금경도가 강하기 때문에 포밍공정에서 도금조각, 도금깍임등의 문제가 발생하지 않는다.In addition, since the plating hardness is strong, problems such as plating fragments, chipping, and the like do not occur in the forming process.
상기한 바와 같이, 본 발명에 따르면, 리드프레임 본체의 표면을 주석(Sn)-비스무스(Bismuth)의 합금으로 도금하므로서 인체나 환경에 유해한 영향을 끼치지 않고, 인쇄회로기판에 실장하는 경우 고온의 융점으로 인한 열적 충격(thermal shock)등의 문제가 발생하지 않는다. 또한 도금경도가 강하기 때문에 포밍공정에서 도금조각, 도금깍임등의 문제가 발생하지 않는다.As described above, according to the present invention, the surface of the lead frame main body is plated with an alloy of tin (Sn) -bismuth (Bisuth), so that when mounted on a printed circuit board without adversely affecting the human body or the environment, Problems such as thermal shock due to the melting point do not occur. In addition, since the plating hardness is strong, problems such as plating fragments, chipping, and the like do not occur in the forming process.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019970023258A KR19990000386A (en) | 1997-06-05 | 1997-06-05 | Leadframe of Semiconductor Package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019970023258A KR19990000386A (en) | 1997-06-05 | 1997-06-05 | Leadframe of Semiconductor Package |
Publications (1)
Publication Number | Publication Date |
---|---|
KR19990000386A true KR19990000386A (en) | 1999-01-15 |
Family
ID=65999388
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970023258A KR19990000386A (en) | 1997-06-05 | 1997-06-05 | Leadframe of Semiconductor Package |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR19990000386A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100664424B1 (en) * | 2002-12-16 | 2007-01-03 | 엔이씨 일렉트로닉스 가부시키가이샤 | Electronic parts, manufacturing method and manufacturing device thereof |
-
1997
- 1997-06-05 KR KR1019970023258A patent/KR19990000386A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100664424B1 (en) * | 2002-12-16 | 2007-01-03 | 엔이씨 일렉트로닉스 가부시키가이샤 | Electronic parts, manufacturing method and manufacturing device thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR860000708A (en) | Semiconductor device and manufacturing method thereof | |
DE60201542D1 (en) | IMPROVED SOLDERING MATERIALS | |
KR880004733A (en) | Film carrier and bonding method using this film carrier | |
JP2005026188A (en) | Current fuse and manufacturing method of current fuse | |
US6264093B1 (en) | Lead-free solder process for printed wiring boards | |
US6127205A (en) | Process for manufacturing a molded electronic component having pre-plated lead terminals | |
KR910001808A (en) | Electronic parts | |
US5463247A (en) | Lead frame material formed of copper alloy for resin sealed type semiconductor devices | |
KR19990000386A (en) | Leadframe of Semiconductor Package | |
JP3008470B2 (en) | Lead frame | |
KR100209241B1 (en) | Lead free solder | |
IT1147903B (en) | IMPROVEMENT IN SEMICONDUCTOR DEVICES WITH ENVELOPES OR ENCAPSULATIONS WITHOUT PLATING | |
TW339302B (en) | Solder active braze composition, method of forming an electrically conductive trace comprizing it and electronic assembly comprizing it | |
GB0220517D0 (en) | Leadless electronic component | |
MY121611A (en) | Electronic components to be mounted on a circuit board and method of manufacturing the same | |
KR100220800B1 (en) | Composite lead free solder article | |
KR970024111A (en) | Corrosion prevention lead frame and its manufacturing method | |
KR100220802B1 (en) | Composite solder article | |
DE3563075D1 (en) | Process for maintaining the solderability of lead-tin coatings, and plated holes printed circuit board | |
JPS6334810A (en) | Making of electronic part | |
KR0138467Y1 (en) | A structure of electronic parts for surface mounting in printed circuit board | |
KR19980023279A (en) | Solder composition | |
JP2001257303A (en) | Lead material for electronic component and semiconductor device using the same | |
JPH10130879A (en) | Lead frame for semiconductor device and its production | |
JP2009038075A (en) | Electronic component |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |