KR19980074783A - Graphic memory speeds up data transfer - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a graphics memory having a faster data transfer, and more particularly, comprising: a data input buffer for receiving an address and data coming together with a memory access command; A storage unit for temporarily storing the input data; A memory array that reads and writes data written to a cell of a corresponding address and stores the data; A sense amplifier configured to sense corresponding address data of the memory array corresponding to a memory access command; A comparison unit for comparing the data read through the sense amplification unit with data to be newly recorded stored in the storage unit; And a write driver for outputting a write command signal for writing data to be recorded stored in the storage unit to the memory array according to the comparison signal output through the comparison unit.

Therefore, when the new graphic data is updated in the three-dimensional graphics memory, the access time required to update the data by comparing the existing data coordinate values with the new data coordinate values can be shortened than before. Bandwidth can be increased.

Description

Graphic memory speeds up data transfer

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a synchronous dynamic memory having a fast data transfer of a memory, and more particularly to a synchronous graphics dynamic memory having a high bandwidth in order to support graphics for an image.

Recently, the graphics market is rapidly changing from 2D graphics to 3D graphics due to the development of computers and multimedia.

In general, two-dimensional graphics represent an object to be displayed on the screen in the coordinates (X, Y) and color on the screen. When a new object is to be updated on the screen instead of an existing object, the color value is recorded at a corresponding position in the memory corresponding to the coordinates (X, Y) of each pixel constituting each new object, and then sprinkled on the screen. You can give it.

However, 3D graphics require high bandwidth in memory due to 3D functions such as Z-buffer / Texture mapping / alpha blending. When the new object is updated on the screen, the coordinates of the pixels to be updated are compared by comparing the spatial coordinates Z of the pixels constituting the existing object with the spatial coordinates Z of the pixels constituting the new object. The data value is updated only when the value is large.

After all, from the memory's point of view, using the minimum cycle time tcc _min that reads the spatial coordinates Z of the pixels constituting the existing object and compares them with the spatial coordinates Z of the pixels constituting the new object. A new data value is updated in memory by performing a read modify write (hereinafter referred to as RMW).

1 is a waveform diagram illustrating a read change write (RMW) of a conventional memory, in which a section is a section for comparing an existing data coordinate value with a new data coordinate value.

Referring to FIG. 1, when the CAS latency is 3 cycles, the minimum cycle takes 6 tcc _min after the memory read command is executed at the rising edge of the clock signal.

In addition, when updating new graphic data with 4-bit burst length in two-dimensional graphics, it is not necessary to compare the spatial coordinate values (Z). Therefore, data recording is completed at 4 tcc _min. Since the coordinate values (Z) must be compared, a cycle time of 4 * 6 tcc _min is required.

Therefore, when updating new graphic data in the three-dimensional graphics memory, there is a problem that the bandwidth of the graphics memory is lowered because the access time for comparing and updating the existing data with the new data is delayed somewhat.

SUMMARY OF THE INVENTION An object of the present invention is to reduce the read change write (RMW) cycle time in updating new data in order to solve the conventional problems as described above. To provide.

In order to achieve the above object, an apparatus of the present invention includes a data input buffer for receiving an incoming address and data together with a memory access command; A storage unit for temporarily storing the input data; A memory array that reads and writes data written to a cell of a corresponding address and stores the data; A sense amplifier configured to sense corresponding address data of the memory array corresponding to a memory access command; A comparison unit for comparing the data read through the sense amplification unit with data to be newly recorded stored in the storage unit; And a write driver for outputting a write command signal for writing data to be recorded stored in the storage unit to the memory array according to the comparison signal output through the comparison unit.

1 is a waveform diagram illustrating a read modify write of a conventional memory.

2A to 2B are waveform diagrams for explaining read compare write according to the present invention.

3 is a circuit diagram illustrating an embodiment of a memory according to the present invention.

* Description of the symbols for the main parts of the drawings *

10: Data input buffer. 20: storage unit.

30: memory array. 40: sense amplifier.

50: comparison unit. 60: recording driver.

Hereinafter, with reference to the accompanying drawings will be described in more detail the present invention.

3 is a circuit diagram illustrating an embodiment of a memory according to the present invention, a data input buffer 10 for receiving an input address and data together with a graphic memory access command, and a storage unit for temporarily storing the input address and data. (20), a memory array 30 for reading data written to a cell of a corresponding address or storing newly written data, and a sense for sensing and outputting address data of the memory array corresponding to a graphic memory access command. A comparator for comparing the data read through the amplification unit 40 and the sense amplification unit 40 with the data to be newly recorded through the storage unit 20 to determine whether to change the coordinate values of the new data on the screen. And a write driver for recording the coordinates of the data to be newly written in the memory array according to the comparison signal output through the comparison unit 50. It consists of 60.

The graphic memory of the present invention configured as described above receives the address and data coming in together with the graphic memory access command to record the coordinate value of the new data to the memory array 30 through the data input buffer 10.

The storage unit 20 temporarily stores the address and data input through the data input buffer 10.

In addition, the corresponding address inputted from the memory array 30 is found and the data value of the corresponding address is read by the sensing amplification unit 40 by a sensing operation.

The comparator 50 receives data read through the sense amplifier 40 and data to be newly recorded through the storage 20, and the data value stored in the storage 20 is the sense amplification unit. Only when it is larger than the data read through 40 generates a write command signal for recording the coordinate value of the new data.

When a write command signal is applied to the write driver 60 through the comparator 50, the address and data stored in the storage unit 20 are received and the corresponding address is found in the memory array 30. Record it.

2A to 2B are waveform diagrams for explaining read compare write (hereinafter referred to as RCW) according to the present invention, FIG. 2A is a waveform diagram of RCW according to a single write, and FIG. 2B is a burst length. Shows the waveform of RCW when is 4 clock cycles.

Referring to FIGS. 2A to 3, section b of FIG. 2A is a data coordinate value recorded in the memory array 30 through the comparison unit 50 and a data coordinate to be newly recorded through the storage unit 20. The section c compares values with each other, and the section c receives a comparison signal output from the write driver 60 through the comparator 50 and stores data values stored in the storage 20 in the memory array 30. It is a section to decide whether to record as. In addition, the d section indicates a section in which data update is completed because the data value stored in the storage unit 20 is newly written to the corresponding address of the memory array 30 through the write driver 60.

FIG. 2A shows a minimum cycle time of 4 tcc _min after the memory read command is performed at the rising edge of the clock signal when the CAS latency is 3 cycles, and FIG. When the burst length is 4 clock cycles, the minimum cycle time is 8 tcc _min until the data write command is executed after the memory read command is executed at the rising edge of the clock signal.

Therefore, in the case of single data recording, the minimum cycle time is reduced by 2 tcc _min minus 6 tcc _min- 4 tcc _min when the CAS latency is 3 cycles, and the burst length is 4 clock cycles and the CAS latency is 4 cycles. , The minimum cycle time is reduced by 20 tcc _min minus 28 tcc _min- 8 tcc _min .

Therefore, in the present invention, when updating the new graphic data in the three-dimensional graphics memory, the access time required to compare and update the existing data and the new data is shortened, thereby increasing the bandwidth of the graphics memory.

When the new graphic data is updated in the 3D graphics memory, the access time required to update the data by comparing the existing data coordinate values with the new data coordinate values can be shortened than before. There is an effect to increase.

Claims (3)

A data input buffer configured to receive an address and data received together with a memory access command; A storage unit for temporarily storing the input data; A memory array that reads and writes data written to a cell of a corresponding address and stores the data; A sense amplifier configured to sense corresponding address data of the memory array corresponding to a memory access command; A comparison unit for comparing the data read through the sense amplification unit with data to be newly recorded stored in the storage unit; And a write driver for outputting a write command signal for writing the data to be recorded stored in the storage to the memory array in accordance with the comparison signal output through the comparison unit. The graphics memory of claim 1, wherein the storage unit stores data of a new address to be recorded and accesses the memory array corresponding to a required time. 2. The graphics memory of claim 1, wherein the storage unit temporarily stores data of an address to be recorded according to a burst length of input data.