KR19980041640A - Synchronization and Output Method of High Precision Visual Synchronizer Using Ground Position Measurement System (GPS) - Google Patents

Abstract

The present invention synchronizes a high-precision time synchronizer using a ground position measuring system to programmatically and accurately synchronize a main clock output from a precision visual oscillation circuit to a 1PPS received from a GPS satellite in a high performance microprocessor unit (MPU). And an output method.

To this end, detecting whether a 1PPS visual signal is received from the GPS receiver, and determining whether the received 1PPS visual signal is the first one, and if the first 1PPS is not the first 1PPS in the step, the first and the second embedded in the MPU. Initializing the timer counter to 0 and completing the synchronization process; counting the primary clock of 10 MHz in the first and second timer counters from the time when it is determined as the first 1 PPS in the step; Determining whether the number of clocks counted in the timer count is 10 million times; determining whether the counted clock number is within a correctable range when the counted value is not 10 million times; Sending an alarm and completing the synchronization process, storing in the first and second ROM when the number of clocks counted in the step is within the correctable range And reading out the correction value from the corrected correction table, and outputting the correction table value read in the step to the D / A converter.

Description

Synchronization and Output Method of High Precision Visual Synchronizer Using Ground Position Measurement System (GPS)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high precision time synchronization device and a control method thereof using a ground positioning system (GPS), and in particular, a predetermined output from a 1PPS received from a GPS satellite and a precision visual oscillation circuit. The present invention relates to a synchronization and output method of a high-precision time synchronizer using a ground position measuring system that outputs a frequency programmatically synchronized in a high performance microprocessor unit (MPU).

The high-precision visual synchronization device described in the present invention has a wide range of applications, and is applicable to the mobile communication field, power system, metrology, distributed processing system, and optical communication network. The technical scope of the system field is as follows.

First, it is installed in a base station of code division multiple access (CDMA) used in PCS (Personal Communications Service), which is currently expected to be used in Korea, and mobile communication using code division multiple access. In this case, high-precision visual synchronization is essential.

For example, if a user moves from one place to another during communication, if the system is not synchronized between the two base stations, it may cause a fatal error such as disconnection, as well as code division multiple access communication. The number of users of wireless mobile communication is increasing exponentially every year, so the importance is very high.

Therefore, in Korea, standards are not set for each mobile communication as a matter of protocol. Therefore, it is necessary to prepare a separate base station according to the communication method, so it is necessary to prepare for this. Most high-precision time synchronizers include time division including code division multiple access. Developments are being made for the telecommunication markets such as Time Division Multiple Access (TDMA) and Paging.

Second, precision vision synchronizers can be installed in power-related systems, and the most common one can be used to synchronize the tagging / logging subsystems for each system and time of accident.

That is, the interconnected wires of the unexpected situation occurs, these errors are detected quickly and can FT IU of each system to cope with unless such disconnection (FTIU: Fault transient lnterface Unit) is a time logging in a precisely synchronized state (Time Tagging) This requires a time synchronizer with a relatively high precision, and can also aid in the processing of sequential control and management data.

In addition, the power system is applied to various fields such as RTU (Remote Terminal Unit) of SCADA (Supervisory Control And Data Acquisition) system and stable control of power system.

Therefore, the high-precision time synchronizer applied to the above fields requires a reference time in Universal Time Coordinated (UTC), and the reference time signal is received from a GPS satellite.

That is, a 1PPS (Pulse Per Second) time signal transmitted from a GPS satellite is transmitted based on the time of the US Standard World Coordinated Time through two cesium atomic clocks and two rubidium atomic clocks mounted in the satellite itself.

Looking at the precise time synchronization device using the 1PPS transmitted from the conventional GPS satellites as follows.

<Prior Art 1>

Figure 1 (a) is composed of a time synchronization device using Hewlett Packard's SmartClock technology, processing a low-cost oscillator as a reference signal and combines the GPS satellite 1PPS as an external signal, high precision and low price At the same time, in the case of Holdover mode, in which the external reference signal 1PPS is incapable of receiving, the error tolerance is provided to a value already predicted in a normal state, and the operation method is the external of the oscillator and the 1PPS. The microprocessor compares the reference signal and returns the error value to the oscillator to improve the accuracy by adjusting the oscillator frequency.

〈Private Technology 2〉

Figure 1 (b) is a form of independent isochronous maintenance block for improving the isochronism between each frequency in the improved technique of Hewlett-Packard's company, unlike the prior art 1, this method is within 1 × 10 ^-10 within at least one day Because the frequency can be adjusted up to, combining GPS clock with rubidium or high-quality crystal oscillator can achieve stability enough to approach cesium's performance, and the part of the isochronous maintenance block is the frequency repeater.

<Prior Art 3>

Figure 1 (c) of another prior art DATUM (PRS: Primary Reference Systems) relates to the network market, such as ATM (Asynchronous Transfer Mode) than the conventional mobile communication market and It is a product for wired or wireless communication network, and is similar to Hewlett-Packard's HP55300A.

In other words, DATUM's PRS (PRS) uses the main clock oscillator portion not only rubidium but also a crystal oscillator, and uses GPS as an external reference reception signal.

Such a conventional time synchronizer shown in FIGS. 1A to 1D mainly relies on hardware to maintain time synchronization and isochronousness, which not only complicates the system itself but also increases the volume of the product itself. It becomes very large and also maintains a high price in terms of price. Therefore, it is not universalized, and there is a problem of deterioration in reliability as a visual synchronizer by having a large variation in precision.

The present invention is to solve the above problems, so that the 10MHz main clock generated in the precision time oscillation circuit by the program set in the high-precision microprocessor unit can be accurately synchronized to 1PPS transmitted from the GPS satellites. It is an object of the present invention to provide a synchronization method of a high-precision visual synchronizer using a ground position measuring system.

Another object of the present invention is to accurately count the main clock in the timer counter built in the microprocessor unit, and read the count value so that the output can be made when 10 MHz is precisely synchronized to 1PPS. It is an object of the present invention to provide an output method of a time synchronizer.

The synchronization method of the high-precision time synchronization device according to the present invention for achieving the above object comprises the steps of: detecting whether a time signal of 1PPS is received from the GPS receiver, and determining whether the received 1PPS time signal is the first, When the first 1PPS is not the first 1PPS in this step, the step of initializing the first and second timer counters embedded in the MPU to 0 and completing the synchronization process, the first and second timers from the time point determined as the first 1PPS in the step Counting the main clock of 10 MHz in the counter; determining whether the number of clocks counted in the first and second timer counts during the 1PPS period is 10 million times; and if the value counted in the step is not 10 million times, the counted clock number can be corrected. Determining whether the range is within a range; if it is determined that the range is out of the correctable range, sending an alarm and completing a synchronization process; Reading the correction value from the correction table stored in the first and second ROM when the number of clocks counted is within the correctable range, and outputting the correction table value read in the step to the D / A converter. do.

In addition, the output method of the high-precision time synchronizer according to the present invention, when the system is operated, increasing the built-in first timer counter by one each time a 10MHz main clock is input from the MPU, after the first timer counter Determining whether the number of pulses of the main clock counted by is 50,000 times; in the step, if the number of pulses of the main clock is determined to be 50,000 cycles, the second timer counter is increased by 1, and the first timer counter is initialized to 0 and then again. Counting the main clock, reading the counted value of the second timer counter after the step, and determining whether the counted value is two hundred times; in the step, if the counted value of the second timer counter is two hundred times, Recognizing that the main clock is synchronized, initializing the first and second timer counters, and outputting 1PP and 10 MHz through the output drive after the step. It is.

1A to 1C are schematic diagrams of a conventional time synchronizer.

2 is an overall block diagram of a time synchronizer according to the present invention.

3 is a detailed circuit diagram of a main control unit which is a time synchronization device according to the present invention;

4 is a detailed view of a precise time oscillation circuit as a time synchronization device according to the present invention;

5 is a detailed view of a reset and display unit which is a time synchronizer according to the present invention.

6 is a detailed view of an output drive circuit as a time synchronizer according to the present invention.

7 is an overall operation flow chart of the time synchronizer according to the present invention.

8 is a timing diagram of each stage of the time synchronization device according to the present invention;

9 is a flowchart illustrating a process of synchronizing the time synchronization device according to the present invention.

10 is a flowchart illustrating an output process of the time synchronization device according to the present invention.

〈Description of the symbols for the main parts of the drawings〉

10: antenna 20: GPS receiver

30: reset and display unit 31: reset switch

32: reset circuit 33: drive circuit

34: display unit 40: precision time oscillation circuit

41: D / A converter 42: variable voltage oscillator (VCO)

50: main controller 51: microprocessor unit (MPU)

52, 53: 1st, 2nd ROM (ROM) 54, 55: 1st, 2nd RAM

56: chip selector 57, 59: 1st, 2nd timer counter

70: output drive 71, 72: first and second output unit

73: communication interface 100: GPS satellites

2 is a block diagram of a high-precision time synchronization device using a ground position measuring system according to the present invention, one side of the antenna 10 receiving the time signal emitted from the GPS satellite 100, one received time signal per second A GPS receiver 20 which outputs a pulse (hereinafter referred to as 1PPS (Pulse Per Second)) and outputs data on whether or not the 1PPS has been received, back-up voltage detection and year, month and date is connected.

In addition, on the output side of the GPS receiver 20, the entire system is controlled by a predetermined program, and the outputs of the precision time oscillation circuit 40 and the GPS receiver 20 are combined and counted and corrected to precisely synchronize 10 MHz to 1 PPS. An output main controller 50 is connected.

In addition, one output terminal of the main controller 50 initializes the entire system and displays whether or not a time signal is received from the GPS and whether 1PPS is normally output by lighting a lamp, and resets to generate an alarm when a system abnormality occurs. And a display unit 30 are connected.

In addition, the other output terminal of the main control unit 50 outputs 1PPS and a frequency of 10MHz synchronized with each other and is provided with at least one communication port is connected to the output drive 70 that can communicate with other external devices, the main control unit One input terminal of 50 is connected with a precision time oscillation circuit 40 for constantly outputting a main clock of 10 MHz.

3 is a detailed circuit diagram of the main controller 50, which is a high-precision visual synchronization device using GPS according to the present invention, which controls the entire system and combines the outputs of the precision visual oscillation circuit 40 and the GPS receiver 20. A microprocessor unit (hereinafter referred to as MPU) 51 for correcting and accurately synchronizing and outputting 1 PPS and 10 MHz of the main clock is provided. The MPU 51 has a 10 MHz output from the precision time oscillation circuit 40 for 1 PPS. The first and second timer counters 57, 58 for counting the main clocks of are built in.

In addition, one side of the MPU 51 is connected to the first and second ROMs 52 and 53 which store correction table values so that accurate synchronization with the entire control program of the system can be achieved.

The other end of the MPU 51 is connected with first and second RAMs 54 and 55 for storing and reading data required during system operation, and the first and second ends of the MPU 51 are connected to one end of the MPU 51. The chip selectors 56 for enabling the two ROMs 52 and 53 and the first and second RAMs 54 and 55 are connected to each other.

4 is a detailed view of the precision time oscillation circuit 40 which is a time synchronization device according to the present invention, and a variable voltage oscillator 42 having a variable frequency output according to an applied voltage is connected to one input terminal of the MPU 51. Between the input terminal of the variable voltage oscillator 42 and the output terminal of the MPU 51, the correction data value transmitted from the MPU 51 is converted to analog so that the main clock output from the variable voltage oscillator 42 is 10 MHz. The D / A converter 41 applied to the voltage oscillator 42 is connected and comprised.

5 is a detailed circuit diagram of the reset and display unit 30, which is a high-precision time synchronization device using GPS according to the present invention, wherein an input terminal of one side of the MPU 51 initializes the entire system in accordance with the connection of the switch 31 ( 32) is connected, and the output terminal of the MPU 51 is composed of a plurality of LEDs and alarms through the drive circuit 33, whether or not to receive the visual signal from the GPS satellite 100, the normal output of 1PPS, alarm when a system error occurs The display part 34 which generate | occur | produces this is connected and comprised.

6 is a detailed circuit diagram of an output drive circuit 70, which is a high-precision time synchronization device using GPS according to the present invention, wherein the first and second output units 71 output 1PPS and 10MHz to the output terminal of the MPU 51, respectively. 72 is connected and one or more communication interfaces 73 capable of various types of communication with the outside are connected.

Here, the first and second output units 71 and 72 are formed of first and second NOR gates NOR1 and NOR2, respectively, 1PPS at one end of the first NOR gate NOR1, and 10 MHz The NOR2 is applied to each of the two NOR gates, and an enable signal is applied from the MPU 51 to the other ends of the first and second NOR gates NOR1 and NOR2.

7 is an overall operation flowchart of the high precision time synchronizer using GPS according to the present invention, and FIG. 8 is an input / output timing diagram of the high precision time synchronizer using GPS according to the present invention.

9 is a flowchart illustrating a process of synchronizing in the time synchronizer according to the present invention, and FIG. 10 is a flowchart illustrating a process of outputting 1PPS and 10 MHz in the time synchronizer according to the present invention.

Looking at the operation of the present invention made as described above are as follows.

First, the overall operation of the present invention will be described with reference to FIG. 2, the 1PPS time signal of the GPS satellite 100 provides the time of the US Standard World Coordinated Time through two cesium atomic clocks and two rubidium atomic clocks mounted in the satellite itself. It is sent out as a standard.

Therefore, the time signal transmitted from the GPS satellite 100 is transmitted to the GPS receiver 20 through the antenna 10, thereby outputting 1PPS and receiving or not receiving the time signal transmitted from the GPS satellite 100. Each data relating to the detection and the year, month, and day is outputted to the main controller 50, while the main clock of 10 MHz is output from the precision time oscillator circuit 40 to be transmitted to the main controller 50.

On the other hand, the main controller 50 performs a series of programs according to the input state of the 1PPS transmitted from the GPS receiver 20 and the 10MHz main clock transmitted from the precision visual oscillation circuit 40 to sequentially control At the same time, by combining, counting, and calibrating, 1PPS and 10MHz are accurately synchronized, and then 1PPS and 10MHz are output.

Therefore, 10 MHz is accurately synchronized with 1 PPS at the main controller 50, and the frequency of each of the synchronized 1 PPS and 10 MHz is output through the output drive 70, while at the main controller 50, the signals of 1 PPS and 10 MHz are output. When is normally output is reset and sends a control signal to the display unit 30 to turn on the corresponding LED and at the same time, when receiving a visual signal from the GPS satellite 100, the corresponding LED light and an alarm when a system error occurs.

Therefore, when 1PPS and 10MHz, which are accurately synchronized by the main controller 50, are provided to the base station of the mobile communication of the code division multiple access (CDMA), time synchronization occurs for each base station, and the call is moved from the base station to another base station. The disconnection of the terminal during communication is eliminated.

The operation of the high-precision time synchronizer using GPS according to the present invention operated as outlined above will be described in more detail with reference to FIGS. 2 to 8 as follows.

First, when power is supplied to the system, the main controller 50 initializes the system in the MPU 51 (S1), and then executes a self-diagnosis mode (S2) to test whether there is an abnormality of the system.

At this time, if it is determined that there is no abnormality in the system (S3), the ready state for generating 1PPS using 10MHz, the main clock output from the precision time oscillation circuit 40 until the time signal 1PPS is received from the GPS satellite 100. On the other hand, when it is determined that there is an error in the system after executing the self-diagnosis mode, the control signal is sent to the drive circuit 33 of the reset and display unit 30 shown in FIG. 5 to the display unit 34. The system initial procedure (L1) for transmitting the built-in alarm is performed.

In this state, as described above, two cesium atomic clocks and two rubidium atomic clocks mounted in the GPS satellite 100 itself are transmitted based on the Universal Time Coordinated Universal Time (UTC). The antenna 10 is transmitted to the GPS receiver 20.

On the other hand, the GPS receiver 20 receives the time signal from the GPS satellite 100 and outputs 1PPS which generates one pulse per second as shown in FIG. 8A, and at the same time receives the time signal from the GPS satellite 100. Each data relating to whether or not, back-up voltage detection, and year, month, and day are transmitted to the main controller 50.

In addition, when power is supplied to the system, the MPU 51 sends a predetermined data value to the D / A converter 41 of the precision time oscillation circuit 40 shown in FIG. As a value is applied to the variable voltage oscillator 42, a main clock of 10 MHz is output, which is applied to the main controller 50 again.

Therefore, the main controller 50 determines whether a 1PPS visual signal is received from the GPS receiver 20 (S5). If it is determined that the 1PPS is normally received in the determination process, the main controller 50 recognizes the locked mode. By sending a control signal to the drive circuit 33 of the reset and display unit 30 of FIG. 5 to turn on (S6) the corresponding LED of the display unit 34 to inform that the normal state that the visual signal is received from the GPS satellite 100 do.

At this time, if it is determined that 1PPS is not received in the process of determining whether 1PPS is received from the GPS receiver 20 (S5), the MPU 51 clocks the previous data based on the holdover mode. GPS satellite signal receiving process (L2) to output the (S7) is performed.

On the other hand, if it is determined that the locked mode in which the 1PPS is received from the GPS receiver 20 in the GPS satellite signal reception process L2, the MPU 51 outputs the 10MHz main clock output from the precision time oscillation circuit 40 for 1PPS. When the first clock is counted as the second timer counters 57 and 58, it is determined that the main clock is correctly counted 10 million times during 1PPS (S9), and it is recognized that 10MHz is correctly synchronized to 1PPS.

Accordingly, the display unit 34 outputs 1PPS shown in FIG. 8A and 10MHz shown in FIG. 8B, and sends control signals to the drive circuit 33, which is the reset and display unit 30 of FIG. By lighting the corresponding LED of (S10), it indicates that 10MHz is correctly synchronized with 1PPS.

However, when the main clock is not counted correctly 10 million times for 1 PPS when the counting step S9 is performed by the first and second timer counters 57 and 58 built in the MPU 51, the precision time oscillation circuit 40 is performed during 1 PPS. As shown in FIG. 4, the main clock outputted from the reference signal is not exactly 10 MHz, and the data for increasing or decreasing the output frequency of the variable voltage oscillator 42 is output to the D / A converter 41 (S11).

Therefore, the D / A converter 41 converts and outputs the digital signal output from the MPU 51 to the voltage value of the analog signal, and the converted voltage value is applied to the variable voltage oscillator 42 so as to be applied to the input voltage. The proportional output frequency is increased or decreased, and the increased or decreased output frequency is supplied to the MPU 51 to return to the counting step S8 of FIG. 7 which counts the main clock output from the variable voltage oscillator 42 for 1 PPS. By executing the synchronization and output process L3, the main clock of the variable voltage oscillator 42 can be maintained at a constant 10 MHz at all times.

Meanwhile, the first and second ROMs 52 and 53 in FIG. 3 store a program capable of executing the above-described process and a correction table value so that 10 MHz can be accurately synchronized to 1 PPS. In this case, the MPU 51 reads programs and correction table values stored in the first and second ROMs 52 and 53 sequentially so that 10 MHz can be accurately synchronized and corrected at 1 PPS.

In addition, the first and second RAMs 54 and 55 are for temporarily storing data necessary during the above-described series of processes, and the chip selector 56 is required during program execution under the control of the MPU 51. In order to sequentially read data, the first and second ROMs 52 and 53 and the first and second RAMs 54 and 55 may be selectively enabled.

9 to 10, the process of accurately synchronizing 1PPS and 10 MHz in the MPU 51 and the process of outputting the two synchronized signals will be described below.

First, a synchronization process for accurately synchronizing 10 MHz to 1 PPS by correcting an error by FIG. 9 will be described. When power is supplied to the system to start an operation, it detects whether a visual signal of 1 PPS is received from the GPS receiver 20 and is received. It is determined whether the time signal is the first 1PPS (step 201).

At this time, if it is recognized that the first 1PPS is not applied from the GPS receiver 20, the first and second timer counters 57 and 58 built in the MPU 51 are initialized to zero (step 202). When the first 1PPS is recognized as the first PPS applied in step 201, the first and second timer counters 57 and 58 count the 10 MHz main clock (step 203).

In this state, the MPU 51 reads the number of clocks of 10 MHz counted by the first and second timer counts 57 and 58 during the 1PPS period, and determines whether the count value of the read clock is 10 million times (step 204). At this time, if the counted value is determined to be 10 million times, the synchronization process is completed by recognizing that the primary clock is 10MHz at 1PPS.

On the other hand, if the value counted in step 204 is not 10 million times, it is determined that it is not synchronized to the main clock at 1PPS, and at the same time, it is determined whether the counted clock number is within the correctable range (step 205), and it is determined that it is out of the correctable range. When the alarm is sent (step 206), the synchronization process is completed.

At this time, if it is determined that the number of clocks counted in step 205 is within the correctable range, it is stored in the correction table stored in the first and second ROMs 52 and 53 of the main controller 50 shown in FIG. After reading the corresponding correction value (step 207), the precision data shown in FIG. 4 is output to the D / A converter 41 of the oscillation circuit 40 to increase the output of the variable voltage oscillator 42. At 1PPS, the 10MHz main clock is synchronized exactly.

Next, a process of synchronizing and outputting 10 MHz to 1PPS will be described with reference to FIG. 10. When power is supplied to the system and starts to operate, the MPU 51 is embedded in the MPU 51 whenever a 10 MHz main clock is input. The first timer counter 57 is increased by one (step 301).

If it is determined that the number of pulses of the main clock counted by the first timer counter 57 has been changed to 50,000 times by repeating the step 301 (step 302), the second timer counter 58 is increased by 1 and the first timer is increased. After initializing the counter 57 to zero (step 303), the main clock is counted again.

After that, the MPU 51 reads the counted value of the second timer counter 58 and determines that the number counted by the first timer counter 57 has been two hundred times (step 304). By recognizing that they are synchronized with each other, the first and second timer counters 57 and 58 are initialized to 0 (step 305), and at the same time, 1PPS and 10MHz are output through the output drive 70 (step 306). .

Next, referring to FIG. 6, a process in which 1PPS and 10MHz accurately synchronized in the MPU 51 are output through the output drive 70 is as follows.

First, after synchronizing 10 MHz to 1 PPS, 1 PPS output from the MPU 51 is transmitted to one end of the first NOR gate NOR1 of the first output unit 71, and 10 MHz is the second output unit 72. Is applied to the second NOR gate NOR2.

At this time, the enable signal is output from the MPU 51 to the first and second NOR gates NOR1 and NOR2 so that the clocks of 1PPS and 10 MHz synchronized with each other are the first and second NOR1 NOR1 NOR2. ) Output is made only in the enabled state, so that it is possible to maintain isochronism by reducing visual error between 1PPS and 10MHz output signals, and to communicate with other external devices through one or more communication interfaces 73. .

On the other hand, when an abnormality occurs in a state in which the system is in operation or when the system is initialized as necessary, the reset circuit 32 is operated by transmitting the reset signal 32 to the MPU 51 when the switch 31 of FIG. 5 is turned on. As described above, the MPU 51 recognizes the reset signal and executes the step S1 of initializing the system of FIG. 7 to execute the above-described process again.

As described above, the present invention accurately synchronizes the 10 MHz main clock generated in the precision time oscillation circuit with 1 PPS transmitted from the GPS satellites by a program set in the high precision microprocessor unit, and counts the main clock in the timer counter. It is possible to provide a precise time synchronization device by reading a value so that the output can be made when 10 MHz is synchronized to 1 PPS accurately.

Claims (2)

A main visual control unit having a GPS receiver, an MPU with first and second timer counters, first and second ROMs, a precision oscillation circuit having a D / A converter, a reset and display unit, and an output In the high precision time synchronizer using a ground position measurement system including a drive, Detecting whether a 1PPS visual signal is received from the GPS receiver, and determining whether the received 1PPS visual signal is first (201), In step 209, if the first 1PPS is not the first step, initializing the first and second timer counters embedded in the MPU to 0 and completing the synchronization process (209). Counting the primary clock of 10 MHz in the first and second timer counters from the time point at which the first 1PPS is determined in step 201 (203); Determining whether the number of clocks counted in the first and second timer counts during the 1PPS period is 10 million times (204); Determining whether the counted clock number is within a correctable range when the counted value is not 10 million times (205); If it is determined that the correctable range is out of the step, sending an alarm and completing a synchronization process (206); Reading the correction value from the correction table stored in the first and second ROM when the number of clocks counted in step 205 is within the correctable range (207); And a step (208) of outputting a correction table value read in the step to a D / A converter. High-precision time synchronization device using a GPS receiver and a ground position measurement system including a main control unit having an MPU with built-in first and second timer counters, a precision visual oscillation circuit, a reset and display unit, and an output drive. To When the system is operated, increasing the built-in first timer counter by one each time a main clock of 10 MHz is input from the MPU (301). Determining whether the number of pulses of the main clock counted by the first timer counter after 50,000 is 50,000 times; If it is determined in the step that the number of pulses of the main clock is 50,000 times, increasing the second timer counter by 1, initializing the first timer counter to 0 and counting the main clock again (303), (304) determining whether the counted value is two hundred times by reading the counted value of the second timer counter after the step; Initializing the first and second timer counters by recognizing that the main clock is synchronized to 1 PPS when the counted value of the second timer counter is two hundred times in the step (305), And outputting 1PP and 10MHz through the output drive after the step (306).