KR19980029345A - Key input device with power saving function and control method thereof - Google Patents

Abstract

The present invention relates to a key input device and a method of controlling the same, which are applied to a system having a small memory device.

A switch SW2 turned on or off by a user's pressing operation; A power supply means (P2) connected to one terminal of the switch (SW2) to supply power for recognizing a switching state; And a flip-flop FF connected to the other terminal of the switch SW2 and providing key scan data to the other terminal of the switch SW.

The switching state is recognized through the potential of the contact between the switch SW2 and the power supply means P2, and the key scan data is initially at a high level and falls to a low level when the switch is turned on so that recognition of the switching state is achieved. After the recognition is completed, it is set to the high level again when recognition is completed,

After recognizing the ON state of the switch SW2, it is possible to significantly reduce power consumption compared to the related art by controlling to remove the current path even when the switch SW2 is pressed.

Description

Key input device with power saving function and control method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a key input device and a control method thereof applied to a system having a small memory device, and more particularly, to a key input device and a control method thereof capable of reducing current consumption during key input operation processing. will be.

Hereinafter, a conventional key input device and a control process thereof will be described with reference to the accompanying drawings.

1 shows a general system having a small memory element.

As shown in FIG. 1, the system comprises a display unit 1, a control unit 2 having a small memory element, and an input device 3 for processing a user's key input.

The control unit 2 recognizes a user input from the input device 3, converts the contents stored in the internal memory element into a display signal, and provides it to the display unit 1 according to the input. That is, while the user presses a key, the input device 3 recognizes this, and when there is a key input, the content stored in the storage element in the control unit 2 is converted into a display signal by the control unit 2 and then the display unit. It is controlled to be displayed externally through (1).

FIG. 2 is a circuit diagram of a conventional input device 3 applied to the system of FIG.

Referring to FIG. 2, a conventional input device 3 is connected to a P-type metal oxide semiconductor (PMOS) transistor P1, a switch SW1 connected to a drain of the PMOS transistor P1, and the switch SW1. N-type metal oxide semiconductor (NMOS) transistor N1 is connected.

A power supply voltage VCC is applied to a source of the PMOS transistor P1, and a gate is ground. The source of the NMOS transistor N1 is ground, and a power supply voltage VCC is applied to the gate. Therefore, since the gate-source voltage of the PMOS transistor P1 is always reverse biased, and the gate-source voltage of the NMOS transistor N1 is always forward biased, the power supply of the two transistors P1 and N1 is applied as above. Is always turned on during operation.

In this state, when the switch SW1 is OFF, current is supplied to the internal bus by the power supply voltage VCC connected to the PMOS transistor P1. When the switch SW1 is ON, a current path is formed by the PMOS transistor P1 and the NMOS transistor. Therefore, when the switch SW1 is ON and OFF, the potential of the contact between the drain of the PMOS transistor P1 and the switch SW1 is different. Since the potential of the contact is provided to the control unit 2 of the system through the internal bus, the control unit 2 can recognize the current switching state by using the difference of the potential input through the internal bus.

Such a system is mainly applied to small portable products, which emphasizes the power saving function. However, such an input device has a problem in that current consumption continues while the switch SW1 is pressed to operate the system. That is, a predetermined current is consumed by the current path formed by the PMOS transistor P1 and the NMOS transistor N1 while the switch SW1 is ON. This current consumption is negligible given the battery capacity of small portable devices. Therefore, a countermeasure for solving the current consumption problem in such an input device is desired.

The present invention is to solve the above problems of the prior art, it is possible to reduce the current consumption by forcibly cutting off the current path even if the ON state is maintained after the ON state of the switch (ON) is maintained. The present invention provides a key input device and a control method thereof.

1 is a block diagram of a general system.

2 is a circuit diagram of a conventional input device applied to the system of FIG.

3 is a circuit diagram of an input device according to an embodiment of the present invention.

4 is a flow chart showing a control routine for driving the input device of FIG.

The input device of the present invention for achieving the above object, the switch is turned on or off by the user's pressing operation; A power supply means connected to one terminal of the switch to supply power for recognizing a switching state; And a flip-flop connected to the other terminal of the switch and providing key scan data to the other terminal of the switch, wherein a switching state is recognized through a potential of a contact point between the switch and the power supply means, and the key The scan data is initially at a high level and falls to a low level when the switch is turned on so that the recognition of the switching state is made, and then set back to the high level when the recognition is completed.

According to the input device of this invention described above, a switch is located between the power supply means and the flip-flop. When the switch is turned on, the key scan data of the flip-flop falls from the high level to the low level, and at this moment a current path consisting of the power supply means-switch-flip flop is formed. In this state, recognition of the turn-on state of the switch is made through the potential of the contact. Upon completion of the recognition, the key scan data of the flip-flop is set back to a high level, thereby forcibly removing the current path. Therefore, even if the user keeps pressing the switch, after the recognition of the switch state is made, the current path is removed, thereby reducing power consumption by the current path.

Next, the control method of the input device according to the present invention for achieving the above object comprises a first step of determining whether there is an interrupt of the key; A second step of setting key scan data to a low level and reading a value of an internal bus when there is an interrupt of the key in the first step; A third step of determining whether the key is kept pressed after performing the second step; A fourth step of, if the key is kept pressed in the third step, setting key scan data to a high level, performing a process corresponding to a key input, and then jumping to the first step; And a fifth step of setting key scan data to a high level and jumping to the first step if the key is not pressed in the third step.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a circuit diagram of an input device according to an embodiment of the present invention, and FIG. 4 is a flowchart showing a control routine for driving the input device of FIG.

First, the configuration of an input device according to an embodiment of the present invention will be described with reference to FIG.

As shown in FIG. 3, the input device according to the embodiment of the present invention is a flip-flop (PMOS transistor P2 whose gate is ground), a key scan data is input to the data input terminal, and a key scan clock is input to the clock terminal. FF and a switch SW2 having two terminals connected between the drain of the PMOS transistor P2 and the output terminal of the flip-flop FF. A source voltage VCC is applied to the source of the PMOS transistor P2, and the potential of the contact between the drain of the PMOS transistor P2 and the switch SW2 is provided to an internal bus of the system.

When power is applied to start the operation of the circuit, the power supply voltage VCC is applied to the source of the PMOS transistor P2, and key scan data and key scan clock are input to the flip-flop FF. The PMOS transistor P2 provides a power supply for recognizing the state of the switch SW2, and the flip-flop FF is a D-type flip-flop, and a latch for transferring data from an input terminal to an output terminal according to a clock signal. latch).

Since the gate-source voltage of the PMOS transistor P2 is reverse biased, the PMOS transistor P2 is turned on. Therefore, when the switch SW2 is in the OFF state, a high level potential is provided to the internal bus. The key scan clock is a reference signal for operating the flip-flop FF, and the key scan data is initially set at high level. If the key scan data is high level, the high level potential is provided to the internal bus even when the switch SW2 is turned on.

When the switch SW2 is in an ON state, an interrupt occurs in the control unit by internal interrupt logic of the system, and the control unit sets the key scan data to a low level. When the low level is applied to the switch SW2 by the flip-flop FF while the switch SW2 is ON, the current path constituted by the PMOS transistor P2-the switch SW2-the flip-flop FF. Is formed, and a low level potential is provided to the internal bus. Thus, the system can recognize that the switch SW2 is turned on through the low level potential of the internal bus.

After the turn-on state of the switch SW2 is recognized, the key scan data is set to high level. When a high level is applied to the switch SW2 by the flip-flop FF, the current path is removed and no more power consumption occurs. In addition, the internal bus provides a high level. Therefore, no power consumption occurs even if the user keeps pushing the switch SW2.

Next, a method of controlling the key input device according to the present invention will be described with reference to FIG. 4.

When the operation is started (S1), the control routine of the program stored in the control unit of the system is performed (S2).

First, it is determined whether there is a key interrupt generated by the user pressing the switch SW2 (S3). If there is no key interrupt in step S3, this is repeated until a key interrupt occurs, and if there is a key interrupt, the key scan data is set to low level ('0') (S4). In addition, the value of the internal bus is read (S5).

Next, it is determined whether a key is pressed from the value read from the internal bus (S6). For example, when a high level is read from the internal bus, it is determined that the key is not pressed, and when a low level is read, the key is determined to be pressed.

If it is determined in step S6 that the key has not been pressed, the key scan data is set to a high level '1' (S9), jumps to step S3, and repeats the subsequent operation.

If it is determined in step S6 that the key is pressed, the key scan data is set to a high level '1' (S7), and a predetermined processing operation corresponding to the key input is performed (S8). When the processing operation in this step S8 is completed, the jump to the previous step S3 is repeated and the subsequent operation is repeated.

Therefore, whether the key is pressed or not is recognized in the state where the key scan data is set to the low level, and after recognizing the state of the key, the key scan data is set to the high level. By this set operation, the current path by the low-level key scan data is removed while the key is pressed, and power consumption can be reduced.

As described above, the present invention provides a key input device and a method of controlling the same, which can significantly reduce power consumption compared to the prior art by controlling to remove the current path even after the switch is pressed after recognizing the ON state of the switch. To provide.

Claims (4)

A switch turned on or off by a user's pressing operation; A power supply means connected to one terminal of the switch to supply power for recognizing a switching state; And a flip-flop connected to the other terminal of the switch and providing key scan data to the other terminal of the switch, wherein a switching state is recognized through a potential of a contact point between the switch and the power supply means, and the key The scan data is initially at a high level and falls to a low level when the switch is turned on so that recognition of the switching state is made, and then set again to a high level when the recognition is completed. The key input device according to claim 1, wherein the power supply means is a PMOS transistor having a power supply voltage applied to a source, a gate being ground, and a drain connected to one terminal of the switch. The key input device with a power saving function according to claim 2, wherein the flip-flop is a D-type flip-flop for providing the key scan data to the switch in accordance with a predetermined clock signal. Determining whether there is an interrupt of the key; A second step of setting key scan data to a low level and reading a value of an internal bus when there is an interrupt of the key in the first step; A third step of determining whether the key is kept pressed after performing the second step; A fourth step of, if the key is kept pressed in the third step, setting key scan data to a high level, performing a process corresponding to a key input, and then jumping to the first step; And a fifth step of setting key scan data to a high level and jumping to the first step when the key is not pressed in the third step.