KR19980023271A - Scrambling and descrambling device for horizontal synchronization signal section of broadcasting signal - Google Patents

Abstract

According to the present invention, scrambling and descrambling of a horizontal synchronization signal section of a broadcast signal, which enables the user who is not permitted to watch, to illegally watch a broadcast program, in a pay channel broadcasting system. Relates to a device.

In the present invention, a reference clock having a frequency corresponding to an integer multiple of the horizontal synchronous signal is generated based on the horizontal synchronous signal of the composite video signal, and counted using a counter to generate a pulse corresponding to the horizontal synchronous signal section of the video signal. Will generate a signal. Then, for example, a ground level pulse signal is added as a scrambling pulse to a section corresponding to the pulse signal, and a voltage signal having a predetermined level is added to the composite video signal to which the scrambling pulse is added.

Therefore, in a television receiver or the like which is not equipped with a device capable of descrambling the scrambling pulses, the synchronization screen is caused by the scrambling pulses inserted at the transmitting side, so that the video screen cannot be viewed.

Description

Scrambling and descrambling device for horizontal synchronization signal section of broadcasting signal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a paid channel broadcasting system. In particular, scrambling and descrambling of a horizontal synchronization signal section of a broadcast signal to prevent an unauthorized user from watching a broadcast program illegally. ) Relates to the device.

At present, as the society is advanced, professional channel broadcasting, which provides only a certain kind of programs such as movies and sports, is being implemented in the broadcasting system, and in such a broadcasting system, only specific customers or members have their own broadcasting. The broadcast signal is scrambled and transmitted so that the program can be viewed.

In such a method or apparatus for scrambling a broadcast signal, in most cases, the broadcast signal is digitally converted and then the broadcast signal is sequentially reversed using various interleaving techniques, or a specific portion of the video signal of the broadcast signal is changed. For example, many methods of mixing separate code data such as PN (Pseudo Noise) codes or pseudo noise signals are employed.

However, in the above scrambling method, the configuration of an apparatus for performing scrambling becomes complicated, and the configuration of a descrambling apparatus for restoring the scrambled broadcast signal back to the original broadcast signal is complicated. There is a problem that the burden of the viewer according to the installation becomes very large.

Accordingly, the present invention has been made in view of the above-mentioned circumstances, and the horizontal synchronous signal section of a broadcast signal capable of performing scrambling and broadcasting on a horizontal synchronous signal section of a video signal with a relatively simple configuration, and descrambled on the television receiver side It is an object of the present invention to provide a scrambling and descrambling apparatus.

1 is a waveform diagram showing a video signal of one horizontal scanning period for explaining the basic concept of the present invention.

2 is a block diagram illustrating a scrambling apparatus for a horizontal synchronization signal section of a broadcast signal according to an embodiment of the present invention.

3 is a circuit diagram showing the configuration of a vertical blanking signal generation unit in FIG.

4 is a signal waveform diagram for explaining the operation of the apparatus shown in FIG.

FIG. 5 is a circuit diagram showing the configuration of a reference clock generator and a scrambling pulse generator in FIG. 2; FIG.

6 is a signal waveform diagram for explaining the operation of the configuration shown in FIG.

7 is a block diagram showing the configuration of a descrambling apparatus for a horizontal synchronization signal section of a broadcast signal according to an embodiment of the present invention;

* Explanation of symbols for main parts of the drawings

21: Sync separation unit 22: Vertical blanking signal generation unit

23: horizontal synchronous separator 24: reference clock generator

25: scrambling pulse generation unit 26: switching unit

27 modulator 31: integrated circuit

32: comparison circuit 33: monostable multivibrator

71: synchronization separator 72: vertical blanking signal generator

73: horizontal synchronous separator 74: reference clock generator

75: descrambling pulse generation unit 76: switching unit

242: voltage controlled oscillator

A scrambling apparatus for a horizontal synchronous signal section of a broadcast signal different from the first aspect of the present invention for realizing the above object comprises a horizontal synchronous separation means for separating a horizontal synchronous signal from a composite video signal, and predetermined based on the horizontal synchronous signal. Reference clock generating means for generating a reference clock having a frequency of; scrambling pulse generating means for generating a pulse signal corresponding to the front porch section of the video signal by counting the reference clock on the basis of the horizontal synchronization signal; Switching means having a first switching position coupled to the signal and the second switching position coupled to the ground level, and switching to the first or second switching position based on the scrambling pulse, and outputted from the switching means And modulating means for modulating and outputting the signal.

In addition, the descrambling apparatus for a horizontal synchronization signal section of a broadcast signal according to a second aspect of the present invention is a broadcast system in which a scrambling pulse of ground level is inserted into a front porch section of a broadcast signal and transmitted from a composite video signal. Horizontal synchronous separation means for separating a horizontal synchronous signal, reference clock generating means for generating a reference clock having a predetermined frequency based on the horizontal synchronous signal, and counting the reference clock based on the horizontal synchronous signal to broadcast signals. Descrambling pulse generating means for generating a descrambling pulse of a section corresponding to the added scrambling pulse, voltage generating means for generating a predetermined DC voltage, and voltage output from the voltage generating means corresponding to the descrambling pulse. It comprises a switching means for inputting to the composite video signal It is characterized by.

According to the present invention having the above-described configuration, a reference clock having a frequency corresponding to an integer multiple of the horizontal synchronous signal based on the horizontal synchronous signal of the composite video signal is generated, and the counter is counted using a counter to synchronize the horizontal signal of the video signal. The corresponding pulse signal is generated in the signal section. Then, for example, a ground level pulse signal is added as a scrambling pulse to a section corresponding to the pulse signal, and a voltage signal having a predetermined level is added to the composite video signal to which the scrambling pulse is added.

Therefore, in a television receiver or the like which is not equipped with a device capable of descrambling the scrambling pulses, the synchronization screen is caused by the scrambling pulses inserted at the transmitting side, so that the video screen cannot be viewed.

Hereinafter, an embodiment according to the present invention will be described with reference to the drawings.

First, the basic concept of the present invention will be described with reference to FIG.

Fig. 1 is a waveform diagram showing an image signal of one horizontal scanning period 1H, which is composed of a horizontal synchronous pulse, a color burst signal, and an image signal. The front portion of the horizontal synchronous pulse, that is, the rear portion of the video signal, is called a front porch, and the rear portion of the horizontal synchronous pulse, that is, the front portion of the video signal, is called a back porch. And the back porch section are combined to form a horizontal blanking period.

In addition, the horizontal synchronous pulse has a length of 5㎲, the front porch is 1.3㎲, the back porch is 4.5㎲.

A color burst signal is carried on the back porch portion, and the color burst signal section and the video signal section are generally used as a reference level of the video signal as a pedestal level.

The present invention is to scramble a desired broadcast signal by inserting a ground level pulse signal, that is, a scrambling pulse, in the horizontal synchronization signal section as indicated by a dotted line in FIG.

That is, when the pulse signal of the ground level is inserted into the horizontal synchronous signal section of the video signal as described above, two horizontal synchronous pulses are first detected on the receiving side in the horizontal scanning period, thereby providing a CRT (Cathode-ray Tube). The horizontal synchronization of the image signal scanned on the image is collapsed, so that an image screen which cannot be recognized by the viewer is output.

Therefore, it becomes impossible for a viewer to watch a broadcast screen without providing a separate descrambling device.

FIG. 2 is a block diagram illustrating a scrambling apparatus for a horizontal synchronous signal section of a broadcast signal according to an embodiment of the present invention, which realizes the basic concept of the present invention. FIG. 4 is an operation waveform of the apparatus shown in FIG. It is also.

In FIG. 2, reference numeral 21 denotes a synchronization separator which separates a synchronization signal from the composite video signal of FIG. 4A, which has a predetermined slice level for the composite video signal as indicated by a dotted line in FIG. By performing the synchronization signal detection, the synchronization signal as shown in Fig. 4B is separated and output.

In the drawing, reference numeral 22 denotes a vertical blanking signal generator for generating and outputting a vertical blanking signal from the synchronous signal [FIG. 4 (B)] output from the synchronous separator 21, as shown in FIG. The integrating circuit 31 for integrating the synchronizing signal output from the synchronizing separator 21 and the signal level output from the integrating circuit 31 are compared with predetermined reference voltages set by the resistors R2 and R3. And a monostable multivibrator for generating and outputting a vertical blanking signal based on the vertical synchronous detection signal output from the comparison circuit 32 and a vertical synchronous detection signal corresponding to the vertical synchronous pulse section. It is comprised including 33.

That is, as can be seen from Fig. 4B, the vertical synchronization pulse is generally set to have a lower duty ratio than the pulses of other signal sections. Therefore, when the output signal of the synchronous separator 21 is integrated into the integrating circuit 31 of FIG. 3, the integrated value in the vertical synchronous pulse section is lower than that of the other sections as shown in FIG. When the reference voltages of the resistors R2 and R3 are input to the comparator 321 having the level indicated by a dotted line in Fig. 4C, the pulse width corresponding to the vertical synchronous pulse interval is shown in Fig. 4D. The signal will be output.

On the other hand, when the pulse signal applied to the input terminal A1 rises to the high level, the monostable multivibrator 33 raises its output Q to the high level, and then to the capacitor C2 and the resistor R4. If a high level signal is not inputted through the input terminal A1 for a predetermined time by the time constant set by the output, the output is lowered to a low level.

Therefore, when the time constant value of the monostable multivibrator 33 is set to T in Fig. 4F, the output ( ) Is a signal corresponding to the vertical blanking section as shown in FIG.

In addition, reference numeral 23 in FIG. 2 denotes a horizontal synchronous separator that separates the horizontal synchronous as shown in FIG. 4 (F) from the signal of FIG. 4 (B) output from the synchronous separator 21. It consists of a Malt Vibrator.

Further, reference numeral 24 denotes a reference clock generator which generates and outputs 910f _H , which is, for example, a 910 divided signal of the horizontal synchronization frequency f _H , from the horizontal synchronization signal output from the horizontal synchronization separator 23. Based on the reference clock output from the reference clock generator 24, the vertical blanking signal output from the vertical blanking signal generator 22, and the horizontal synchronization signal output from the horizontal synchronization separator 23, The scrambling pulse generator generates a signal for adding a scrambling pulse.

FIG. 5 is a configuration diagram showing the configuration of the reference clock generator 24 and the scrambling pulse generator 25, which will be described with reference to the operation timing diagram shown in FIG.

In FIG. 5, the reference clock generator 24 compares the phase difference between the horizontal synchronization signal and the frequency signal applied by the frequency divider 244 to be described later, and outputs a voltage signal corresponding to the phase difference. (Phase Locked Loop) circuit 241, a voltage controlled oscillator 242 for outputting a predetermined frequency signal in accordance with the voltage signal output from the PLL circuit 241, and a frequency signal output from the voltage controlled oscillator 242 And a divider 244 for dividing the frequency signal outputted from the clock buffer 243 by (1/910).

That is, in the above configuration, a voltage signal corresponding to the phase difference between the output signal of the (1/910) frequency divider 244 and the horizontal synchronization signal is applied to the voltage controlled oscillator 242 so that the output frequency of the voltage controlled oscillator 242 is increased. The output frequency signal of the voltage controlled oscillator 242 is divided through the divider 244 and inputted to the PLL circuit 241 again.

Therefore, the horizontal synchronizing signal and the output signal of the divider 244 are adjusted so that their frequencies are the same, and when the frequency of the horizontal synchronizing signal is 15.734 KHz, the signal frequency output from the voltage controlled oscillator 242 is 14.318. M ㎐ (910 x 15.734 K ㎐), and this frequency signal is output as a reference clock.

On the other hand, the coding section pulse generator 25 and the first and second counters (251, 252) and down counting a predetermined coefficient value based on the reference clock (G) output from the reference clock generator 24; And an AND gate AND1 for performing an AND operation on the outputs of the counters 251 and 252 and the vertical blanking signal applied by the vertical blanking signal generator 22.

Here, the first counter 251 executes down counting at the rising edge of the reference clock using the number of reference clocks G corresponding to the section T1 of FIG. The level detection signal is output. In addition, the second counter 252 executes down counting at the rising edge of the reference clock using the number of reference clocks G corresponding to the section T2 of FIG. The level detection signal is output. The first and second counters 251 and 252 are cleared at the falling edge of the horizontal synchronization signal F to perform the counting operation again. The output of the first counter 251 is shown in FIG. 6 (H) and the output of the second counter 252 is shown in FIG. 6 (I).

Subsequently, the output of the first counter 251 and the inverted output of the second counter 252 are logically multiplied by the AND gate AND1 to correspond to the scrambling pulse additional section as shown in FIG. 6J in the AND gate AND1. The pulse signal to be outputted.

In addition, a vertical blanking signal E is input here as one input of the AND gate AND1, which is normally applied to a vertical blanking section to which text multi-broadcast data is added, in particular, 10H to 21H section (see FIG. 4). This is to prevent the data from being corrupted by adding a scrambling pulse.

In FIG. 2, reference numeral 26 denotes a switching unit that is switched according to the scrambling pulses output from the scrambling pulse generator 25, and 27 denotes a modulation unit that modulates the composite video signal output from the switching unit 26; 28 denotes an antenna for transmitting a broadcast signal to an over-the-air transmission network, wherein the switching unit 26 modulates the composite video signal when the scrambling pulse output from the scrambling pulse generating unit 25 is at a low level. When the scrambling pulse is at a high level, the signal is switched to the ground side to insert a low level pulse signal substantially in a predetermined section of the composite video signal as shown in FIG.

That is, in the scrambling apparatus of the broadcast signal having the above-described configuration, the horizontal synchronous signal is separated from the composite video signal, and then a reference clock having a frequency corresponding to N times (910 times in the above example) of the horizontal synchronous signal is based on this. Will generate a signal.

The scrambling pulse signal corresponding to the horizontal synchronization signal section of the composite video signal is generated by a method of counting the reference clock based on the horizontal synchronization pulse, and a low level is applied to the composite video signal based on the pulse signal. By adding the pulse signal of FIG. 6, the broadcast signal is scrambled as shown in FIG.

On the other hand, Figure 7 is a block diagram showing a descrambling apparatus for descrambling the broadcast signal scrambled and transmitted according to the above method.

In Fig. 7, reference numeral 71 denotes a synchronization separator for separating the synchronization signal as shown in Fig. 4B from the detected composite video signal, and 72 denotes a synchronization signal B output from this synchronization separator 71. The vertical blanking signal generator for generating and outputting a vertical blanking signal E corresponding to the horizontal synchronous pulse period of the vertical blanking section, 73 is a horizontal synchronous signal (B) from the synchronous signal B output from the synchronous separator 71; A horizontal synchronous separation section for separating and outputting F), 74 is an integer multiple of the horizontal synchronous signal F based on the horizontal synchronous signal F output from the horizontal synchronous separation section 73 (910 times in this example). A reference clock generator for generating and outputting a frequency signal corresponding to the reference clock, 75 is added to the back porch section of the composite video signal based on the vertical blanking signal (E), the horizontal synchronization signal (F) and the reference clock. Corresponds to the signal section of the scrambling pulse Is a descrambling pulse generator for generating a descrambling pulse, these circuit portions is the structure and circuit configuration and operation of the Figure 2 described above is substantially the same.

In the drawings, reference numeral C3 denotes a coupling capacitor. In addition, reference numeral 76 denotes a switching unit which is switched according to the descrambling pulse output from the descrambling pulse generating unit 75, which is a first switching position a coupled to the coupling capacitor C3 and a predetermined value. A second switching position (b) coupled to a direct current voltage (Va), the first switching position (a) when the descrambling pulse is at a low level, and the second switching position when the descrambling pulse is at a high level. switching to (b). Here, the DC voltage Va is set to a value equal to the pedestal level of the composite video signal.

In other words, as described above, the scrambling pulse is added to the horizontal sync signal section of the video signal at the transmitting side, and when the video signal is detected at the receiving side with the scrambling pulse added, the sync signal collapses. As the video screen is disturbed, the video screen output to the CRT becomes invisible.

Therefore, the switching unit 76 is switched to the second switching position corresponding to the descrambling pulse output from the descrambling pulse generator 75 to remove the scrambling pulse.

That is, in the above configuration, after the synchronization signal is separated from the composite video signal, a reference clock signal having a frequency corresponding to N times (910 times in the above example) of the horizontal synchronization signal is generated.

The descrambling pulse corresponding to the scrambling pulse section of the horizontal synchronous signal section of the composite video signal is generated in a method of counting the reference clock based on the horizontal synchronous pulse, and during the section corresponding to the pulse signal. By inserting a predetermined level signal to the composite video signal, the scrambling pulses added to the video signal are removed.

Therefore, according to the above embodiment, effective scrambling and descrambling can be executed with a simple configuration.

In addition, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the technical scope of the present invention.

As described above, according to the present invention, a scrambling and descrambling apparatus for a horizontal synchronization signal section of a broadcast signal capable of performing scrambling and descrambling of a broadcast signal with a relatively simple configuration can be realized.

Claims (4)

Horizontal synchronous separation means for separating a horizontal synchronous signal from the composite video signal; Reference clock generating means for generating a reference clock having a predetermined frequency based on the horizontal synchronization signal; Scrambling pulse generating means for counting the reference clock on the basis of the horizontal synchronization signal and generating a pulse signal corresponding to a horizontal synchronization signal section of an image signal; A switching means having a first switching position coupled to the composite video signal to be transmitted and a second switching position coupled to the ground level, and switching to the first or second switching position based on the scrambling pulse; And a modulating means for modulating and outputting a signal output from the switching means. The method of claim 1, The scrambling pulse generating means includes a first counter for outputting a first detection signal indicating a start point of a pulse section, a second counter for outputting a second detection signal indicating an end point of a pulse section, and the first and second counters. And a logical multiplication means for logically multiplying the output of the counter. A broadcasting system in which a scrambling pulse of a ground level is inserted and transmitted in a horizontal synchronization signal section of a broadcasting signal, Horizontal synchronous separation means for separating a horizontal synchronous signal from the composite video signal; Reference clock generating means for generating a reference clock having a predetermined frequency based on the horizontal synchronization signal; Descrambling pulse generating means for counting the reference clock based on the horizontal synchronization signal and generating descrambling pulses corresponding to the scrambling pulses added to the broadcast signal; Voltage generating means for generating a predetermined DC voltage, And switching means for inputting the voltage output from the voltage generating means to the composite video signal in response to the descrambling pulse. The method of claim 3, wherein The descrambling pulse generating means includes a first counter for outputting a first detection signal indicating a start point of a pulse section, a second counter for outputting a second detection signal indicating an end point of a pulse section, and the first and second counters. And a logical multiplying means for logically multiplying the outputs of the two counters.