KR19980020236A - Method of manufacturing thin film transistor - Google Patents

Abstract

One of the problems in manufacturing a liquid crystal display device, which is in the spotlight as a next generation display device, is that the production yield of the thin film transistor is low. The reason why the manufacturing yield of the thin film transistor is low is that there are a lot of mask processes when manufacturing the thin film transistor. Therefore, the less the mask process, the higher the production yield of the thin film transistor.

According to the present invention, in manufacturing the thin film transistor used in a liquid crystal display, a method of simultaneously patterning a light blocking film protecting a thin film transistor and a pixel electrode applying a voltage to the liquid crystal and etching the semiconductor layer to simultaneously form an impurity semiconductor layer As a result, a manufacturing method capable of reducing the number of mask processes of the thin film transistor is illustrated, and the structure of the thin film transistor manufactured by the manufacturing method is illustrated.

Description

Method of manufacturing thin film transistor

1 is a plan view illustrating a thin film transistor substrate of a liquid crystal display device.

2 is a cross-sectional view illustrating a pixel part of a liquid crystal display device.

3 is a cross-sectional view illustrating a process of fabricating a conventional thin film transistor substrate used in a liquid crystal display.

4 is a cross-sectional view illustrating a process of manufacturing a thin film transistor substrate of the present invention used in a liquid crystal display device.

* Description of the symbols for the main parts of the drawings *

11: gate scan line 12: signal line

13 pixel electrode 14 thin film transistor

21 common electrode 22 liquid crystal

31 substrate 32 light shielding film (metal)

33 drain electrode 34 source electrode

35 impurity semiconductor layer 36 metal layer for resistance reduction

37: first insulating film 38: gate electrode (metal)

39: semiconductor channel layer 40: gate insulating film

101: substrate 102: ITO

103: metal 104: first insulating film

105: source electrode 106: impurity semiconductor layer

107: semiconductor channel layer 108: second insulating film

109: gate electrode 110: drain electrode

Detailed description of the invention

[Purpose of invention]

It is an object of the present invention to manufacture a thin film transistor substrate for use in a liquid crystal display device, and to manufacture a substrate of low resistance wiring without increasing the number of masks in the prior art.

[Technical Field to which the Invention belongs and Prior Art in the Field]

CRT CRT, which is the most widely used display device, has been spotlighted as a display device including TV and computer monitor because of its easy color and fast operation speed. However, the CRT CRT has a disadvantage in that it is not only thick, due to the structural characteristics of securing a certain distance between the electron gun and the screen, but also has a large power consumption, and is also very heavy in weight, resulting in poor portability.

In order to overcome the disadvantages of the CRT CRT described above, a variety of display devices have been devised, the most practical of which is a liquid crystal display device.

LCD displays have a darker screen and somewhat slower operating speeds than CRT CRTs.However, even without a device such as an electron gun, each pixel can be operated according to the signal scanned on the same plane. Ultra-thin displays such as wall-mounted TVs can also be used. In addition, the liquid crystal display device has a reputation for being the most suitable as a portable display device, such as being used as a display of a battery-operated notebook computer because it is light in weight and consumes significantly less than a CRT CRT.

As described above, the liquid crystal display device, which is in the spotlight as a next generation display device, is provided with a plurality of scan lines 11 and a plurality of signal lines 12 intersecting in a matrix form on a substrate, as shown in FIG. (14) (hereinafter TFT) and a pixel are provided. As shown in Fig. 2, the pixel includes a pixel electrode 13 extending from the source electrode of the TFT, a common electrode 21 provided to face the pixel electrode, and a liquid crystal 22 between the pixel electrode and the common electrode. ) Is injected structure.

The TFT includes a gate electrode 38 branched from a scan line, a drain electrode 33 branched from a signal line, a source electrode 34 connected to a pixel electrode, and a semiconductor layer 39 formed between the drain electrode and the source electrode. It is composed of a structure. When the voltage is applied to the gate electrode through the scan line, the TFT operates on the principle that the data voltage flowing through the signal line is applied to the pixel electrode through the semiconductor layer between the drain electrode and the source electrode.

However, in the above-described TFT, malfunction of the pixel may occur due to photoelectrons generated by external light. Therefore, the light shielding film 32 is often formed in the board | substrate of the part in which TFT was formed in the suitable pattern, such as a matrix form, so that TFT may be protected from an external light source.

In order to manufacture such TFTs, the following processes have been conventionally performed.

First, a metal is deposited on the substrate 31 and a light shielding film 32 is formed through a mask process. After blocking the TFT substrate, the light shielding film blocks light flowing from the outside to prevent malfunction of the TFT generated by the flow of the photocurrent or the thermal current (FIG. 3A).

After the light shielding film is formed in the process, a first insulating film 37 is deposited on the entire surface of the substrate to cover the light blocking film, and ITO (Indium Tin Oxide) is deposited on the first insulating film. The source 34 and the drain electrode 33 are formed by patterning the ITO deposited on the first insulating layer. At this time, the source electrode and the pixel electrode 13 are simultaneously formed by extending ITO corresponding to the source electrode (FIG. 3B).

After the above process, n + amorphous silicon (hereinafter n + a-Si) is deposited and an impurity semiconductor layer 35 is formed using the same mask as that of the source and drain electrodes (FIG. 3C).

During the process, after the completion of the drain electrode or the completion of the impurity semiconductor layer, the metal layer 36 for reducing the resistance of the data wiring is separately patterned (FIG. 3D). This is because ITO has a higher resistance than metal and may cause signal delay when the LCD is operated. The reason for forming the wiring with ITO is to improve the light transmittance of the liquid crystal display device. However, as described above, since ITO has a higher resistance than metal, it is preferable to form a metal additional to the drain wiring when manufacturing a large panel.

After formation of the impurity semiconductor layer, a-Si is deposited and patterned thereon to form a semiconductor panel layer 39 (FIG. 3E).

After the above process, the gate insulating film 40 such as SiNx and the like are continuously deposited and the metal is patterned into a predetermined shape to form the gate electrode 38 (FIG. 3F). Although not shown in the drawing, the gate insulating film is patterned to expose the pad portion extending from the drain electrode, thereby completing the TFT substrate.

[Technical problem to be achieved]

In the TFT substrate, ITO, which forms the data wiring, the drain electrode, and the source electrode, has a much higher resistance than metal. Therefore, the liquid crystal panel made of the TFT is very likely to delay the signal voltage flowing to the data wiring when driven. Therefore, a resistive material such as metal is preferably used for the data wiring, the drain electrode, and the source electrode.

However, even if a low-resistance metal is employed in the drain electrode, the source electrode and the data wiring of the TFT, the pixel electrode must be formed of ITO, so that the number of masks in the TFT manufacturing process increases.

In manufacturing the TFT substrate, a mask process or a patterning process, which is necessarily performed, is performed in the following steps.

A thin film material is first deposited, a photoresist is applied to the entire surface of the thin film material, and then covered with a mask on which the desired pattern is drawn. When the ultraviolet ray is exposed to the mask-covered substrate, the molecular structure is changed between the photoresist of the portion covered by the mask and the photoresist of the portion not covered.

When the development step after the exposure step is performed, the photoresist of the part covered by the mask may be removed or the photoresist of the part not covered by the mask may be removed depending on the kind of the applied photoresist. At this time, the photoresist in which the part covered by the mask is removed is called a negative photoresist, and the photoresist in which the part not covered by the mask is removed is called a positive photoresist.

After the shape process, after the etching step, the photoresist is removed due to the process, and thus the thin film material of the exposed portion is etched. When the photoresist is removed, one mask process is completed.

As described above, since the mask process undergoes a considerable complexity, the more the mask process, the lower the TFT manufacturing yield, and the lower the mask process, the higher the manufacturing yield of the TFT. In other words, the patterning process significantly affects the production yield of TFTs.

An object of the present invention is to manufacture a substrate having low resistivity of a substrate by using a metal for wiring without increasing the number of mask processes in the conventional process.

[Configuration and Function of Invention]

The TFT manufacturing method of the present invention is shown in FIG.

Example 1

After depositing a metal 103 such as ITO 102 and chromium (Cr) on the substrate 101 in sequence, a light shielding film and a pixel are simultaneously formed with one mask (FIG. 4A). Alternatively, ITO may be deposited and patterned first to form a light shielding film and pixels, and then metal may be deposited and patterned with the same mask as the previously patterned ITO to stack the light shielding film and pixels in two layers.

After the process, the first insulating film 104 is deposited and patterned so as to apply the light shielding film, but not to cover the pixel. At this time, the metal stacked on the pixel is etched together to form a pixel electrode by exposing ITO, which corresponds to the pixel and is deposited on the substrate (FIG. 4B).

Then, metal and n + amorphous silicon (hereinafter n + a-Si) are continuously deposited to form the source electrode 105, the drain electrode 110 and the impurity semiconductor layer 106 simultaneously with one mask (FIG. 4C). When forming the source electrode, the drain electrode and the impurity semiconductor layer, metal is first deposited and patterned to form a source electrode and a drain electrode first, and then n + a-Si is deposited and the same mask as the source electrode and the drain electrode is used. The impurity semiconductor layer may be formed by patterning.

After the above process, the amorphous silicon (hereinafter referred to as a-Si), the second insulating film, and the gate electrode are successively deposited and etched with the same mask to form the semiconductor channel layer 107, the gate insulating film 108, and the gate electrode 109. To form (FIG. 4D). At this time, it is etched in the same shape as the impurity semiconductor layer semiconductor layer on a source and a drain. At this time, sometimes the a-Si is deposited and patterned into a predetermined shape to etch a-Si and a part of the impurity semiconductor layer to form a semiconductor channel layer first, and then a second insulating film is deposited on the semiconductor channel layer. The gate insulating layer may be formed by patterning the same mask as the semiconductor channel layer, and the gate electrode may be formed by depositing and patterning a metal thereon.

After the above steps, the TFT substrate used in the liquid crystal display device is completed.

[Effects of the Invention]

According to the present invention, since the light blocking film and the pixel electrode are formed in one mask, and the impurity semiconductor layer is formed in the process of patterning the source electrode and the drain electrode and in the process of forming the semiconductor channel layer, there is an effect of reducing at least one mask process.

In addition, the TFT of the present invention has a lower resistivity of the substrate than a conventional TFT employing ITO for the data wiring, the drain electrode, and the source electrode because the data wiring, the drain electrode, and the source electrode are made of metal. Therefore, the delay of signal low voltage appearing in the TFT substrate is reduced as compared with the conventional TFT substrate. In addition, the aperture ratio of the liquid crystal display device can be increased by narrowing the data wiring to widen the pixel electrode.

In other words, according to the manufacturing method of the present invention, the resistive TFT substrate can be manufactured without increasing the number of mask steps as compared with manufacturing a substrate having wiring of ITO.

Claims (4)

Substrate; A light shielding film formed by stacking a transparent conductive film and a metal in two layers on a portion of the substrate; A pixel electrode formed on the pixel electrode in the same layer as the light shielding film; A first insulating layer covering a portion of the pixel electrode and the light blocking layer; A drain electrode patterned in a predetermined shape on one step portion of the first insulating film covering the light blocking film; A source electrode formed at a predetermined distance from the drain electrode and over a portion of one step of the first insulating film covering the light blocking film and a part of the pixel electrode where the transparent conductive film is exposed; An impurity semiconductor layer formed on a portion of the source electrode and the drain electrode, respectively; A semiconductor layer stacked on the first insulating film at the center of the light shielding film and on the impurity semiconductor layer; A thin film transistor having a gate insulating layer and a gate electrode stacked on the semiconductor layer with the same mask as the semiconductor layer. The thin film transistor according to claim 1, wherein ITO is employed as the transparent conductive film. Continuously depositing a first metal and a transparent conductive film on the substrate to form a light shielding film and a pixel electrode with the same mask; Applying and etching a first insulating film to remove a portion of the first metal deposited on the pixel electrode; Sequentially depositing a second metal and an impurity semiconductor on the first insulating film to sequentially form a source electrode, a drain electrode, and an impurity semiconductor layer using the same mask; Continuously depositing a semiconductor, a second insulating film, and a third metal on the impurity semiconductor layer; Forming a semiconductor layer, a gate insulating film, and a gate electrode by nicking the semiconductor, the second insulating film, and the third metal with the same mask. The method of claim 3, wherein a part of the impurity semiconductor on the source electrode and the drain electrode is simultaneously etched when the semiconductor layer is formed.