KR19980015793A - Synchronization Method of Viterbi Decoder - Google Patents

Abstract

The present invention relates to a synchronization method of a Viterbi decoder, comprising: (S1) starting synchronization at a 5/6 rate; Obtaining a channel bit error rate for the current setting (S2); Comparing the channel bit error rate with a high / low threshold value only when the power is turned on or a channel is changed, and if the channel bit error rate is low, indicating a high rate; Comparing the channel bit error rate with a threshold value, and completing the synchronization if the channel bit error rate is small (S4); Comparing the rate double value with a rate count value if the channel bit error rate is large as a result of the comparison; Changing a code rate according to information informing the high rate or the low rate, or changing a code rate when the rate count value is large (S6); And a step (S7) of changing a phase or a pattern when the rate count value is small as a result of the comparison. According to the present invention, in a case where a puncturing scheme is used in a transmitter in consideration of the efficiency of a transmission band, By performing synchronization using the characteristics of the channel environment and the puncture pattern when the recipient performs the reciprocal, the synchronization can be performed more quickly and efficiently.

Description

Synchronization Method of Viterbi Decoder

The present invention relates to a synchronization method of a Viterbi decoder and, more particularly, to a synchronization method of a Viterbi decoder, in which puncturing is used in a transmitter in consideration of efficiency of a transmission band, And more particularly, to a synchronization method of a Viterbi decoder for performing synchronization more quickly and efficiently using characteristics of a punctured pattern.

(DVB) standard, satellite broadcasting such as domestic satellite broadcasting, or system standard used in Europe or America's High Definition Television (HDTV) terrestrial broadcasting. In digital communication systems, convolutional encoding is used to correct errors on the communication path.

The decoding of the bit sequence before being encoded by decoding the codeword sequence encoded by the convolutional coding scheme, that is, the reproduction of the message bit sequence, is referred to as convolution decoding.

In the convolutional decoding method, maximum likelihood decoding (MLH) is used. The maximum approximate decoding method is a method in which a maximum likelihood decoding Is decoded.

It is a Viterbi decoding method developed on the basis of the maximum likelihood decoding method. This method greatly reduces the complexity of a maximum likelihood decoding method. In 1967, a Viterbi decoding method was first used to implement a Viterbi decoding algorithm Was developed and analyzed, and an efficient and practical technique for Viterbi decoding was first proposed by Heller.

The Viterbi decoding is a maximum approximate decoding method for forward error correction (FEC) convolutional code. Since it has a high random error correction capability in a communication channel, the Viterbi decoding method is suitable for satellite communication. Is performed by selecting the codeword closest to the codeword received from all the codeword sequences output from the encoder.

That is, the Viterbi decoding algorithm is a kind of dynamic programming that performs maximum approximation decoding using a Trellis diagram. The Viterbi decoding algorithm is a method in which two When the paths meet each other, the path length for these two paths (in the case of hard decision decoding) is compared to select only one path with a short path length, i.e., a low error probability, The long one is erased from the path memory.

The remaining path is called the surviving path. The determination of the maintenance path is performed at each point in time. By deleting the path having a long path length, the complexity of decoding can be avoided and an increase in the storage capacity can be prevented.

On the other hand, in digital satellite broadcasting, a technique of puncturing channel data is used in order to obtain a higher data rate. It has been adopted in various digital transmission systems recently because it can achieve a transmission rate higher than the conventional transmission rate by 20% or more.

For example, when the puncturing technique is used, S ₀ and S ₁ of the R = 3/4 code are 101 and 110, respectively, for example, X (x ₁ , x ₂ , x ₃ ) (X ₁ , x ₃ ) among X, (y ₁ , y ₂ ) are left in Y and the positions of remaining 0 are deleted as in the above pattern when there is data of Y (y ₁ , y ₂ , y ₃ ) by the _{end, B 1 (x 1, y} 1), B 2 (x 2, y 2), B 3 (x 3, y 3) 4 of _{x 1, x 3, y 1} , y 2 3 -bit input of the Only the bits are output, so it becomes 3/4.

The following table 1 is a puncturing method of the European Digital Video Broadcasting (DVB) standard adopted as a standard in most countries of the world. The convolutional coding unit in the current Mugunghwa satellite system is a digital video broadcasting (DVB) The puncturing pattern according to the code rate will be described with reference to Table 1 below.

[Table 1]

Code rate Puncture pattern The transmitted sequence 1/2 X: 1Y: 1 x y 2/3 X: 10Y: 11 x1 y1 y2 3/4 X: 101Y: 110 x1 y1 y2 x3 5/6 X: 10101Y: 11010 x1 y1 y2 x3 y4 x5 7/8 X: 1000101Y: 1111010 x1 y1 y2 y3 y4 x5 y6 x7

Table 1 shows puncturing patterns in the encoder. In the case of the code rate of 3/4 in Table 1, for example, only four data are transmitted among three data of X and Y, / 4 code, and it is necessary to correct the error with performance close to that of receiving the original six data with only four data transmitted from the receiver decoder.

In other words, in the 3/4 code system, it is possible to send only six data, so that it is possible to transmit more data on the same channel.

As described above, if the transmission method uses the puncturing method in order to increase the efficiency of the transmission band, synchronization at the receiving end becomes difficult.

That is, due to the puncturing at the transmitting end, it is necessary to find out which of five or more puncturing rates is used at the receiving end, and even if the puncturing rate to be transmitted is found, when the puncturing pattern of the puncturing pattern is depuncturing, Must fit.

Conventional European or US forward error correction chips (FEC chips) are equipped with automatic depuncturing because they require synchronous synchronization at the receiving end, but they do not operate properly, .

There are five puncture rates (1/2, 2/3, 3/4, 5/6, 7/8) on the basis of the European Digital Video Broadcasting (DVB) standard, There is a corresponding pattern sync. For example, there are seven pattern sync at 7/8 rate and five pattern sync at 5/6 rate.

Since there are five puncture rates as described above and there is a pattern sync corresponding to the molecule of each puncture rate, the automatic perturbing apparatus must know the puncture rate of the currently received data, and the pattern sync I have to find out. In order to determine whether the phase is correct or not, that is, two cases of phase sync must be found in order to synchronize the phases.

However, in a device having an automatic descent function, since the conventional synchronization method finds the threshold rate, the pattern sync and the phase sync using the Try Error method such as the ascending order or the descending order in order to accurately synchronize, Can not.

That is, the pattern sync and the phase sync are started from the case where the puncture rate is first half rate, and when the puncture rate is larger than the threshold value of the established channel bit error rate (CBER) And then the pattern sync and the phase sync in the converted state are examined. Likewise, since the synchronization operation must be performed through trial and error one by one in the order of 3/4, 5/6, 7/8 rate in the same manner as described above, the number of stages to be performed as a whole in order to accurately synchronize 36 steps = 2 * 1 (number of branches in case of 1/2 rate) + 2 * 2 (number of branches in case of 2/3 rate) + 2 * 3 (number of branches in case of 3/4 rate) 2 * 5 (number of branches in case of 5/6 rate) + 2 * 7 (number of branches in case of 7/8 rate)}.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is therefore an object of the present invention to provide an apparatus and a method for decoding a puncturer, And a synchronization method of a Viterbi decoder for performing synchronization more quickly and efficiently by measuring a channel bit error rate (CBER) assuming a 5/6 code rate.

According to another aspect of the present invention, there is provided a method of synchronizing a Viterbi decoder, the method comprising: a first step of starting synchronization with a code rate of 5/6 rate; A second step of obtaining a channel bit error rate for the current setting; It is determined whether or not the channel bit error rate calculated in the second step is smaller or larger than the high / low threshold value only when the power is turned on or the channel is changed. If the channel bit error rate is small, A third step; Comparing whether the channel bit error rate calculated in the second step is less than a threshold value or not, and if the channel bit error rate is less than a threshold value, completing the synchronization; A fifth step of comparing whether the rate count value is smaller than double the value of the rate molecule when the channel bit error rate is larger than the threshold value as a result of the comparison in the fourth step; The code rate is changed according to information informing the high rate or the low rate in the third step or the code rate is changed when the rate count value is larger than the double value of the rate molecule as a result of the comparison in the fifth step, A sixth step of proceeding to the second step; And a seventh step of shifting to the second step after changing the phase or pattern when the rate count value is smaller than the double value of the rate molecule as a result of the comparison in the fifth step.

According to the present invention, synchronization can be performed more quickly and efficiently by measuring the channel bit error rate (CBER) on the assumption that the received signal is a 5/6 code rate among five puncturing patterns in the receiver.

1 is a structural block diagram of a hardware to which a synchronization method of a Viterbi decoder according to the present invention is applied,

FIG. 2 is a flowchart of a synchronization method of a Viterbi decoder according to the present invention;

FIG. 3 is a graph illustrating a relationship between a signal-to-noise ratio and a channel bit error rate according to each puncture rate.

DESCRIPTION OF THE REFERENCE NUMERALS

100 ... phase shifter 102 ... inverted portion

104 ... Viterbi decoding unit 106 ... Bit error counter unit

108 ... Decoded data counting unit 110 ... Decision logic unit

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram of a hardware to which a synchronization method of a Viterbi decoder according to the present invention is applied. The Viterbi decoder synchronization apparatus of the present invention includes a phase converter 100; A transponder section 102; A Viterbi decoding unit 104; A bit error counting unit 106; A decoded data counting unit 108; And a decision logic section 110.

The phase transformer 100 receives the in-phase (I) channel data and the quadrature (Q) channel data and converts the phase.

Depuncturing logic 102 serves to depunct punctured data at the transmitting end.

The Viterbi Decoder core 104 performs Viterbi decoding on the data inverted by the de-interleaver 102.

The bit error count unit 106 compares the decoded data output from the Viterbi decoding unit 104 with the data obtained by convolutional coding and inverted data from the dequantizer unit 102, It serves to count errors.

The decoded data bit count unit 108 counts the bits of the received channel data.

The decision logic 110 decodes the data at 5/6 rate among five puncture rates (1/2, 2/3, 3/4, 5/6, 7/8) from an external microcomputer And a bit error counting signal from the bit error counting unit 106. The bit error counting unit 106 receives the counted number of channel data bits from the decoded data bit counting unit 108, Outputs a phase conversion signal to the phase conversion unit 100, and outputs a pattern conversion signal to the counter unit 102 to change the pattern, and also outputs an internal synchronization signal and an external synchronization signal.

FIG. 2 is a flowchart of a synchronization method of a Viterbi decoder according to the present invention. The synchronization method of the present invention includes: a first step (S1) of starting a synchronization, assuming that a code rate is 5/6 rate; A second step S2 of obtaining a channel bit error rate (CBER) for the current setting; It is determined whether the channel bit error rate (CBER) calculated in the second step S2 is smaller than a high / low threshold value (H / L Threshold) only when the power is turned on or the channel is changed. A third step (S3) of providing, to the next sixth step (S6), information indicating a high rate and a low rate in a large case; A fourth step S4 of comparing whether the channel bit error rate (CBR) calculated in the second step S2 is less than or equal to a threshold value and if the channel bit error rate is less than a threshold value, completing the synchronization; If the channel bit error rate (CBER) is greater than the threshold value in the fourth step (S4), it is determined whether the rate count value is smaller than twice the rate value ); If the code rate is changed in accordance with the information indicating the high rate or the low rate in the third step S3 or if the rate count value is larger than the double value of the rate molecule as a result of the comparison in the fifth step S5, A sixth step (S6) of shifting to the second step (S2) after changing the second step (S6); And the fifth step (S5), if the rate count value is smaller than the two-fold value of the rate molecule, after changing the phase or pattern, the flow proceeds to the second step (S2) And a seventh step (S7).

Hereinafter, the operation and effect of the embodiment of the present invention will be described in detail.

FIG. 3 is a graph showing a relationship between a signal-to-noise ratio (SNR) and a channel bit error rate (CBER) according to each puncture rate, where the X axis represents SNR and the Y axis represents CBER. When the noise ratio is small, the distinction between 5/6 rate and 7/8 rate is not accurate. Therefore, when the signal-to-noise ratio is small, only the low rate and the high rate are distinguished.

As shown in FIG. 3, the H / L Threshold has a channel bit error rate (CBER) of 260.00 * 10 ^-3 to 280.00 * 10 ^-3 , and the high / Here, the high rate refers to the 5/6 rate and the 7/8 rate, and the low rate refers to the half rate, the 2/3 rate and the 3/4 rate.

Referring to FIG. 2, the steps of the present invention will be described with reference to FIGS. 1 and 3. FIG.

When the power is turned on, synchronization is started assuming that the rate is 5/6 of 5 rates in the first step (S1).

In the second step S2, the channel bit error rate (CBER) for the current setting is calculated. At this time, the channel bit error rate (CBER) is calculated by dividing the data obtained by re-encoding the data decoded by the Viterbi decoder 104 Corresponds to the result of comparing the most significant bits of the data inverted by the counterpart 102 (see FIG. 1).

When the power is turned on or the channel is changed, the process goes to the third step (S3).

In the third step S3, the channel bit error rate (CBER), the high bit rates (5/6, 7/8) and the low rates (1/2, 2/3, 3/4) obtained in the second step (S2) (See FIG. 3: 260.00 * 10 ^-3 to 280.00 * 10 ^-3 ) for distinguishing only the high-low threshold value. If the channel bit error rate is smaller than the high / low threshold value as a result of the comparison in the third step S3, it corresponds to the high rate, so that the code rate is changed to 5/6 rate or 7/8 rate in the sixth step S6 And provides high-rate information so that it can be changed. On the other hand, when the channel bit error rate is larger than the high / low threshold value in the third step S3, the code rate is equal to the low rate (experimentally 90% or more) / 2 rate, 2/3 rate or 3/4 rate.

If the information from the third step S3 is high rate, in the sixth step S6, the currently set 5/6 rate is maintained or the code rate is changed at a rate of 7/8, The process branches to step S2. On the other hand, if the information from the third step S3 is low rate, in the sixth step S6, the currently set 5/6 rate is changed to half rate and then again to the second step S2 This is to sequentially perform the three rates of the low rate, that is, 1/2 rate, 2/3 rate, and 3/4 rate.

If the code rate is changed to 7/8 rate in the sixth step S6, the channel bit error rate for the 7/8 rate is calculated again in the second step S2. And if the code rate is changed to 1/2 rate, the channel bit error rate for 1/2 rate is obtained.

In the fourth step S4, the channel bit error rate obtained in the second step S2 is compared with a predetermined threshold value. At this time, the threshold value is an index for determining whether or not synchronization has occurred. The threshold value is determined according to the signal-to-noise ratio (SNR) size, and is a value different from the above-mentioned high / low threshold value (H / L Threshold).

If the channel bit error rate is smaller than the preset threshold value, the synchronization process is completed. In the initial stage of power-on or channel change (when the code rate is set to 5/6 rate) , And if the channel bit error rate obtained in the second step S2 is smaller than a predetermined threshold value, the synchronization is completed without performing the third step S3.

On the other hand, if the channel bit error rate is greater than the preset threshold value as a result of the comparison in the fourth step S4, the process proceeds to the next step S5.

In the fifth step S5, the rate count value and the double value of the currently set rate molecule (for example, 5 * 2 = 10 for 5/6 rate, that is, there are five different pattern syncs, The rate count value is a value for confirming whether or not all the probable steps at each rate have been performed, The count value is determined according to each rate. In case of 5/6 rate, the current rate count value starts from 1 and performs 10 times with changing the phase and pattern one by one to perform all possible synchronization for 5/6 rate.

If the rate count value is larger than the double value of the currently set rate molecule as a result of the comparison in the fifth step S5, the flow goes to the sixth step S6 to change the code rate. On the other hand, if the rate count value is smaller than the double value of the currently set rate molecule as a result of the comparison in the fifth step S5, the process goes to the seventh step S7 to change the phase and the pattern.

After the code rate is changed in the sixth step S6 and the phase and pattern are changed in the seventh step S7, the process goes back to the second step S2 and the above operation is repeated.

As a result, in the present invention, by assuming a 5/6 rate initially and performing synchronization by dividing the high rate (1/2, 2/3, 3/4) and low rate (5/6, 7/8) The number of steps to be performed is significantly reduced when the synchronization is performed in the order of the trial and error methods of 1/2, 2/3, 3/4, 5/6, and 7/8 rates.

As described above, according to the present invention, when the puncturing scheme is used in the transmitter in consideration of the efficiency of the transmission band, synchronization is performed using the characteristics of the channel environment and the puncturing pattern when the reciprocal is performed in the receiver for Viterbi decoding. The synchronization can be performed more quickly and efficiently.

Claims (1)

A first step (S1) of starting a synchronization on the assumption that the code rate is 5/6 rate; A second step (S2) of obtaining a channel bit error rate for the current setting; It is determined whether the channel bit error rate calculated in the second step S2 is smaller or larger than the high / low threshold value only when the power is turned on or the channel is changed. If the channel bit error rate is high or low, A third step (S3) of providing notification information; Comparing a channel bit error rate calculated in the second step (S2) with a threshold value; and if the channel bit error rate is less than a threshold value, completing synchronization in a fourth step (S4); A fifth step (S5) of comparing whether the rate count value is smaller than double the value of the rate molecule when the channel bit error rate is larger than the threshold value as a result of the comparison in the fourth step (S4); If the code rate is changed in accordance with the information indicating the high rate or the low rate in the third step S3 or if the rate count value is larger than the double value of the rate molecule as a result of the comparison in the fifth step S5, A sixth step (S6) of shifting to the second step (S2) after changing the second step (S6); And a seventh step (S7) of shifting the phase or pattern to the second step (S2) when the rate count value is smaller than the double value of the rate molecule as a result of the comparison in the fifth step (S5) / RTI > of the Viterbi decoder.