KR102684511B1 - 작업부하의 정적 매핑의 비순차적 파이프라이닝된 실행을 가능하게 하기 위한 방법들 및 장치 - Google Patents

작업부하의 정적 매핑의 비순차적 파이프라이닝된 실행을 가능하게 하기 위한 방법들 및 장치 Download PDF

Info

Publication number
KR102684511B1
KR102684511B1 KR1020200087436A KR20200087436A KR102684511B1 KR 102684511 B1 KR102684511 B1 KR 102684511B1 KR 1020200087436 A KR1020200087436 A KR 1020200087436A KR 20200087436 A KR20200087436 A KR 20200087436A KR 102684511 B1 KR102684511 B1 KR 102684511B1
Authority
KR
South Korea
Prior art keywords
credits
workload
scheduler
buffer
credit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020200087436A
Other languages
English (en)
Korean (ko)
Other versions
KR20210021263A (ko
Inventor
마이클 베하르
모쉬 마오르
로넨 가바이
로니 로스너
지기 왈터
오렌 아감
Original Assignee
인텔 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 인텔 코포레이션 filed Critical 인텔 코포레이션
Publication of KR20210021263A publication Critical patent/KR20210021263A/ko
Application granted granted Critical
Publication of KR102684511B1 publication Critical patent/KR102684511B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/28Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0613Improving I/O performance in relation to throughput
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • G06F9/3846Speculative instruction execution using static prediction, e.g. branch taken strategy
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5077Logical partitioning of resources; Management or configuration of virtualized resources
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5083Techniques for rebalancing the load in a distributed system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/044Recurrent networks, e.g. Hopfield networks
    • G06N3/0442Recurrent networks, e.g. Hopfield networks characterised by memory or gating, e.g. long short-term memory [LSTM] or gated recurrent units [GRU]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/0464Convolutional networks [CNN, ConvNet]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/509Offload
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/044Recurrent networks, e.g. Hopfield networks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/045Combinations of networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Human Computer Interaction (AREA)
  • General Health & Medical Sciences (AREA)
  • Computing Systems (AREA)
  • Molecular Biology (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Neurology (AREA)
  • Advance Control (AREA)
KR1020200087436A 2019-08-15 2020-07-15 작업부하의 정적 매핑의 비순차적 파이프라이닝된 실행을 가능하게 하기 위한 방법들 및 장치 Active KR102684511B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/542,012 2019-08-15
US16/542,012 US11231963B2 (en) 2019-08-15 2019-08-15 Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload

Publications (2)

Publication Number Publication Date
KR20210021263A KR20210021263A (ko) 2021-02-25
KR102684511B1 true KR102684511B1 (ko) 2024-07-15

Family

ID=68693863

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020200087436A Active KR102684511B1 (ko) 2019-08-15 2020-07-15 작업부하의 정적 매핑의 비순차적 파이프라이닝된 실행을 가능하게 하기 위한 방법들 및 장치

Country Status (6)

Country Link
US (2) US11231963B2 (enExample)
JP (1) JP7400169B2 (enExample)
KR (1) KR102684511B1 (enExample)
CN (2) CN112395010A (enExample)
DE (1) DE102020119519A1 (enExample)
TW (1) TWI802800B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10901657B2 (en) * 2018-11-29 2021-01-26 International Business Machines Corporation Dynamic write credit buffer management of non-volatile dual inline memory module
US11231963B2 (en) 2019-08-15 2022-01-25 Intel Corporation Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload
US11599780B2 (en) * 2020-03-02 2023-03-07 Apple Inc. Asynchronous task execution for neural processor circuit
US11875247B1 (en) * 2020-06-18 2024-01-16 Amazon Technologies, Inc. Input batching with serial dynamic memory access
US11704058B2 (en) * 2020-07-28 2023-07-18 Samsung Electronics Co., Ltd. Systems and methods for resource-based scheduling of commands
CN112003846B (zh) * 2020-08-13 2023-02-03 广州市百果园信息技术有限公司 一种信用阈值的训练、ip地址的检测方法及相关装置
CN116584075B (zh) * 2020-10-26 2025-07-08 谷歌有限责任公司 调节存储器子系统中的信用分配
US11620159B2 (en) 2021-04-23 2023-04-04 Samsung Electronics Co., Ltd. Systems and methods for I/O command scheduling based on multiple resource parameters
US12001701B2 (en) * 2022-01-26 2024-06-04 Western Digital Technologies, Inc. Storage biasing for solid state drive accelerators

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5418953A (en) * 1993-04-12 1995-05-23 Loral/Rohm Mil-Spec Corp. Method for automated deployment of a software program onto a multi-processor architecture
JP3892829B2 (ja) * 2003-06-27 2007-03-14 株式会社東芝 情報処理システムおよびメモリ管理方法
JP5349515B2 (ja) * 2011-03-14 2013-11-20 株式会社東芝 バッファ管理装置、バッファ管理方法及び記憶装置
US9395990B2 (en) * 2013-06-28 2016-07-19 Intel Corporation Mode dependent partial width load to wider register processors, methods, and systems
KR102459716B1 (ko) * 2014-07-30 2022-10-28 모비디어스 리미티드 저전력 컴퓨테이셔널 이미징
US10002099B2 (en) * 2014-11-13 2018-06-19 Cavium, Inc. Arbitrated access to resources among multiple devices
US11153223B2 (en) * 2016-04-07 2021-10-19 International Business Machines Corporation Specifying a disaggregated compute system
US10289752B2 (en) * 2016-12-12 2019-05-14 Intel Corporation Accelerator for gather-update-scatter operations including a content-addressable memory (CAM) and CAM controller
GB2569271B (en) * 2017-10-20 2020-05-13 Graphcore Ltd Synchronization with a host processor
GB2569275B (en) * 2017-10-20 2020-06-03 Graphcore Ltd Time deterministic exchange
US10649813B2 (en) * 2018-03-29 2020-05-12 Intel Corporation Arbitration across shared memory pools of disaggregated memory devices
US11669372B2 (en) * 2018-12-13 2023-06-06 Intel Corporation Flexible allocation of compute resources
US11231963B2 (en) 2019-08-15 2022-01-25 Intel Corporation Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload

Also Published As

Publication number Publication date
US11231963B2 (en) 2022-01-25
DE102020119519A1 (de) 2021-02-18
KR20210021263A (ko) 2021-02-25
CN114895965B (zh) 2025-09-09
US11847497B2 (en) 2023-12-19
TW202109285A (zh) 2021-03-01
CN114895965A (zh) 2022-08-12
TWI802800B (zh) 2023-05-21
US20190370073A1 (en) 2019-12-05
CN112395010A (zh) 2021-02-23
JP2021034020A (ja) 2021-03-01
US20220197703A1 (en) 2022-06-23
JP7400169B2 (ja) 2023-12-19

Similar Documents

Publication Publication Date Title
KR102684511B1 (ko) 작업부하의 정적 매핑의 비순차적 파이프라이닝된 실행을 가능하게 하기 위한 방법들 및 장치
US11775810B2 (en) Methods and apparatus for thread-based scheduling in multicore neural networks
US10942716B1 (en) Dynamic computational acceleration using a heterogeneous hardware infrastructure
US20230333913A1 (en) Methods and apparatus to configure heterogenous components in an accelerator
US11036477B2 (en) Methods and apparatus to improve utilization of a heterogeneous system executing software
US11880715B2 (en) Method and system for opportunistic load balancing in neural networks using metadata
EP3779778A1 (en) Methods and apparatus to enable dynamic processing of a predefined workload
CN115698937A (zh) 用于深度学习任务调度的硬件电路
US20190318229A1 (en) Method and system for hardware mapping inference pipelines
US20230168898A1 (en) Methods and apparatus to schedule parallel instructions using hybrid cores
US20190370074A1 (en) Methods and apparatus for multiple asynchronous consumers

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20200715

PG1501 Laying open of application
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20220615

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 20200715

Comment text: Patent Application

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20240408

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20240709

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20240710

End annual number: 3

Start annual number: 1

PG1601 Publication of registration