KR102682606B1 - Display device and driver therof - Google Patents

Abstract

The present invention discloses a display device that performs a read operation corresponding to touch based on the MPI (Multi Point-to-point Interface) protocol, wherein a microcontroller and a plurality of drivers share an MPI bus and respond to touch. The read operation is performed, and the turn-on of the reception buffers can be efficiently controlled by the selected driver designated by the read command of the microcontroller providing a wake-up signal to the unselected drivers in response to completion of transmission of touch data.

Description

Display device and its driver {DISPLAY DEVICE AND DRIVER THEROF}

The present invention relates to a display device, and more specifically, to a display device and its driver that perform a read operation for touch between a microcontroller and a driver.

Display devices such as LCD or OLED are being developed to enable touch-based input processing. A display device capable of touch input processing can be defined as a touch display device.

The above-described touch display devices are applied to various electronic devices such as portable terminals such as smartphones, laptops, monitors, and home appliances.

A touch display device usually includes multiple drivers, timing controllers, and microcontrollers.

The timing controller is configured to provide display data for displaying images to a plurality of drivers.

The plurality of drivers provide source signals corresponding to display data to the display panel during the display period. Then, the plurality of drivers read out touch signals detected by the touch sensor of the display panel during the touch period and output touch data for the read-out touch signals to the microcontroller.

The microcontroller requests the transmission of touch data from a plurality of drivers during the touch period, receives touch data according to the request, and performs digital logic using the touch data, such as calculating touch coordinates.

By way of example, data communication between a plurality of drivers and a timing controller may be implemented using an Embedded Clock Point-Point Interface (EPI) protocol. Additionally, data communication between a plurality of drivers and a microcontroller can be implemented using the MPI (Multi-Point Interface) protocol.

In a conventional touch display device, data communication between a plurality of drivers and a microcontroller has been configured using the SPI (Serial to Peripheral Interface) protocol. The SPI protocol is configured to transmit data in a point-to-point manner. In the case of the SPI protocol, the driver is configured to output touch data to the microcontroller in synchronization with the system clock (SCLK), which is the output clock of the microcontroller.

Recently, touch display devices have been developed to use the MPI protocol for data communication between a plurality of drivers and microcontrollers in order to resolve vulnerabilities in SPI protocol-based communication.

The MPI protocol is configured to transmit data in a multi-point bus (Multi-Point BUS) structure, and one microcontroller and multiple drivers are configured to share the bus (MPI bus) by the MPI protocol. In the case of the MPI protocol, the driver is configured to output touch data to the microcontroller using its own transmission clock (ECLK) to prevent data skew.

In the MPI protocol, a microcontroller and a plurality of drivers are connected to the MPI bus and configured to perform read operations for touch. Read operation can be divided into Read Request, in which the microcontroller requests touch data from the driver, and Read Data Operation, in which the driver transmits touch data to the microcontroller.

When a read operation is performed, the plurality of drivers are divided into selected drivers for which a read request is selected and non-selected drivers for which a read request is not selected. Selected and non-selected drivers need to be controlled efficiently for read operations.

Specifically, each driver always monitors the MPI bus shared with the microcontroller and multiple other drivers using the transfer clock (ECLK) for read operations. Therefore, the receive buffer of each driver always remains turned on for monitoring of the shared MPI bus. The non-selected driver must control its status by monitoring the transmission clock (ECLK) of the selected driver.

As described above, in the MPI protocol, the receiving buffer of each driver must always be turned on for read operation, which causes a problem in that a lot of current is consumed.

And, when the selected driver transmits touch data to the microcontroller, the receiving buffers of the plurality of non-selected drivers are turned on. Therefore, the eye diagram of each non-selected driver may deteriorate due to the influence of touch data transmitted through the shared MPI bus, resulting in an abnormal status.

Drivers in an abnormal state require reset. However, automatic reset of the driver under abnormal conditions is difficult.

And, multiple drivers control the status by monitoring the transmission clock (ECLK) of the shared MPI bus. Therefore, it is difficult for multiple drivers to recognize the start and end of a command for a read request at the same time. Additionally, when a selected driver transmits touch data through a shared MPI bus, it is difficult for a plurality of non-selected drivers to know exactly when the selected driver's touch data transmission is completed.

For the above-mentioned reasons, the timing of controlling the reception buffer between multiple drivers may vary, and there is a high possibility that communication failures may occur as a result.

The technical problem that the present invention aims to solve is to reduce current consumption due to the turn-on of the receiving buffer when a microcontroller and a plurality of drivers share a bus and perform a read operation for a touch, and to reduce current consumption by turning on the receiving buffer and This is to prevent the condition of the unselected driver from deteriorating due to the influence of touch data.

In addition, the technical problem to be solved by the present invention is to improve the control point of the buffer by allowing multiple drivers to recognize the start and end of the command for a read request at the same time in a read operation and to prevent communication failures between multiple drivers. there is.

In addition, the technical problem to be solved by the present invention is to improve the buffer control timing of a plurality of drivers by notifying the non-selected driver of the completion of touch data transmission of the selected driver using a signal line that transmits a lock signal, and to improve the buffer control timing of the plurality of drivers. To prevent communication failures.

The display device of the present invention includes a controller that transmits a read command for a read request through a bus in a first period and receives touch data through the bus in a second period; and a first driver and a second driver connected to the bus, wherein the first driver selected by the read command transmits the touch data according to the read command to the bus in the second period, and the first driver A driver generates a wake-up signal in response to the end of transmission of the touch data in the second period and transmits the wake-up signal to a second driver, and the reception buffers of the first driver and the second driver are turned on during the first period and turned off during the second period; In addition, the turn-on timing of the reception buffers of the first driver and the second driver is characterized in that it is synchronized with the wake-up signal.

The driver of the display device of the present invention includes: a reception buffer connected to an external bus, turned on in a first period for a read request during a read operation, and turned off in a second period for a read data operation following a read command; a transmission buffer connected to the bus, turned off in the first period, and turned on in the second period to transmit touch data when selected by the read command; Receives the read command through the reception buffer, provides the touch data to the transmission buffer in the second period when selected by the read command, and generates a wake-up signal in response to the end of transmission of the touch data a data processing unit; Receives the wake-up signal from an external signal line or the data processing unit, and in the first case is not selected by the read command, a transmission circuit that transmits the wake-up signal of a signal line and transmits the wake-up signal of the data processing unit to the outside in a second case selected by the read command; and controlling turn-on and turn-off of the reception buffer and the transmission buffer in response to an operation control signal having different voltage levels in the first period and the second period, and the turn-on time of the reception buffer is determined by the signal line or the and a buffer control unit that controls the data processing unit to synchronize with the wake-up signal.

In the present invention, when a microcontroller and a plurality of drivers share an MPI bus and perform a read operation for a touch, the reception buffers of the plurality of drivers are controlled to turn on in response to the read request and turn off in response to the read data operation. . By controlling the receiving buffer described above, current consumption due to turning on the receiving buffer for monitoring can be reduced.

In addition, the present invention turns off the receiving buffer of the non-selected driver in the read data operation, thereby preventing the non-selected driver from falling into an abnormal state due to deterioration of the eye diagram due to the influence of touch data transmitted through the shared MPI bus. there is.

In addition, in the present invention, a plurality of drivers can recognize the start and end of a command for a read request at the same time by using a wake-up signal shared through an operation control signal and a signal line. Accordingly, the control timing of the reception buffers of a plurality of drivers can be improved, and communication failures between drivers can be prevented.

In addition, the present invention uses a signal line that transmits a lock signal to inform the non-selected driver of the completion of touch data transmission of the selected driver, thereby improving the control timing of the receiving buffer of a plurality of drivers and preventing communication failures between drivers. It can be.

Additionally, the display device can transmit a wake-up signal using the signal line that transmits the lock signal without hardware burden such as additional wiring. Therefore, it is possible to efficiently configure a display device that can share the transmission completion point between drivers.

1 is a block diagram according to an embodiment of a display device of the present invention.
Figure 2 is a circuit diagram of a driver for explaining buffer control and wake-up signal transmission.
Figure 3 is a timing diagram for explaining a read operation of touch data.
Figure 4 is a block diagram for explaining a read request during a read operation.
FIG. 5 is a diagram illustrating the protocol of the DCL signal and DDA signal for the read request of FIG. 4.
Figure 6 is a block diagram for explaining a read data operation among read operations.
FIG. 7 is a diagram illustrating the protocol and wake-up signal of the DCL signal and DDA signal for the read data operation of FIG. 6.
Figure 8 is a waveform diagram for explaining the operation of the reception buffer and transmission buffer between a plurality of drivers.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. Terms used in this specification and patent claims should not be construed as limited to their ordinary or dictionary meanings, but should be construed with meanings and concepts consistent with the technical details of the present invention.

The embodiments described in this specification and the configurations shown in the drawings are preferred embodiments of the present invention, and do not represent the entire technical idea of the present invention, so various equivalents and modifications that can replace them at the time of filing the present application are available. There may be.

1 is a block diagram illustrating an embodiment of the display device of the present invention.

In Figure 1, the PCB area can be understood as a printed circuit board, and the LOG area can be understood as the glass of a display panel, and components are mounted in each of the PCB area and the LOG area.

The display device includes a timing controller (TCON), microcontroller (MCU), and multiple drivers (SRIC1 to SRIC4). In Figure 1, the timing controller (TCON) and microcontroller (MCU) are illustrated as being mounted in the PCB area, and a plurality of drivers (SRIC1 to SRIC4) are illustrated as being mounted in the LOG area.

An embodiment of the display device of the present invention is for driving a display panel (not shown), and the display panel includes pixels for display and touch sensors for touch sensing. For example, pixels may be configured in the display area of a display panel, and touch sensors may be configured in the display area in an in-cell manner, sharing some electrodes of the pixels.

The display panel displays images by driving pixels during the display period and outputs touch signals by sensing the touch by driving touch sensors during the touch period. The display period and touch period described above may be periodically repeated. The timing controller (TCON) and the microcontroller (MCU) share the touch period control signal Tsync to distinguish between the display period and the touch period, thereby controlling the display operation of the display period and the touch sensing operation of the touch period of multiple drivers (SRIC1 to SRIC4). control.

In Figure 1, the embodiment is configured to perform data communication between a timing controller (TCON) and a plurality of drivers (SRIC1 to SRIC4) based on the EPI protocol.

More specifically, the timing controller (TCON) and a plurality of drivers (SRIC1 to SRIC4) are connected through an EPI bus for communication using the EPI protocol.

As an example, the timing controller (TCON) is connected one-to-one with each driver (SRIC1 to SRIC4) through different EPI buses. Here, the EPI bus may be illustrated as including a data transmission line (DT_EPI) and a clock transmission line (CT_EPI). Additionally, the transmission data of the timing controller (TCON) may have a format in which a clock is embedded in the data (video and control data).

And, in Figure 1, the embodiment is configured to perform data communication between a microcontroller (MCU) and a plurality of drivers (SRIC1 to SRIC4) based on the MPI protocol.

More specifically, the microcontroller (MCU) and multiple drivers (SRIC1 to SRIC4) are connected through an MPI bus for communication using the MPI protocol.

As an example, the microcontroller (MCU) is connected to all drivers (SRIC1 to SRIC4) through the MPI bus (DM_MPI, CM_MPI). That is, the microcontroller (MCU) and multiple drivers (SRIC1 to SRIC4) share the MPI bus (DM_MPI, CM_MPI). Here, the MPI bus may be illustrated as including a data transfer bus (DM_MPI) and a clock transfer bus (CM_MPI). In the description of the embodiment of the present invention, the data transfer bus and the clock transfer bus are collectively referred to as the MPI bus.

Although not specifically shown, the timing controller (TCON) may be configured to provide the above-described touch period control signal Tsync to the microcontroller (MCU) and a plurality of drivers (SRIC1 to SRIC4). The touch period control signal Tsync may be provided to have a logical low (L) level corresponding to the touch period and a logical high (H) level corresponding to the display period.

Additionally, the timing controller (TCON) has a plurality of data terminals and a plurality of clock terminals respectively corresponding to the plurality of drivers (SRIC1 to SRIC4). For convenience of explanation, in the embodiment of FIG. 1, a plurality of data terminals are indicated as one data terminal (DA), and a plurality of clock terminals are indicated as one clock terminal (DC). The data terminal (DA) and clock terminal (DC) of the timing controller (TCON) are connected one-to-one to the data terminal (DT) and clock terminal (CT) of each driver (SRIC1 to SRIC4) through the EPI bus.

Additionally, the timing controller (TCON) has a lock signal terminal (LK) connected to the signal line (SIL). The timing controller (TCON) is configured to receive lock signals transmitted from a plurality of drivers (SRIC1 to SRIC4) through a signal line (SIL) configured separately from the EPI bus (DT_EPI, CT_EPI).

The microcontroller (MCU) has a data terminal (DDA), a clock terminal (DCL), and a chip select terminal (MCS). The data terminal (DDA) and clock terminal (DCL) share the MPI bus (DM_MPI, CM_MPI) for communication with multiple drivers (SRIC1 to SRIC4).

The microcontroller (MCU) outputs the DDA signal S_DDA, which is a data signal, to a plurality of drivers (SRIC1 to SRIC4) through the data terminal (DDA) and the MPI bus (DM_MPI) connected to it. And, the microcontroller (MCU) outputs the DCL signal S_DCL, which is a clock signal, to a plurality of drivers (SRIC1 to SRIC4) through the clock terminal (DCL) and the MPI bus (CM_MPI) connected to it.

In addition, the microcontroller (MCU) shares the operation control signal CSN with multiple drivers (SRIC1 to SRIC4) through a separate control line (CSL) connected to the chip select terminal (MCS).

The microcontroller (MCU) may select a specific driver among a plurality of drivers (SRIC1 to SRIC4) through a read operation, request transmission of touch data, and receive touch data transmitted by the selected driver in response to the above request. Additionally, a microcontroller (MCU) can perform digital logic, such as calculating touch coordinates, using touch data.

Each of the plurality of drivers (SRIC1 to SRIC4) has a data terminal (DT) and clock terminal (CT) corresponding to the timing controller (TCON), a data terminal (DM), a clock terminal (CM) corresponding to the microcontroller (MCU), and It has a chip select terminal (CS), and a lock signal input terminal (LI) and a lock signal output terminal (LO) for inputting and outputting a lock signal.

A plurality of drivers (SRIC1 to SRIC4) receive transmission signals from the timing controller (TCON) through the data terminal (DT) and clock terminal (CT), restore the transmission signals to display data and clock signals, and restore the restored display data. and generate source signals using a clock signal, and provide the source signals to the display panel.

Multiple drivers (SRIC1 to SRIC4) are configured to periodically perform clock training to keep the clock signal stable.

When the clock signal is stable, a plurality of drivers (SRIC1 to SRIC4) lock and use the phase of the clock signal, generate a lock signal LOCK corresponding to the lock of the clock signal, and send the lock signal LOCK to the signal line (SIL). ) is output.

On the other hand, when the clock signal is unstable due to internal or external factors, a plurality of drivers (SRIC1 to SRIC4) generate a lock signal LOCK corresponding to a lock fail, and send the lock signal LOCK to the signal line (SIL). It is transmitted to the timing controller (TCON) through . As an example, the lock signal LOCK may be generated as a logical high (H) when the clock signal is stable, and may be generated as a logical low (L) when the lock fails.

A plurality of drivers (SRIC1 to SRIC4) combine the internally generated lock signal LOCK_INT with the lock signal LOCK of other drivers received through the lock signal input terminal (LI) and send the combined result as the lock signal LOCK to the lock signal output terminal ( It is configured to output to another driver or timing controller (TCON) through LO).

An embodiment of the present invention may be configured to combine a plurality of drivers (SRIC1 to SRIC4) while sequentially transmitting the lock signal LOCK through the signal line (SIL).

An embodiment of the present invention may be configured to apply a constant pull-up voltage to the signal line (SIL) in order to transmit the lock signal LOCK and the wake-up signal WU described later.

More specifically, the first-order driver combines the constant voltage applied to the lock signal input terminal (LI) through the signal line (SIL) with the internal lock signal LOCK_INT according to the state of the internal clock signal, and locks the combined result. The signal LOCK is configured to be output to the signal line (SIL) through the lock signal output terminal (LO).

And, the remaining drivers sequentially combine the lock signal LOCK of the lock signal input terminal (LI) and the internal lock signal LOCK_INT, and use the combined result as the lock signal LOCK through the lock signal output terminal (LO) through the signal line. It is configured to output at (SIL).

And, the last driver combines the lock signal LOCK of the lock signal input terminal (LI) and the internal lock signal LOCK_INT, and sends the combined result to the lock signal output terminal (LO) and signal line (SIL) as the lock signal LOCK. It is configured to output to the timing controller (TCON) through.

As described above, the timing controller (TCON) and the plurality of drivers (SRIC1 to SRIC4) are configured to share the lock signal LOCK through the signal line (SIL).

Meanwhile, a plurality of drivers (SRIC1 to SRIC4) communicate with the microcontroller (MCU) through the data terminal (DM) and clock terminal (CM) connected to the MPI bus (DM_MPI, CM_MPI).

Lead operations include lead requests and lead data operations.

The microcontroller (MCU) transmits a read command for a read request to the data terminal (DM) and clock terminal (CM) of a plurality of drivers (SRIC1 to SRIC4) through the MPI bus (DM_MPI, CM_MPI).

The read command includes driver information to select a read data operation.

Therefore, the selection driver selected by the read command performs a read data operation corresponding to the read request. Specifically, the selection driver transmits touch data to the microcontroller (MCU) through the MPI bus (DM_MPI, CM_MPI) shared with the data terminal (DM) and clock terminal (CM). And, unselected drivers that are not selected by the read command do not perform read data operations.

A plurality of drivers (SRIC1 to SRIC4) have a reception buffer (50, 52 in FIG. 2) for receiving data through the MPI bus (DM_MPI, CM_MPI) and a transmission for transmitting touch data through the MPI bus (DM_MPI, CM_MPI). It is provided with a buffer (60, 62 in FIG. 2).

A microcontroller (MCU) can perform a read request by selecting one driver to perform the read operation.

A plurality of drivers (SRIC1 to SRIC4) receive read requests while the reception buffers 50 and 52 are turned on. A plurality of drivers (SRIC1 to SRIC4) turn off the reception buffers 50 and 52 when reception of a read request is completed.

The selected driver among multiple drivers (SRIC1 to SRIC4) performs read data operations. That is, the selection driver turns on the transmission buffers 60 and 62 for read data operation and then transmits touch data corresponding to the read request through the transmission buffers 60 and 62.

When the selected driver completes the transmission of touch data, it generates a wake-up signal WU, transmits the wake-up signal WU to a plurality of non-selected drivers, and then turns off the transmission buffers 60 and 62.

After touch data is transmitted by the selected driver, the turn-on timing of the reception buffers 50 and 52 of the selected driver and the non-selected drivers, that is, the plurality of drivers (SRIC1 to SRIC4), is synchronized with the wake-up signal WU. As a result, the reception buffers 50 and 52 of a plurality of drivers (SRIC1 to SRIC4) are turned on at the same time.

The embodiment of the present invention is configured to share the wake-up signal WU among a plurality of drivers (SRIC1 to SRIC4) using a signal line (SIL) that shares the lock signal.

As described with reference to FIG. 1, the embodiment of FIG. 1 includes a microcontroller (MCU) and a plurality of drivers (SRIC1 to SRIC4).

The lead operation includes the lead request described above and the read data operation described above. Additionally, the selected driver that performs the read data operation changes for each read operation cycle. Therefore, read data operations can be sequentially performed on a plurality of drivers (SRIC1 to SRIC4).

The microcontroller (MCU) transmits a read command to a plurality of drivers (SRIC1 to SRIC4) through the MPI bus (DM_MPI, CM_MPI) in the first period for the read request and transmits the read command to the MPI bus (DM_MPI) in the second period for the read data operation. , CM_MPI) and is configured to receive touch data of the selected driver.

In addition, each of the plurality of drivers (SRIC1 to SRIC4) is configured to be connected to the MPI bus (DM_MPI, CM_MPI) and the signal line (SIL). Among the plurality of drivers (SRIC1 to SRIC4), the selected driver transmits touch data according to the read command through the MPI bus (DM_MPI, CM_MPI) in the second period.

The reception buffers 50 and 52 of the plurality of drivers (SRIC1 to SRIC4) are turned on during the first period and turned off during the second period.

In addition, the selected driver generates a wake-up signal in response to the end of transmission of touch data and transmits the wake-up signal to the non-selected drivers through the signal line (SIL). As a result, the turn-on timing of the reception buffers 50 and 52 of the selected driver and the non-selected driver are synchronized to the wake-up signal.

Meanwhile, a plurality of drivers (SRIC1 to SRIC4) can use the signal line (SIL) to transmit a lock signal corresponding to the clock state of the display data in the display period and to transmit a wake-up signal generated by the selected driver in the touch period. there is.

In addition, each driver has a lock signal input terminal (LI) and a lock signal output terminal (LO) connected to the signal line (SIL), and wake-up of the signal line (SIL) through the lock signal input terminal (LI). It receives the signal WU and transmits the wake-up signal WU to the signal line (SIL) through the lock signal output terminal (LO).

For operation of the above-described embodiment, each driver (SRIC1 to SRIC4) may be configured as shown in FIG. 2. For convenience of explanation, Figure 2 illustrates the driver (SRIC1).

The driver (SRIC1) includes reception buffers 50 and 52, transmission buffers 60 and 62, a data processing unit 70, a wake-up detection unit 10, a transfer circuit 100, and a buffer control unit 80.

The driver (SRIC) in Figure 1 displays only the components necessary for the operation of the embodiment of the present invention, including components that convert display data into source signals, components that read out touch signals, and convert touch signals into touch data. Examples of parts that are changed and transmitted are omitted.

The receive buffer 50 and the transmit buffer 60 share the same MPI bus (DM_MPI) connected to the data terminal (DM). Additionally, the receive buffer 52 and the transmit buffer 62 share the same MPI bus (CM_MPI) connected to the clock terminal (CM).

That is, the receive buffers 50 and 52 are connected to the MPI bus (DM_MPI, CM_MPI) outside the driver (SRIC1), are turned on in the first period for the read request during the read operation, and are turned on for the read data operation following the read command. It is configured to turn off in the second period.

In addition, the transmission buffers 60 and 62 are connected to the MPI bus (DM_MPI, CM_MPI) outside the driver (SRIC1), are turned off in the first period, and, in the case of a selection driver, are turned on in the second period to transmit touch data. It is composed.

The data processing unit 70 is configured to have a first input/output line commonly connected to the reception buffer 50 and the transmission buffer 60 connected to the data terminal (DM), and the reception buffer 52 connected to the clock terminal (CM) A second input/output line is configured to be commonly connected to the transmission buffer 62.

The data processing unit 70 receives a read command through the reception buffers 50 and 52, and in the case of a selected driver, provides touch data to the transmission buffers 60 and 62 in the second period and responds to the end of transmission of the touch data. This generates a wake-up signal WUi. The wake-up signal of the data processing unit 70 is indicated as “WUi” to distinguish it from the wake-up signal WU shared on the signal line (SIL).

The wake-up detector 10 is connected to the lock signal input terminal (LI) connected to the signal line (SIL) and detects the wake-up signal WU shared through the signal line (SIL) used for transmission of the lock signal. It is composed. More specifically, the wake-up detection unit 10 detects the wake-up signal WU transmitted on a lock signal that is maintained in a high or low state.

The transmission circuit 100 receives the wake-up signal WU of the signal line (SIL) or the wake-up signal WUi of the data processing unit 70, and, in the case of a selection driver, wakes the data processing unit 70 through the signal line (SIL). -Up signal WUi is transmitted, and in the case of an unselected driver, it is configured to transmit the wake-up signal WU of the signal line (SIL) to the signal line (SIL).

Meanwhile, the buffer control unit 80 has different voltage levels in the first period and the second period and operates the reception buffers 50 and 52 and the transmission buffer in response to the operation control signal CSN received through the external control line (CSL). Controls the turn-on and turn-off of (60, 62). Additionally, the buffer control unit 80 controls the turn-on timing of the receiving buffers 50 and 52 to be synchronized with the wake-up signal WU of the signal line SIL or the wake-up signal WUi of the data processing unit 70.

Among these, the transmission circuit 100 is configured to include a selection control unit 20, a wake-up signal selection unit 30, and an output unit 40.

The selection control unit 20 is configured to output a selection control signal that determines whether the first case is a non-selected driver and the second case is a selected driver during the touch period.

More specifically, the selection control unit 20 is configured to control the operation of the wake-up signal selection unit 30 by a combination of the touch period control signal Tsync and the MPI selection signal MPIS.

For this purpose, the selection control unit 20 includes a Noah gate 22 and an inverter 24. The inverter 24 inverts the output of the Noah gate 22 and outputs it to the first selection stage (S1) of the wake-up signal selection unit 30. In addition, the Noah gate 22 receives the touch period control signal Tsync and the MPI selection signal MPIS, and the result of combining the touch period control signal Tsync and the MPI selection signal MPIS is sent to the second wake-up signal selection unit 30. It is output to the selection stage (S2).

The touch period control signal Tsync is provided at a logical low level ((Tsync=”L”) corresponding to the touch period and at a logical high level ((Tsync=”H”) corresponding to the display period. And, the MPI selection signal MPIS is provided at a logical low level (MPIS=”L”) for optional drivers and at a logical high level (MPIS=”H”) for non-selective drivers.

Therefore, in the first case of a non-select driver in the touch period, the touch period control signal Tsync is at a logical low level and the MPI select signal MPIS is at a logical high level. And, in the second case, the touch period selection driver, both the touch period control signal Tsync and the MPI selection signal MPIS are at logical low level.

The Noah gate 22 outputs a high level in the second case of the selection driver during the touch period as shown in <Table 1>. As a result, the wake-up signal selection unit 30 selects the second input terminal (i2) as a logical low level signal is applied to the first selection terminal (S1) and a logical high level signal is applied to the second selection terminal (S2). ) signal is selected and output to the output terminal (OT).

As shown in <Table 1>, the Noah gate 22 outputs a low level in the first case of a non-selected driver in the touch period and in the display period. As a result, the wake-up signal selection unit 30 selects the first input terminal (i1) as a logical high level signal is applied to the first selection terminal (S1) and a logical low level signal is applied to the second selection terminal (S2). ) signal is selected and output to the output terminal (OT).

Signals applied to the first selection stage (S1) and the second selection stage (S2) of the wake-up signal selection unit 30 can be defined as selection control signals.

The wake-up signal selection unit 30 selects the signal of the first input terminal (i1) or the second input terminal (i2) according to the selection control signal applied to the first selection terminal (S1) and the second selection terminal (S2). and output to the output terminal (OT).

As described above, the wake-up signal selection unit 30 selects and outputs the signal of the first input terminal (i1) received through the lock signal input terminal (LI) in the first case, and outputs the signal of the second input terminal (i1) in the second case. The wake-up signal WUi of the data processing unit 70 applied to (i2) is selected and output.

In the first case, the wake-up signal WU of the signal line (SIL) is input to the first input terminal (i1) of the wake-up signal selection unit 30 through the lock signal input terminal (LI). Therefore, it can be understood that the wake-up signal selection unit 30 selects and outputs the wake-up signal WU of the signal line SIL in the first case.

Also, during the display period, the wake-up signal selection unit 30 is fixed to select and output the signal received through the lock signal input terminal (LI) by the selection control signal.

Tsync MPIS A Remark L L H Touch period. Select SRIC. Output WU of i2. L H L Touch period. Non-selected SRIC. Output WU of i1 H L L Display period. Output the signal of i1 H H L

In Table 1 above, A refers to the output of the Noah gate 22.

Meanwhile, the output unit 40 includes a NAND gate 42 and a switching element 44. Among these, the NAND gate 42 outputs the result of NAND combining the output of the wake-up signal selection unit 30 and the internal lock signal LOCK_INT to the switching element 44. Additionally, the switching element 44 is configured to switch the connection between the lock signal output terminal LO and the ground terminal GND according to the output of the NAND gate 42.

The switching element 44 may be illustrated as consisting of an NMOS transistor. In this case, the switching operation is controlled by the output of the NAND gate 42 applied to the gate of the NMOS transistor. When the switching element 44 is turned on, the voltage of the signal line (SIL) connected to the lock signal output terminal (LO) drops from the pull-up voltage to the pull-down voltage of the ground level. And, when the switching element 44 is turned off, the voltage of the signal line (SIL) connected to the lock signal output terminal (LO) maintains the pull-up voltage.

According to the above configuration, the output unit 40 outputs the lock signal LOCK of the signal line (SIL) and the internal lock signal LOCK_INT transmitted through the wake-up signal selection unit 30 and the lock signal input terminal (LI) during the display period. The combined result is output to the signal line (SIL) through the lock signal output terminal (LO).

During the display period, the lock signal LOCK from another driver is applied to the lock signal input terminal (LI). As an example, the lock signal input terminal LI receives a high-level lock signal LOCK when the other driver is in a normal lock state, and receives a low-level lock signal LOCK when the other driver is in a lock fail state.

The lock signal LOCK of the lock signal input terminal LI during the display period is input to the NAND gate 42 through the wake-up signal selection unit 30. That is, the NAND gate 42 controls the switching of the switching element 44 using the lock signal LOCK of the lock signal input terminal LI and the internally generated lock signal LOCK_INT.

The NAND gate 42 outputs a low level when the lock signal LOCK of the lock signal input terminal (LI) and the internally generated lock signal LOCK_INT are normal, and outputs a high level in other cases.

As a result, the signal output unit 40 maintains the signal line (SIL) at a high level when the lock status of other drivers and the driver (SRIC1) is normal, and when the lock status of even one driver is abnormal, the signal line (SIL) is maintained at a high level. ) to the low level.

Additionally, the output unit 40 outputs the waker-up signal output from the wake-up signal selection unit 30 during the touch period to the signal line SIL through the lock signal output terminal LO.

As a result, the signal line (SIL) transmits a lock signal or wake-up signal by being pulled up or down according to the switching state of the switching element 44, and the output unit 40 transmits the lock signal LOCK to the signal line (SIL) during the display period. ), and the wake-up signal WU is output to the signal line (SIL) during the touch period.

Meanwhile, the above-described buffer control unit 80 operates the operation control signal CSN transmitted from the microcontroller (MCU) through the control line (CSL), the wake-up signal WU of the signal line (SIL), or the wake-up signal of the data processing unit 70. It is configured to control the reception buffers 50 and 52 and the transmission buffers 60 and 62 using the up signal WUi and the selection control signal CE of the data processing unit 70.

The buffer control unit 80 includes a reception buffer control unit 82 and a transmission buffer control unit 84.

The reception buffer control unit 82 provides a reception control signal to the reception buffers 50 and 52. More specifically, the reception buffer control unit 82 turns on the reception buffers 50 and 52 in a first period and turns off the reception buffers 50 and 52 in a second period in response to the operation control signal CSN. Additionally, the reception buffer control unit 82 controls the reception buffers 50 and 52 so that the turn-on time is synchronized with the wake-up signal WU of the data processing unit 70 or the wake-up detection unit 10.

Then, the transmission buffer control unit 84 provides a transmission control signal to the transmission buffers 60 and 62. More specifically, in the case of a selection driver, the transmission buffer control unit 84 turns on the transmission buffers 60 and 62 in the second period in response to the operation control signal CSN when the selection control signal CE is provided from the data processing unit 70.

By the configuration of the buffer control unit 80 described above, the reception buffers 50 and 52 of the plurality of drivers (SRIC1 to SRIC4) are turned on in the first period and turned off in the second period in response to the operation control signal CSN.

Additionally, the turn-on timing of the reception buffers 50 and 52 of the selected driver is synchronized with the wake-up signal WUi of the data processing unit 70, and the reception buffers 50 and 52 of the non-selected driver are synchronized with the wake-up detection unit 10. is synchronized with the wake-up signal WU.

Then, the transmission buffers 60 and 62 of the selection driver are turned on in the second period in response to the operation control signal CSN.

By the configuration of FIGS. 1 and 2 described above, an embodiment of the present invention can perform a read operation of a microcontroller (MCU). This will be further explained with reference to FIGS. 3 to 8.

For read operation, the microcontroller (MCU) performs a read request to output a read command to the drivers (SRIC1 to SRIC4) using the system clock SCLK, as shown in FIGS. 3 and 4. Here, the system clock SCLK can be understood as the clock of the microcontroller (MCU).

The protocol of the DCL signal S_DCL of the MPI bus (CM_MPI) and the DDA signal S_DDA of the MPI bus (DM_MPI) according to the read request of the microcontroller (MCU) is shown in FIG. 5.

The microcontroller (MCU) provides the DDA signal S_DDA to include the device address to be selected when requesting a read, and the selection driver is determined by the device address (C3:C0). A plurality of drivers (SRIC1 to SRIC4) determine whether a read request has been selected for them using the device address (C3:C0).

For reference, the DDA signal S_DDA of a microcontroller (MCU) may be formed in a format including a dummy clock period, a header (16 bits), and a register address (16 bits).

The DDA signal S_DDA can be set to have a value that performs a specific function according to the manufacturer's intention during the dummy clock period.

The header of the DDA signal can be used to define the preamble code that defines the transmission type, the identification bit (RW) to distinguish write and read, the device address, and the data length.

The preamble code may have a code value for defining a read request and may be composed of various bits by the producer. The embodiment of the present invention illustrates that it is composed of 4 bits.

For example, if the preamble code is “1,1,1,1”, it indicates that the microcontroller (MCU) transmits a write or read command to a specific driver, and if the preamble code is “1,1,1,0”, it indicates that the microcontroller (MCU) is sending a write or read command to a specific driver. ” indicates that the microcontroller (MCU) transmits a write command to all drivers, and if the preamble code is “1,1,0,1”, a specific driver transmits touch data to the microcontroller (MCU). If the preamble code is “1,1,0,0”, it indicates that a specific driver is transmitting a data ready command to the microcontroller (MCU). In this way, the preamble code defines the transmission type according to the code values of the bits.

Since the read request in the embodiment of the present invention involves the microcontroller (MCU) transmitting a read command to a specific driver, the preamble code can be understood as being set to “1,1,1,1”.

The distinguishing bit for distinguishing between light and read can be set to mean read when it has a bit value corresponding to “R” and to mean light when it has a bit value corresponding to “W”. For the read request of the embodiment of the present invention, the classification bit for distinguishing write and read may be understood as having a bit value corresponding to “R” for read.

The device address can be selected as the address of the driver to perform the read request.

Additionally, the data length is exemplified as 7 bits, and 7 bits indicate that up to 127 pieces of data can be written and read.

Meanwhile, the register address (16 bits) of the DDA signal S_DDA is for selecting a register address for writing data.

In an embodiment of the present invention, a read request is performed prior to a read data operation, only the selected driver occupies the MPI bus to transmit touch data by the read data operation, and the receive buffers of the selected driver and all non-selected drivers are turned off. do. Therefore, the MPI bus can be prevented from being abnormally occupied by turning on the receiving buffer of the non-selected driver.

For read data operation, the selection driver transmits touch data to the microcontroller (MCU) using the transmission clock ECLK, as shown in FIGS. 3 and 6. Here, the transmission clock ECLK can be understood as the clock of the selection driver (SRIC1).

For read data operation, the protocol of the DCL signal S_DCL and DDA signal S_DDA transmitted from the selection driver to the microcontroller (MCU) is shown in FIG. 7.

More specifically, the DDA signal S_DDA transmitted from the selection driver to the microcontroller (MCU) may be formed in a format including a dummy clock period, header (16 bits), register address (16 bits), write data, and dummy.

The dummy clock period, header (16 bits), and register address (16 bits) of the DDA signal S_DDA transmitted by the selection driver can be understood with reference to the DDA signal S_DDA of FIG. 5 transmitted by the microcontroller (MCU).

Among these, the preamble code of the header is defined as “1,1,0,1”, which indicates that a specific driver transmits touch data to the microcontroller (MCU), and the distinguishing bit for distinguishing light and read is for read. It is set to have a bit value corresponding to “R”, the device address is selected as the address of the selected driver, and the register address can be set as the register address from which data is read.

And, the write data includes touch data read from the driver selected for read data operation.

The dummy may be defined as indicating a period during which the wake-up signal WU is located on the lock signal LOCK according to an embodiment of the present invention. In FIG. 7, the lock signal (LOCK) corresponding to the dummy is illustrated as being set to “LLHHLLHH”. However, the wake-up signal WU can be defined in various ways depending on the manufacturer's intention.

As described above, an embodiment of the present invention will be described with reference to FIG. 8 in which a plurality of drivers (SRIC1 to SRIC4) perform a read operation in response to a read request from a microcontroller (MCU).

In FIG. 8, “CSN” can be understood as a waveform for displaying an operation control signal. The first period in which the operation control signal CSN is at a low level is a period in which the microcontroller (MCU) transmits a read command for a read request, and the read command for selecting a specific driver is transmitted through the MPI bus ( It can be understood as the transmission period through DM_MPI, CM_MPI). The second period in which the operation control signal CSN is at a high level can be understood as a period in which the selection driver performs a read data operation to transmit touch data.

The DDA signal S_DDA and the DCL signal S_DCL in FIG. 8 are a read command transmitted from the microcontroller (MCU) to the drivers through the MPI bus in the first period and touch data transmitted from the selection driver to the microcontroller (MCU) in the second period. It can be understood as FIG. 8 illustrates a driver (SRIC1) and a driver (SRIC2) for convenience of explanation, where RX1 indicates the operation of the receive buffers 50 and 52 of the driver (SRIC1), and TX1 represents the transmit buffer of the driver (SRIC1). (60, 62), RX2 indicates the operation of the receiving buffers (50, 52) of the driver (SRIC2), and TX2 indicates the operation of the transmitting buffers (60, 62) of the driver (SRIC2). .

First, in the first low period of the operation control signal CSN, the DDA signal S_DDA and the DCL signal S_DCL are transmitted as read commands from the microcontroller (MCU) to the drivers (SRIC1 and SRIC2) through the MPI bus (DM_MPI, CM_MPI). At this time, it can be assumed that the driver (SRIC1) is selected by a read request by a read command from the microcontroller (MCU). And, the reception buffers 50 and 52 of the drivers SRIC1 and SRIC2 are turned on in the first period in response to the operation control signal CSN. At this time, the transmission buffers 60 and 62 of the drivers SRIC1 and SRIC2 remain turned off.

The drivers (SRIC1, SRIC2) maintain an active state to receive a read command while the reception buffers 50 and 52 are turned on in response to the operation control signal CSN.

The driver SRIC1 recognizes that the read command in the first period selects itself, and the recognition of selection by the read command can be performed by the data processing unit 70.

When the microcontroller (MCU) read command transmission ends and the operation control signal CSN changes to high level, the receiving buffers 50 and 52 of the drivers (SRIC1 and SRIC2) are turned off and converted to the standby (Idle) state. do. That is, the reception buffers 50 and 52 of the drivers (SRIC1 and SRIC2) are powered off and do not share the MPI bus (DM_MPI and CM_MPI).

The driver SRIC1 is selected as the selection driver by a read command in the first period corresponding to the first low period of the operation control signal CSN.

Then, upon entering the second period corresponding to the first high period of the operation control signal CSN, the transmit buffers 60 and 62 of the driver (SRIC1) are turned on and occupy the MPI bus (DM_MPI, CM_MPI).

The transmission buffers 60 and 62 of the driver (SRIC1) transmit the DDA signal S_DDA and the DCL signal S_DCL as touch data to the microcontroller (MCU) through the MPI bus (DM_MPI, CM_MPI). At this time, the reception buffers 50 and 52 of the drivers (SRIC1 and SRIC2) remain turned off during the second period, and the transmission buffers 60 and 62 of the driver (SRIC2), which is an unselected driver, also turn on during the second period. Keep it off.

The transmission buffers 60 and 62 of the driver (SRIC1) are controlled to be turned on by the transmission buffer control unit 84, and the transmission buffer control unit 84 provides a selection control signal CE from the data processing unit 70 in response to the read command. When this happens, the transmission buffers 60 and 62 are turned on in the second period in response to the operation control signal CSN.

In the first high period of the operation control signal CSN, when the transmission buffers 60 and 62 of the driver (SRIC1) transmit touch data through the MPI bus (DM_MPI, CM_MPI), only the microcontroller (MCU) turns on the buffer for reception. . The driver (SRIC2) turns off the receive buffers 50 and 52. Therefore, the driver (SRIC2) can be prevented from falling into an abnormal state due to deterioration of the eye diagram due to the influence of touch data transmitted through the MPI bus (DM_MPI, CM_MPI). Additionally, current consumption may be reduced as the receiving buffers 50 and 52 of the drivers SRIC1 and SRIC2 are turned off.

Then, when the driver SRIC1 completes transmitting touch data in the first high period of the operation control signal CSN, the data processing unit 70 of the driver SRIC1 generates a wake-up signal WUi. The wake-up signal WUi generated in the driver SRIC1 is shared to the signal line SIL as a wake-up signal WU through the transmission circuit 100. The driver (SRIC2) can receive the wake-up signal WU shared on the signal line (SIL).

When the first high period of the operation control signal CSN ends, the transmission buffers 60 and 62 of the driver (SRIC1) are turned off at the point when the operation control signal CSN changes to low.

Thereafter, when the second low period of the operation control signal CSN arrives, the reception buffers 50 and 52 of the drivers SRIC1 and SRIC2 are turned on in response to the operation control signal CSN. The turn-on point of the reception buffers 50 and 52 of the driver (SRIC1) is synchronized with the wake-up signal WUi of the data processing unit 70, and the turn-on point of the reception buffers 50 and 52 of the driver (SRIC2) is synchronized with the signal line ( SIL) wake-up signal WU. That is, the turn-on timing of the receiving buffers 50 and 52 of the drivers SRIC1 and SRIC2 can be synchronized to the same timing, thereby preventing communication errors.

In the second low period of the operation control signal CSN, the DDA signal S_DDA and the DCL signal S_DCL are transmitted as read commands from the microcontroller (MCU) to the drivers (SRIC1 and SRIC2) through the MPI bus (DM_MPI, CM_MPI). At this time, the driver (SRIC2) can be selected as a read request by a read command from the microcontroller (MCU). And, the reception buffers 50 and 52 of the drivers SRIC1 and SRIC2 are turned on in the first period in response to the operation control signal CSN. At this time, the transmission buffers 60 and 62 of the drivers SRIC1 and SRIC2 remain turned off.

The drivers (SRIC1, SRIC2) maintain an active state to receive a read command while the reception buffers 50 and 52 are turned on in response to the operation control signal CSN.

The driver SRIC2 recognizes that the read command selects itself, and the recognition of selection by the read command can be performed by the data processing unit 70.

When the microcontroller (MCU) read command transmission ends and the operation control signal CSN changes to high level, the receiving buffers 50 and 52 of the drivers (SRIC1 and SRIC2) are turned off and converted to the standby (Idle) state. do. That is, the reception buffers 50 and 52 of the drivers (SRIC1 and SRIC2) are powered off and do not share the MPI bus (DM_MPI and CM_MPI).

The driver SRIC2 is selected as the selection driver by a read command in the first period corresponding to the second low period of the operation control signal CSN.

Then, upon entering the second period corresponding to the second high period of the operation control signal CSN, the transmit buffers 60 and 62 of the driver SRIC2 are turned on and occupy the MPI buses DM_MPI and CM_MPI.

The transmission buffers 60 and 62 of the driver (SRIC2) transmit the DDA signal S_DDA and the DCL signal S_DCL as touch data to the microcontroller (MCU) through the MPI bus (DM_MPI, CM_MPI). At this time, the reception buffers 50 and 52 of the drivers SRIC1 and SRIC2 remain turned off during the second period, and the transmission buffers 60 and 62 of the driver SRIC1, which is an unselected driver, also turn on during the second period. Keep it off.

The transmission buffers 60 and 62 of the driver (SRIC2) are controlled to be turned on by the transmission buffer control unit 84, and the transmission buffer control unit 84 provides a selection control signal CE from the data processing unit 70 in response to the read command. When this happens, the transmission buffers 60 and 62 are turned on in the second period in response to the operation control signal CSN.

In the second high period of the operation control signal CSN, when the transmission buffers 60 and 62 of the driver (SRIC2) transmit touch data through the MPI bus (DM_MPI, CM_MPI), only the microcontroller (MCU) turns on the buffer for reception. . The driver (SRIC1) turns off the receive buffers 50 and 52. Therefore, the driver (SRIC1) can be prevented from falling into an abnormal state due to deterioration of the eye diagram due to the influence of touch data transmitted through the MPI bus (DM_MPI, CM_MPI). Additionally, current consumption may be reduced as the receiving buffers 50 and 52 of the drivers SRIC1 and SRIC2 are turned off.

Then, when the driver SRIC2 completes transmitting touch data in the second high period of the operation control signal CSN, the data processing unit 70 of the driver SRIC2 generates a wake-up signal WUi. The wake-up signal WUi generated in the driver (SRIC2) is shared to the signal line (SIL) as a wake-up signal WU through the transmission circuit 100. The driver (SRIC1) can receive the wake-up signal WU shared on the signal line (SIL).

When the second high period of the operation control signal CSN ends, the transmission buffers 60 and 62 of the driver (SRIC2) are turned off at the point when the operation control signal CSN changes to low.

As described above, the present invention, when a microcontroller and a plurality of drivers share an MPI bus and perform a read operation for a touch, turns on the reception buffers of the plurality of drivers in response to the read request and turns them on in response to the read data operation. Control it to turn off.

That is, the receive buffers of multiple drivers are periodically turned off without the need to always monitor the MPI bus. Therefore, current consumption can be reduced by periodically turning off the receiving buffer.

Additionally, in the present invention, the receive buffer of the unselected driver is turned off in the read data operation. Therefore, the eye diagram can be prevented from deteriorating and falling into an abnormal state due to the influence of touch data transmitted through the MPI bus shared by the non-selected driver.

In addition, the present invention allows multiple drivers to recognize the start and end of a command for a read request at the same time by using a wake-up signal shared through an operation control signal and a signal line. Accordingly, the control timing of the reception buffers of a plurality of drivers can be improved, and communication failures between drivers can be prevented.

In particular, the present invention can inform the non-selected driver of the completion of touch data transmission of the selected driver by using a signal line that transmits a lock signal. Therefore, the control timing of the reception buffers of a plurality of drivers can be improved, and communication failures between drivers can be prevented. Additionally, the display device can transmit a wake-up signal using the signal line that transmits the lock signal without hardware burden such as additional wiring. Therefore, it is possible to efficiently configure a display device that can share the transfer completion point between drivers.

Claims (20)

A controller that transmits a read command for a read request through a bus in a first period and receives touch data through the bus in a second period; and
Including a first driver and a second driver connected to the bus,
The first driver selected by the read command transmits the touch data according to the read command to the bus in the second period,
The first driver generates a wake-up signal in response to the end of transmission of the touch data in the second period and transmits the wake-up signal to the second driver,
receive buffers of the first driver and the second driver are turned on during the first period and turned off during the second period; and,
A display device, wherein the turn-on timing of the receiving buffers of the first driver and the second driver is synchronized to the wake-up signal. According to claim 1,
A display device in which the read data operation is sequentially performed on the first driver and the second driver by changing the driver selected by the read command for each read operation cycle including the read request and the read data operation. According to claim 1,
The first driver and the second driver are connected to a signal line, and use the signal line to transmit a lock signal corresponding to the clock state of the display data in the display period and to transmit the wake-up signal in the touch period. A display device using the signal line. According to clause 3,
Each of the first driver and the second driver has a lock signal input terminal and a lock signal output terminal connected to the signal line,
The first driver transmits the wake-up signal to the signal line through the lock signal output terminal,
The second driver receives the wake-up signal of the signal line through the lock signal input terminal. According to clause 3,
A display device in which a pull-up voltage of a preset level is applied to the signal line. The method of claim 1, wherein the first driver:
a data processing unit generating the wake-up signal in response to termination of the transmission of the touch data;
a selection control unit that outputs a selection control signal that determines a first case not selected by the read command and a second case selected by the read command during a touch period;
By the selection control signal, in the first case, the wake-up signal received through an external signal line is selected and output, and in the second case, the wake-up signal of the data processing unit is selected and output. Wake-up signal selection unit; and
A display device comprising: an output unit transmitting the wake-up signal output from the wake-up signal selection unit to the signal line. According to clause 6,
The output unit further receives a lock signal corresponding to a clock state of display data during the display period, and transmits the lock signal and the wake-up signal to the signal line. According to clause 7,
The output unit includes a switching element connected to the signal line,
The switching element is switched by the lock signal or the wake-up signal,
A display device wherein the signal line to which a pull-up voltage is applied is pulled up or pulled down according to the switching state of the switching element, thereby transmitting the lock signal or the wake-up signal. The method of claim 1, wherein the first driver:
the receiving buffer turned on in the first period and turned off in the second period, and receiving the read command in the first period;
a transmission buffer that is turned off in the first period and turned on in the second period to transmit the touch data;
Receiving the read command in the receive buffer, providing the touch data to the transmit buffer in the second period in response to selection by the read command, and performing the wake-up in response to termination of the transmission of the touch data a data processing unit that generates a signal; and
Receives the wake-up signal from an external signal line or the data processing unit, and transmits the wake-up signal from the data processing unit or the wake-up signal from the signal line to the signal line according to selection by the read command. A display device comprising a transmission circuit that transmits transmission. According to clause 9,
The controller further provides an operation control signal having different voltage levels in the first period and the second period to the first driver and the second driver through a control line,
The receiving buffers of the first driver and the second driver are turned on in the first period and turned off in the second period in response to the operation control signal,
The turn-on time of the reception buffer of the first driver is synchronized with the wake-up signal of the data processing unit,
The turn-on point of the receive buffer of the second driver is synchronized to the wake-up signal of the signal line, and
The display device wherein the transmission buffer of the first driver is turned on in the second period in response to the operation control signal. The method of claim 10, wherein the first driver:
a reception buffer control unit providing a reception control signal to the reception buffer; and
It further includes a transmission buffer control unit that provides a transmission control signal to the transmission buffer,
The reception buffer control unit turns on the reception buffer in the first period and turns it off in the second period in response to the operation control signal, and the turn-on time of the reception buffer is the wake-up of the data processor or the signal line. providing the receive control signal to be synchronized to the signal,
The display device wherein the transmission buffer control unit provides the transmission control signal to turn on the transmission buffer in the second period in response to the operation control signal when a selection control signal is provided from the data processing unit. The method of claim 9, wherein the transfer circuit is:
a selection control unit that outputs a selection control signal that determines a first case not selected by the read command and a second case selected by the read command during a touch period;
A wake-up signal that selects and outputs the wake-up signal of the signal line in the first case and selects and outputs the wake-up signal of the data processing unit in the second case by the selection control signal. selection part; and
A display device comprising: an output unit transmitting the wake-up signal output from the wake-up signal selection unit to the signal line. According to claim 12,
The output unit further receives a lock signal corresponding to a clock state of display data during the display period, and transmits the lock signal and the wake-up signal to the signal line. According to claim 13,
The output unit includes a switching element connected to the signal line,
The switching element is switched by the lock signal or the wake-up signal,
A display device wherein the signal line to which a pull-up voltage is applied is pulled up or pulled down according to the switching state of the switching element, thereby transmitting the lock signal or the wake-up signal. a receive buffer connected to an external bus and turned on in a first period for a read request during a read operation and turned off in a second period for a read data operation following a read command;
a transmission buffer connected to the bus, turned off in the first period, and turned on in the second period to transmit touch data when selected by the read command;
Receives the read command through the reception buffer, provides the touch data to the transmission buffer in the second period when selected by the read command, and generates a wake-up signal in response to the end of transmission of the touch data a data processing unit;
Receives the wake-up signal from an external signal line or the data processing unit, transmits the wake-up signal of the signal line to the signal line in the first case not selected by the read command, and responds to the read command a transmission circuit that transmits the wake-up signal of the data processing unit to the outside in the second case selected by; and
The turn-on and turn-off of the reception buffer and the transmission buffer are controlled in response to an operation control signal having a different voltage level in the first period and the second period, and the turn-on point of the reception buffer is the signal line or the data A driver for a display device comprising a buffer control unit that controls the processor to synchronize with the wake-up signal. The method of claim 15, wherein the buffer control unit,
a reception buffer control unit providing a reception control signal to the reception buffer; and
It further includes a transmission buffer control unit that provides a transmission control signal to the transmission buffer,
The reception buffer control unit turns on the reception buffer in the first period and turns it off in the second period in response to the operation control signal, and the turn-on time of the reception buffer is the wake-up of the data processor or the signal line. providing the receive control signal to be synchronized to the signal,
The transmission buffer control unit provides the transmission control signal to turn on the transmission buffer in the second period in response to the operation control signal when a selection control signal is provided from the data processing unit in the second case. 16. The method of claim 15, wherein the transfer circuit:
a selection control unit that outputs a selection control signal that determines the first case and the second case during a touch period;
A wake-up signal that selects and outputs the wake-up signal of the signal line in the first case and selects and outputs the wake-up signal of the data processing unit in the second case by the selection control signal. selection part; and
A driver of a display device comprising: an output unit transmitting the wake-up signal output from the wake-up signal selection unit to the signal line. According to claim 17,
The output unit further receives a lock signal corresponding to a clock state of display data during the display period, and transmits the lock signal and the wake-up signal to the signal line. According to clause 18,
The output unit includes a switching element,
The switching element is switched by the lock signal or the wake-up signal, thereby transmitting the lock signal or the wake-up signal to the outside. According to claim 15,
Equipped with a lock signal input terminal and a lock signal output terminal connected to the signal line,
A pull-up voltage of a preset level is applied to the signal line,
A driver of a display device that receives a lock signal corresponding to a clock state of display data through the signal line during a display period and receives the wake-up signal during a touch period.

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