KR102625945B1 - Display device and the method for driving the same - Google Patents

Abstract

These embodiments relate to a display device and a driving method thereof, and more specifically, to a display panel driven by a driving voltage, and a driving voltage capable of correcting the driving voltage by monitoring the driving voltage actually applied to the display panel. It relates to a display device including a monitoring circuit and a driving voltage supply circuit that outputs a corrected driving voltage, and a method of driving the same.
According to the present embodiments, the driving voltage can be stably and uniformly supplied to the display panel at a desired voltage value. In particular, even if the device size or resolution increases or the power system becomes more complex, the driving voltage can be uniformly and stably supplied to the display panel.

Description

Display device and its driving method {DISPLAY DEVICE AND THE METHOD FOR DRIVING THE SAME}

These embodiments relate to a display device and a method of driving the same.

As the information society develops, the demand for display devices for displaying images is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), Various display devices such as OLED (Organic Light Emitting Display Device) are being used.

This display device includes a driving voltage source for supplying the driving voltage required to drive the panel to the display panel, and driving voltage transmission components for transmitting the driving voltage from the driving voltage source to the display panel.

In order to drive the panel normally, the driving voltage must be transmitted to the display panel at a desired voltage value without a large voltage drop in the process of being transmitted along the driving voltage transmission configurations.

However, in reality, in the process of transmitting the driving voltage along the driving voltage transmission configurations, a voltage drop of the driving voltage occurs.

Such a voltage drop in the driving voltage may prevent normal panel operation, greatly reducing image quality.

Image quality degradation due to a drop in driving voltage can become more severe as the device size or resolution increases or the power system becomes more complex.

However, in the current trend where the length of the driving voltage transmission path is becoming longer, there is considerable difficulty in stably and uniformly supplying the driving voltage to the display panel at the desired voltage value so that the panel can be driven normally and stably. .

The purpose of the present embodiments is to provide a display device and a method of driving the same that can stably and uniformly supply a driving voltage to the display panel at a desired voltage value.

Another purpose of the present embodiments is to provide a display device and a method of driving the same that can monitor the driving voltage actually applied to the display panel and correct the driving voltage.

Another purpose of the present embodiments is to provide a display device and a method of driving the same that can uniformly and stably supply a driving voltage to the display panel even if the device size or resolution increases or the power system becomes more complex.

In one aspect, the present embodiments include a display panel in which a plurality of data lines and a plurality of gate lines are arranged and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged, and one part of the display panel. At least one source printed circuit board electrically connected to the side, an interface printed circuit board electrically connected to the source printed circuit board through one or more first cables, and electrically connected to the interface printed circuit board through one or more second cables. A display device can be provided that includes a connected control printed circuit board, a power board electrically connected to the control printed circuit board, and a driving voltage supply circuit located on the power board and outputting a driving voltage.

In such a display device, the driving voltage output from the driving voltage supply circuit may be a common voltage commonly applied to all subpixels to drive each subpixel arranged in the display panel.

In such a display device, the driving voltage output from the driving voltage supply circuit may be applied to the display panel through a power board, control printed circuit board, interface printed circuit board, and source printed circuit board.

The display device may further include a driving voltage monitoring circuit that monitors the voltage value of the driving voltage at the driving voltage input point to the display panel and determines a driving voltage correction value by comparing the monitored voltage value with the desired voltage value. .

The display device may further include a driving voltage monitoring line disposed from the source printed circuit board through the interface printed circuit board and the control printed circuit board to the power board.

Accordingly, the driving voltage supply circuit can correct and output the driving voltage according to the driving voltage correction value.

In another aspect, the present embodiments are a display panel in which a plurality of data lines and a plurality of gate lines are arranged, a plurality of subpixels defined by the plurality of data lines and a plurality of gate lines, and driven by a driving voltage are arranged. A method of driving a display device including a can be provided.

This driving method may include supplying a driving voltage to the display panel, monitoring the driving voltage supplied to the display panel, and correcting the driving voltage according to the monitoring results.

In another aspect, the present embodiments include a display panel in which a plurality of data lines and a plurality of gate lines are arranged, a plurality of subpixels defined by the plurality of data lines and a plurality of gate lines are arranged, and one end A circuit film electrically connected to one side of the display panel, a source driver integrated circuit mounted on the circuit film, a source printed circuit board electrically connected to the other end of the circuit film, and an electrical connection between the source printed circuit board and the source printed circuit board through one or more cables. A display device can be provided including a control printed circuit board connected to the display panel and a driving voltage supply circuit that outputs a driving voltage to be supplied to the display panel.

In such a display device, the driving voltage output from the driving voltage supply circuit may be a common voltage commonly applied to all subpixels to drive each subpixel arranged in the display panel.

In such a display device, the driving voltage output from the driving voltage supply circuit may be input to the display panel through a control printed circuit board and a source printed circuit board.

This display device may further include a driving voltage monitoring circuit that monitors the voltage value of the driving voltage at the driving voltage input point to the display panel and determines a driving voltage correction value by comparing the monitored voltage value with the desired voltage value. there is.

The driving voltage supply circuit can correct and output the driving voltage according to the driving voltage correction value.

According to the present embodiments as described above, there is an effect of providing a display device and a method of driving the same that can stably and uniformly supply a driving voltage to the display panel at a desired voltage value.

In addition, according to the present embodiments, there is an effect of providing a display device and a method of driving the same that can monitor the driving voltage actually applied to the display panel and correct the driving voltage.

In addition, according to the present embodiments, there is an effect of providing a display device and a method of driving the same that can uniformly and stably supply a driving voltage to the display panel even if the device size or resolution increases or the power system becomes complicated.

1 is a schematic system configuration diagram of a display device according to the present embodiments.
Figure 2 is an example diagram of a subpixel structure of a display device according to the present embodiments.
Figure 3 is another example diagram of the subpixel structure of the display device according to the present embodiments.
Figure 4 is an exemplary system implementation of a display device according to the present embodiments.
Figure 5 is a diagram showing the driving voltage transmission path and the voltage drop of the driving voltage on the driving voltage transmission path in the display device according to the present embodiments.
FIG. 6 is a diagram illustrating a circuit for compensating for a voltage drop in the driving voltage on the driving voltage transmission path in the display device according to the present embodiments.
FIG. 7 is a diagram showing a driving voltage monitoring path for compensating for a voltage drop in the driving voltage on the driving voltage transmission path in the display device according to the present embodiments, and a driving voltage corrected according to the voltage drop compensation for the driving voltage.
Figure 8 is a flowchart of a driving method for compensating for a voltage drop in the driving voltage on the driving voltage transmission path in the display device according to the present embodiments.

Hereinafter, some embodiments of the present invention will be described in detail with reference to the exemplary drawings. In adding reference numerals to components in each drawing, identical components may have the same reference numerals as much as possible even if they are shown in different drawings. Additionally, when describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the gist of the present invention, the detailed description may be omitted.

Additionally, when describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are only used to distinguish the component from other components, and the nature, sequence, order, or number of the components are not limited by the term. When a component is described as being “connected,” “coupled,” or “connected” to another component, that component may be directly connected or connected to that other component, but there are no other components between each component. It should be understood that may be “interposed” or that each component may be “connected,” “combined,” or “connected” through other components.

1 is a schematic system configuration diagram of the display device 100 according to the present embodiments.

Referring to FIG. 1, the display device 100 according to the present embodiments has a plurality of data lines DL and a plurality of gate lines GL, and a plurality of data lines DL and a plurality of gate lines A display panel 110 in which a plurality of subpixels (SP: Sub Pixels) defined by GL are arranged, a data driver 120 that drives a plurality of data lines DL, and a plurality of gate lines GL. ), a gate driver 130 that drives the data driver 120, and a timing controller 140 that controls the gate driver 130.

The timing controller 140 can control the data driver 120 and the gate driver 130 by supplying various control signals to the data driver 120 and the gate driver 130.

The timing controller 140 starts scanning according to the timing implemented in each frame, converts the input image data input from the outside to fit the data signal format used by the data driver 120, and outputs the converted image data. and controls data operation at an appropriate time according to the scan.

This timing controller 140 may be a control device that further performs other control functions.

This timing controller 140 may be implemented as a separate component from the data driver 120, or may be implemented as an integrated circuit together with the data driver 120.

The data driver 120 drives multiple data lines DL by supplying data voltages to the multiple data lines DL. Here, the data driver 120 is also called a 'source driver'.

This data driver 120 may include at least one source driver integrated circuit (SDIC) and drive multiple data lines DL.

Each source driver integrated circuit (SDIC) may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, etc.

In some cases, each source driver integrated circuit (SDIC) may further include an analog to digital converter (ADC).

The gate driver 130 sequentially drives a plurality of gate lines GL by sequentially supplying scan signals to the plurality of gate lines GL. Here, the gate driver 130 is also called a ‘scan driver’.

This gate driver 130 may include at least one gate driver integrated circuit (GDIC: Gate Driver Integrated Circuit).

Each gate driver integrated circuit (GDIC) may include a shift register, a level shifter, etc.

The gate driver 130 sequentially supplies scan signals of on voltage or off voltage to the plurality of gate lines GL under the control of the timing controller 140.

When a specific gate line is opened by the gate driver 130, the data driver 120 converts the image data received from the timing controller 140 into an analog data voltage and supplies it to the plurality of data lines DL.

As shown in FIG. 1, the data driver 120 may be located only on one side (e.g., the upper or lower side) of the display panel 110, and in some cases, the data driver 120 may be located on the display panel 110 depending on the driving method, panel design method, etc. ) may be located on both sides (e.g., upper and lower sides).

As shown in FIG. 1, the gate driver 130 may be located only on one side (e.g., left or right) of the display panel 110, and in some cases, may be located on the display panel (e.g., left or right) depending on the driving method, panel design method, etc. 110) may be located on both sides (e.g., left and right).

The timing controller 140 described above includes input video data, a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), an input data enable (DE: DATA Enable) signal, a clock signal (CLK), etc. Various timing signals are received from the outside (e.g. host system).

The timing controller 140 receives timing signals such as a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), an input DE signal, and a clock signal to control the data driver 120 and the gate driver 130. , various control signals are generated and output to the data driver 120 and the gate driver 130.

For example, the timing controller 140 uses a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE) to control the gate driver 130. : Outputs various gate control signals (GCS: Gate Control Signal) including Gate Output Enable.

Here, the gate start pulse (GSP) controls the operation start timing of one or more gate driver integrated circuits constituting the gate driver 130. The gate shift clock (GSC) is a clock signal commonly input to one or more gate driver integrated circuits, and controls the shift timing of a scan signal (gate pulse). The gate output enable signal (GOE) specifies timing information of one or more gate driver integrated circuits.

In addition, the timing controller 140 uses a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE) to control the data driver 120. Outputs various data control signals (DCS: DATA Control Signal) including Output Enable.

Here, the source start pulse (SSP) controls the data sampling start timing of one or more source driver integrated circuits constituting the data driver 120. The source sampling clock (SSC) is a clock signal that controls the sampling timing of data in each source driver integrated circuit. The source output enable signal (SOE) controls the output timing of the data driver 120.

The display device 100 according to the present embodiments may be various types of displays, such as a liquid crystal display, an organic light emitting display, and a plasma display.

The structure of each subpixel (SP) arranged in the display panel 110 according to the present embodiments may be designed in various ways depending on the display type.

When the display device 100 according to the present embodiments is an organic light emitting display device, each subpixel (SP) arranged in the display panel 110 is basically an organic light emitting diode (OLED: Organic Light), which is a self-light emitting device. It may be configured to include an emitting diode and a driving transistor for driving an organic light emitting diode (OLED).

The type and number of circuit elements constituting each subpixel (SP) may be determined in various ways depending on the provided function and design method.

Below, when the display device 100 according to the present embodiments is an organic light emitting display device, the structure of each subpixel (SP) arranged in the display panel 110 is exemplarily illustrated with reference to FIGS. 2 and 3. Explain.

Figure 2 is an example diagram of the subpixel structure of the display device 100 according to the present embodiments.

Referring to FIG. 2, in the display device 100 according to the present embodiments, each subpixel (SP) basically includes an organic light emitting diode (OLED) and a driving transistor ( DRT: Driving Transistor, a first transistor (T1) for transferring the data voltage to the first node (N1) corresponding to the gate node of the driving transistor (DRT), and a data voltage (VDATA) corresponding to the video signal voltage. Alternatively, it may be configured to include a storage capacitor (Cst) that maintains the corresponding voltage for one frame time.

An organic light emitting diode (OLED) may be composed of a first electrode (eg, an anode electrode or cathode electrode), an organic layer, and a second electrode (eg, a cathode electrode or anode electrode).

A base voltage (EVSS) may be applied to the second electrode of the organic light emitting diode (OLED).

The driving transistor (DRT) drives the organic light emitting diode (OLED) by supplying driving current to the organic light emitting diode (OLED).

The driving transistor DRT has a first node N1, a second node N2, and a third node N3.

The first node N1 of the driving transistor DRT is a node corresponding to the gate node and may be electrically connected to the source node or drain node of the first transistor T1.

The second node N2 of the driving transistor DRT may be electrically connected to the first electrode of the organic light emitting diode (OLED) and may be a source node or a drain node.

The third node (N3) of the driving transistor (DRT) is a node to which the driving voltage (EVDD) is applied, and can be electrically connected to the driving voltage line (DVL) that supplies the driving voltage (EVDD), and has a drain. It can be a node or a source node.

The first transistor T1 is electrically connected between the data line DL and the first node N1 of the driving transistor DRT, and can be controlled by receiving a scan signal SCAN to the gate node through the gate line. there is.

This first transistor (T1) is turned on by the scan signal (SCAN) and can transmit the data voltage (VDATA) supplied from the data line (DL) to the first node (N1) of the driving transistor (DRT). .

The storage capacitor Cst may be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT.

Figure 3 is another example diagram of the subpixel structure of the display device 100 according to the present embodiments.

Referring to FIG. 3, each subpixel disposed on the display panel 110 according to the present embodiments includes, for example, an organic light emitting diode (OLED), a driving transistor (DRT), a first transistor (T1), and a storage capacitor. In addition to (Cst), it may further include a second transistor (T2).

Referring to FIG. 3, the second transistor (T2) is electrically connected between the second node (N2) of the driving transistor (DRT) and the reference voltage line (RVL: Reference Voltage Line) that supplies the reference voltage (VREF: Reference Voltage). It is connected to and can be controlled by receiving a sensing signal (SENSE), a type of scan signal, through the gate node.

By further including the above-described second transistor T2, the voltage state of the second node N2 of the driving transistor DRT within the subpixel SP can be effectively controlled.

This second transistor (T2) is turned on by the sensing signal (SENSE) and applies the reference voltage (VREF) supplied through the reference voltage line (RVL) to the second node (N2) of the driving transistor (DRT). .

Additionally, the second transistor T2 may be used as one of the voltage sensing paths for the second node N2 of the driving transistor DRT.

Meanwhile, the scan signal (SCAN) and the sensing signal (SENSE) may be separate gate signals. In this case, the scan signal SCAN and the sensing signal SENSE may be applied to the gate node of the first transistor T1 and the gate node of the second transistor T2, respectively, through different gate lines.

In some cases, the scan signal (SCAN) and the sensing signal (SENSE) may be the same gate signal. In this case, the scan signal SCAN and the sensing signal SENSE may be commonly applied to the gate node of the first transistor T1 and the gate node of the second transistor T2 through the same gate line.

Referring to FIGS. 2 and 3 , the driving transistor (DRT), the first transistor (T1), and the second transistor (T2) may each be implemented as n-type or p-type.

2 and 3, the storage capacitor Cst is a parasitic capacitor (eg, an internal capacitor) existing between the first node N1 and the second node N2 of the driving transistor DRT. : Cgs, Cgd), but an external capacitor intentionally designed outside the driving transistor (DRT).

Figure 4 is an example system implementation of the display device 100 according to the present embodiments. However, in FIG. 4, the case where the display device 100 according to the present embodiments includes two source printed circuit boards (S-PCB_1 and S-PCB_2) is given as an example.

Referring to FIG. 4, the display device 100 according to the present embodiments includes a display panel 110 and one or more source printed circuit boards (S-PCB_1, S) electrically connected to one side of the display panel 110. -PCB_2), an interface printed circuit board (IF-PCB) electrically connected to the source printed circuit boards (S-PCB_1, S-PCB_2) through one or more first cables (FFC), and one or more second cables ( CC), includes a control printed circuit board (C-PCB) electrically connected to the interface printed circuit board (IF-PCB), and a power board (PB) electrically connected to the control printed circuit board (C-PCB). can do.

Referring to FIG. 4, the gate driver 120 may be implemented as a chip on film type.

In this case, the gate driver 120 includes a gate side circuit film (GF) electrically connected to the display panel 110 and a gate driver integrated circuit (GDIC) mounted on the gate side circuit film (GF). It can be.

Referring to FIG. 4, the data driver 120 may be implemented as a chip on film type.

In this case, the data driver 120 integrates a circuit film (SF) that electrically connects one side of the display panel 110 and one side of the source printed circuit board, and a source driver mounted on the circuit film (SF). It may further include a circuit (SDIC).

The source printed circuit boards (S-PCB_1, S-PCB_2) are printed circuit boards for supplying image data and various power sources to the data driver 120.

The number of source printed circuit boards may vary depending on the size of the display panel 110.

A controller 140, etc. may be mounted on the control printed circuit board (C-PCB).

Additional power management integrated circuits (PMIC: Power Management IC) may be mounted on the control printed circuit board (C-PCB).

An interface printed circuit board (IF-PCB) exists between the source printed circuit board (S-PCB_1, S-PCB_2) and the control printed circuit board (C-PCB).

The source printed circuit board (S-PCB_1, S-PCB_2) and the interface printed circuit board (IF-PCB) may be electrically connected through a first cable (FFC) corresponding to a flexible flat cable. .

The interface printed circuit board (IF-PCB) and the control printed circuit board (C-PCB) may be electrically connected through a second cable (CC) such as a harness cable.

A main controller, a main power controller, or a main power supply circuit may be mounted on the power board (PB).

The control printed circuit board (C-PCB) and power board (PB) can be electrically connected through a connection cable, etc.

Meanwhile, each subpixel (SP) arranged on the display panel 110 is driven using the driving voltage (EVDD).

This driving voltage (EVDD) is output from the power board (PB) and supplied to the display panel 110 through a predetermined path (driving voltage transmission path).

The driving voltage (EVDD) is output from the driving voltage supply circuit 400 located on the power board (PB).

The driving voltage (EVDD) output from the driving voltage output point (OUT) of the driving voltage supply circuit 400 is connected to the power board (PB), control printed circuit board (C-PCB), second cable (CC), and interface printing. Via the circuit board (IF-PCB), first cable (FFC), source printed circuit board (S-PCB-1, S-PCB-2), and source printed circuit board (S-PCB-1, S-PCB-2). 2) It is output to the phase driving voltage input point (IN).

That is, the driving voltage transmission path is power board (PB), control printed circuit board (C-PCB), second cable (CC), interface printed circuit board (IF-PCB), first cable (FFC), and source print. It consists of circuit boards (S-PCB-1, S-PCB-2), etc.

The driving voltage EVDD output from the driving voltage input point IN may be applied to the display panel 110 through the source side circuit film SF or source driver integrated circuit (SDIC).

That is, the driving voltage transmission path is power board (PB), control printed circuit board (C-PCB), second cable (CC), interface printed circuit board (IF-PCB), first cable (FFC), and source print. Along with the circuit boards (S-PCB-1 and S-PCB-2), it may further include a source side circuit film (SF) or a source driver integrated circuit (SDIC).

As described above, the data driver 120 is implemented as a chip-on-film type including a circuit film (SF) and a source driver integrated circuit (SDIC), and is connected to the source printed circuit board and the display panel through the circuit film (SF). By electrically connecting, the size of the connection area of the data driver 120 in the display panel 110 can be reduced. Through this, there is an advantage of being able to manufacture the display panel 110 with a small bezel.

FIG. 5 is a diagram showing the driving voltage transmission path and the voltage drop of the driving voltage EVDD on the driving voltage transmission path in the display device 100 according to the present embodiments.

According to the system implementation example of FIG. 4, as shown in FIG. 5, the driving voltage (EVDD) first output from the driving voltage supply circuit 400 is connected to the power board (PB) and the control printed circuit board (C-PCB). , chip-on-film type data via the second cable (CC), interface printed circuit board (IF-PCB), first cable (FFC), and source printed circuit board (S-PCB-1, S-PCB-2). It is applied to the display panel 110 through the driver 120.

Power board (PB), control printed circuit board (C-PCB), second cable (CC), interface printed circuit board (IF-PCB), first cable (FFC), source printed circuit board (S-PCB-1) , S-PCB-2), chip-on-film type data driver 120, etc. correspond to the driving voltage transmission path (EVDD Transmission Path).

If the driving voltage transmission path is connected to the driving voltage output point (OUT) on the power board (PB), the control printed circuit board (C-PCB), the second cable (CC), the interface printed circuit board (IF-PCB), and the 1 Through the cable (FFC) and source printed circuit board (S-PCB-1, S-PCB-2), the driving voltage input point (IN) on the source printed circuit board (S-PCB-1, S-PCB-2) ) can also be viewed as.

Referring to FIG. 5, as the size of the display panel 110 increases, the driving voltage transmission path becomes longer.

In particular, the length of the second cable (CC) that electrically connects the transmitter (TX) on the control printed circuit board (C-PCB) to the receiver (RX) on the interface printed circuit board (IF-PCB) is quite long.

As such, when the length of the driving voltage transmission path is long, a voltage drop of the driving voltage EVDD may occur on the driving voltage transmission path.

In this case, a driving voltage (EVDD) having a voltage value (Vb) lower than the desired target voltage value (Va) for normal panel driving is actually applied to the display panel 110.

If the voltage drop (Va-Vb) increases, normal panel operation may not be possible and image quality may significantly deteriorate.

Accordingly, the present embodiments provide a method and method for compensating for the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path.

FIG. 6 is a diagram illustrating a circuit for compensating for a voltage drop of the driving voltage EVDD on the driving voltage transmission path in the display device 100 according to the present embodiments, and FIG. 7 is a diagram showing the display device 100 according to the present embodiments. 100) is a diagram showing the driving voltage monitoring path for compensating for the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path, and the driving voltage (EVDD) corrected according to the voltage drop compensation of the driving voltage (EVDD).

Referring to FIG. 6, the circuit for compensating for the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path in the display device 100 according to the present embodiments includes one or more devices connected to one side of the display panel 110. A source printed circuit board (S-PCB_1, S-PCB_2), and an interface printed circuit board (IF-PCB) connected to the source printed circuit board (S-PCB_1, S-PCB_2) through one or more first cables (FFC), and , a control printed circuit board (C-PCB) electrically connected to the interface printed circuit board (IF-PCB) through one or more second cables (CC), and a power board (PB) connected to the control printed circuit board (C-PCB). ) and a driving voltage supply circuit 400 located on the power board (PB) and outputting a driving voltage (EVDD).

Referring to FIG. 6, the driving voltage (EVDD) output from the driving voltage supply circuit 400 is common to all subpixels (SP) in order to drive each subpixel (SP) arranged in the display panel 110. It may be an applied common voltage.

Referring to FIG. 6, the driving voltage (EVDD) output from the driving voltage supply circuit 400 is the power board (PB), control printed circuit board (C-PCB), interface printed circuit board (IF-PCB), and source. It can be applied to the display panel 110 through printed circuit boards (S-PCB_1, S-PCB_2).

Referring to FIG. 6, the circuit for compensating for the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path in the display device 100 according to the present embodiments includes a driving voltage input point (IN) to the display panel 110. ) may further include a driving voltage monitoring circuit 600 that monitors the voltage value of the driving voltage (EVDD) and determines a driving voltage correction value by comparing the monitored voltage value (Vb) and the desired voltage value (Va). there is.

The driving voltage supply circuit 400 may correct and output the driving voltage EVDD according to the driving voltage correction value.

According to the above, by monitoring the driving voltage (EVDD) actually applied to the display panel 110 and correcting the driving voltage (EVDD), even if a voltage drop of the driving voltage (EVDD) occurs on the driving voltage transmission path, A driving voltage (EVDD) that enables normal panel operation can be applied to the display panel 110.

The display device 100 according to the present embodiments further includes a separate driving voltage monitoring line 610 for the driving voltage monitoring circuit 600 to monitor the driving voltage (EVDD) applied to the display panel 110. can do.

The driving voltage monitoring line 610 is connected from the driving voltage input point (IN) on the source printed circuit board (S-PCB_1, S-PCB_2) to the interface printed circuit board (IF-PCB) and control printed circuit board (C-PCB). It can be deployed up to the power board (PB).

The driving voltage monitoring circuit 600 monitors the voltage value of the driving voltage (EVDD) (i.e., the voltage value of the driving voltage (EVDD) applied to the display panel 110) at the driving voltage input point (IN) through the driving voltage monitoring line. It can be monitored through (610).

The voltage value of the driving voltage (EVDD) actually applied to the display panel 110 can be accurately monitored through the driving voltage monitoring line 610 described above.

The driving voltage compensation method will be described with reference to FIG. 7.

For example, when little voltage drop occurs in the driving voltage monitoring line 610, the driving voltage monitoring circuit 600 displays the voltage value measured through the driving voltage monitor line 610 on the display panel 110. It will be almost the same as the voltage value (Vb) of the applied driving voltage (EVDD).

In this case, the driving voltage monitoring circuit 600 changes the measured value (Vb, which is almost the same as the voltage value actually applied to the display panel 110) from the voltage value (Va) output from the driving voltage supply circuit 400. By subtracting, the voltage drop in the driving voltage transmission path can be calculated, and the driving voltage correction value can be determined based on the calculated voltage drop.

The driving voltage correction value may be a value obtained by adding the voltage drop amount (Va-Vb) to the voltage value (Va) of the driving voltage (EVDD) previously output from the driving voltage supply circuit 400.

As another example, when the voltage drop in the driving voltage monitoring line 610 occurs the same as the voltage drop in the driving voltage transmission path, the driving voltage monitoring circuit 600 determines the voltage value measured through the driving voltage monitoring line 610. may be a voltage value where two voltage drops occur in the voltage value (Va) of the driving voltage (EVDD) output from the driving voltage supply circuit 400.

If it is assumed that the voltage drop in the driving voltage transmission path is Va-Vb and the voltage drop in the driving voltage monitoring line 610 is also Va-Vb, the driving voltage monitoring circuit 600 is connected to the driving voltage supply circuit 400. Subtract the voltage value (Va-(Va-Vb)-(Va-Vb)) measured through the driving voltage monitor line 610 from the voltage value (Va) of the driving voltage (EVDD) output from The voltage drop (Va-Vb) of the driving voltage transmission path can be calculated by dividing the obtained value (2Va-2Vb) by 2.

The driving voltage monitoring circuit 600 may determine a driving voltage correction value based on the calculated voltage drop amount (Va-Vb).

The driving voltage correction value may be a value obtained by adding the voltage drop amount (Va-Vb) to the voltage value (Va) of the driving voltage (EVDD) previously output from the driving voltage supply circuit 400.

As shown in FIG. 6, when there are two or more source printed circuit boards, the first source printed circuit boards (S-PCB_1, S-PCB_2) are the two source printed circuit boards located in the middle among the two or more source printed circuit boards. and the second source printed circuit board (S-PCB_1, S-PCB_2) may each be electrically connected to the interface printed circuit board (IF-PCB) through two first cables (FFC).

In addition, the interface printed circuit board (IF-PCB) and the control printed circuit board (C-PCB) include the first source printed circuit board (S-PCB_1, S-PCB_2) and the second source printed circuit board (S-PCB_1, It can be electrically connected through a second cable (CC) passing between S-PCB_2).

In addition, each of the first source printed circuit boards (S-PCB_1, S-PCB_2) and the second source printed circuit boards (S-PCB_1, S-PCB_2) is interface printed through one of the two first cables (FFC). The driving voltage (EVDD) output from the circuit board (IF-PCB) can be received.

Each of the first source printed circuit boards (S-PCB_1, S-PCB_2) and the second source printed circuit boards (S-PCB_1, S-PCB_2) integrates the delivered driving voltage (EVDD) into a circuit film (SF) or a source driver. It can be applied to the display panel 110 through a circuit (SDIC).

According to the above-described structure, it is possible to provide a driving circuit structure suitable for a large display device 100 in which two or more source printed circuit boards exist.

When the display panel 1100 according to the present embodiments is an organic light emitting display panel, as described above, in the display panel 110, each subpixel SP is basically an organic light emitting diode (OLED) and an organic light emitting diode (OLED). A driving transistor (DRT) for driving a light emitting diode (OLED), a first transistor (T1) electrically connected between the gate node of the driving transistor (DRT) and the data line (DL), and a voltage maintained for one frame time. It may be configured to include a storage capacitor (Cst), etc.

The above-mentioned driving voltage EVDD may be applied to the display panel 110 and supplied to the drain node or source node corresponding to the third node N3 of the driving transistor DRT.

Therefore, by monitoring and correcting the driving voltage (EVDD) applied to the display panel 110, which is an organic light emitting display panel, the driving voltage (EVDD) having the desired voltage value can be applied to the display panel 110. . Accordingly, image quality can be improved by providing stable panel operation, and unnecessary shortening of the lifespan of organic light-emitting diodes (OLEDs) can be prevented.

The driving voltage monitoring circuit 600 compares the voltage value monitored through the driving voltage monitoring line 610 with a preset desired voltage value and determines a driving voltage correction value based on the difference between the desired voltage value and the monitored voltage value. You can.

For example, when the voltage value monitored through the driving voltage monitoring line 610 is lower than the desired voltage value, that is, when a voltage drop occurs, the driving voltage monitoring circuit 600 determines the difference between the desired voltage value and the monitored voltage value. Based on the difference (voltage drop amount), the driving voltage correction value can be determined.

The driving voltage monitoring circuit 600 may provide the determined driving voltage correction value to the driving voltage supply circuit 400.

Accordingly, the driving voltage supply circuit 400 can output the driving voltage EVDD corresponding to the driving voltage correction value (voltage value).

According to the above, when the voltage value of the driving voltage (EVDD) that enables normal panel driving is not applied to the display panel 110, it is accurately corrected to the voltage value of the driving voltage (EVDD) that enables normal panel driving. I can do it.

Referring to FIG. 7, the driving voltage compensation method will be described as an example.

It is assumed that a driving voltage (EVDD) having a voltage value of Va is desired to be applied to the display panel 110, and the driving voltage supply circuit 400 outputs a driving voltage (EVDD) having a voltage value of Va.

The driving voltage EVDD output from the driving voltage supply circuit 400 undergoes a voltage drop while passing through the driving voltage transmission path.

Accordingly, the voltage value of the driving voltage EVDD actually applied to the display panel 110 is Vb, which is a voltage value lower than Va.

Here, the amount of voltage drop occurring on the driving voltage transmission path is Va-Vb.

The driving voltage monitoring circuit 600 can monitor Vb, which is a voltage value of the driving voltage EVDD that is actually applied to the display panel 110.

The driving voltage monitoring circuit 600 determines the voltage value (Va) of the driving voltage (EVDD) output from the driving voltage supply circuit 400 and the voltage value (Vb) of the driving voltage (EVDD) actually applied to the display panel 110. ), the voltage drop (Va-Vb) can be predicted and calculated.

The driving voltage monitoring circuit 600 determines the voltage drop amount ( Va-Vb) can be calculated.

The driving voltage monitoring circuit 600 determines the driving voltage correction value (Va_COMP) based on the calculated voltage drop amount (Va-Vb).

Here, the voltage difference between the driving voltage correction value (Va_COMP) and the previously output voltage value (Va) is the voltage drop between the previously output voltage value (Va) and the previously output voltage value (Va) and the display panel 110. ), which corresponds to the voltage difference between the actually applied voltage value (Vb).

As an example, the driving voltage monitoring circuit 600 corrects the driving voltage by adding the voltage drop amount (Va-Vb) calculated from the voltage value (Va) of the driving voltage (EVDD) previously output from the driving voltage supply circuit 400. Determine the value (Va+(Va-Vb)).

Accordingly, the driving voltage supply circuit 400 corrects the output voltage value of the driving voltage EVDD to the driving voltage correction value Va+(Va-Vb) and outputs it.

In this case, as shown in FIG. 7, even if a voltage drop of as much as Va-Vb occurs on the driving voltage transmission path, the voltage value of the driving voltage EVDD actually applied to the display panel 110 is the display panel ( 110) may be the voltage value Va of the driving voltage (EVDD) desired to be applied.

FIG. 8 is a flowchart of a driving method for compensating for a voltage drop in the driving voltage EVDD on the driving voltage transmission path in the display device 100 according to the present embodiments.

Referring to FIG. 8, the display device 100 according to the present embodiments has a plurality of data lines DL and a plurality of gate lines GL, and a plurality of data lines DL and a plurality of gate lines A method of driving a display device 100 including a display panel 110 arranged with a plurality of subpixels SP defined by (GL) and driven by a driving voltage (EVDD) can be provided.

This driving method is for compensating for the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path.

Referring to FIG. 8, the method of driving the display device 100 according to the present embodiments includes supplying the driving voltage EVDD to the display panel 110 (S810), and supplying the driving voltage EVDD to the display panel 110. It may include monitoring the driving voltage (EVDD) (S820) and correcting the driving voltage (EVDD) according to the monitoring results (S830).

In step S810, the driving voltage supply circuit 400 outputs the driving voltage EVDD.

The driving voltage (EVDD) output from the driving voltage supply circuit 400 is transmitted to the source printed circuit board along a designated driving voltage transmission path and is transmitted to the display panel 110 through the chip-on-film type data driver 120. It can be approved as .

In step S820, the driving voltage monitoring circuit 600 may monitor (measure) the driving voltage (EVDD) actually applied to the display panel 110 through the driving voltage monitoring line 610.

Here, the driving voltage monitoring line 610 is a line arranged to correspond to the driving voltage transmission path and is a combination of segmented lines.

In step S830, the driving voltage monitoring circuit 600 determines the amount of voltage drop on the driving voltage transmission path based on the monitoring result, and corresponds to the voltage value of the corrected driving voltage (EVDD) to compensate for the identified amount of voltage drop. The driving voltage correction value can be determined.

Using the above-described driving method, the driving voltage (EVDD) actually applied to the display panel 110 is monitored and the driving voltage (EVDD) is corrected, so that the voltage drop of the driving voltage (EVDD) on the driving voltage transmission path is reduced. Even if this occurs, the driving voltage (EVDD) that enables normal panel operation can be stably applied to the display panel 110.

The “driving voltage transmission path” mentioned above includes the power board (PB), control printed circuit board (C-PCB), second cable (CC), interface printed circuit board (IF-PCB), It may include a first cable (FFC), a source printed circuit board (S-PCB-1, S-PCB-2), and a source side circuit film (SF) or source driver integrated circuit (SDIC). It can be done including.

Therefore, the driving voltage (EVDD) output from the driving voltage supply circuit 400 is output from the output point (OUT) of the driving voltage supply circuit 400, and is output to the power board (PB) and the control printed circuit board (C-PCB). ), it can be supplied to the display panel 110 through the interface printed circuit board (IF-PCB) and the source printed circuit board (S-PCB_1, S-PCB_2), and through the driving voltage input point (IN).

Even in the case of a system structure in which the driving voltage transmission path is inevitably very long, using the driving method according to the present embodiments allows for a normal panel by compensating for a fairly large voltage drop that occurs on a fairly long driving voltage transmission path. The driving voltage (EVDD) that enables driving can be stably supplied to the display panel 110.

The above-mentioned driving voltage transmission path is divided into the power board (PB), control printed circuit board (C-PCB), and second cable depending on system implementation changes (e.g. cable deletion, printed circuit board deletion, printed circuit board integration, etc.). (CC), interface printed circuit board (IF-PCB), first cable (FFC), source printed circuit board (S-PCB-1, S-PCB-2), etc. may not be included.

For example, the source printed circuit board (S-PCB-1, S-PCB-2) is electrically connected to the control printed circuit board (C-PCB) through a connection cable, and the control printed circuit board (C-PCB) For system implementation electrically connected to this power board (PB), the power board (PB), control printed circuit board (C-PCB), connection cable, source printed circuit board (S-PCB-1, S-PCB-2) ) A driving voltage transmission path consisting of can be created. In other words, a driving voltage transmission path without an interface printed circuit board (IF-PCB) can be created.

As described above, the display device 100 according to the present embodiments, which is designed as a system with a driving voltage transmission path without an interface printed circuit board (IF-PCB), will be briefly described.

The display device 100 according to the present embodiments has a plurality of data lines (DL) and a plurality of gate lines (GL) arranged, and is defined by the plurality of data lines (DL) and a plurality of gate lines (GL). A display panel 110 in which a plurality of subpixels (SP) are arranged, a circuit film (SF) at one end connected to one side of the display panel 110, and a source driver integrated circuit mounted on the circuit film (SF). (SDIC) and the source printed circuit board (S-PCB_1, S-PCB_2) connected to the other end of the circuit film (SF), and the source printed circuit board (S-PCB_1) via one or more cables (e.g. flexible flat cable) , S-PCB_2) and a control printed circuit board (C-PCB) electrically connected to the display panel 110, and a driving voltage supply circuit 400 that outputs a driving voltage (EVDD) to be supplied to the display panel 110.

The driving voltage (EVDD) output from the driving voltage supply circuit 400 is a common voltage commonly applied to all subpixels (SP) to drive each subpixel (SP) arranged in the display panel 110, It can be input to the display panel 110 through the control printed circuit board (C-PCB) and source printed circuit board (S-PCB_1, S-PCB_2).

The display device 100 monitors the voltage value of the driving voltage (EVDD) at the driving voltage input point (IN) to the display panel 110, and compares the monitored voltage value with the desired voltage value to determine the driving voltage correction value. It may further include a driving voltage monitoring circuit 600.

The driving voltage supply circuit 400 may correct and output the driving voltage EVDD according to the driving voltage correction value.

According to the above, the display device 100 adjusts the driving voltage (EVDD) applied to the display panel 110 even in response to a driving voltage voltage drop on the driving voltage transmission path without an interface printed circuit board (IF-PCB), etc. Through monitoring and driving voltage compensation, the driving voltage (EVDD) that enables normal panel operation can be applied to the display panel 110.

Meanwhile, a driving voltage monitoring circuit 600 designed to monitor the driving voltage (EVDD) applied to the display panel 110 along the driving voltage transmission path shown in FIGS. 4 and 6 is installed on an interface printed circuit board (IF-PCB). ) and/or cables (CC, FFC), etc. when applied to a system in which the interface printed circuit board (IF-PCB) and/or cables (CC, FFC), etc. are removed, the voltage increase due to the deletion of the interface printed circuit board (IF-PCB) and/or cables (CC, FFC), etc. is also calculated using the driving method described above. According to , it will be possible to properly compensate for the driving voltage (EVDD) that enables normal panel operation.

According to the present embodiments as described above, there is an effect of providing a display device 100 and a method of driving the same that can stably and uniformly supply the driving voltage EVDD to the display panel at a desired voltage value.

In addition, according to the present embodiments, there is an effect of providing a display device 100 and a method of driving the same that can monitor the driving voltage (EVDD) actually applied to the display panel 110 and correct the driving voltage.

In addition, according to the present embodiments, a display device 100 capable of uniformly and stably supplying the driving voltage EVDD to the display panel 110 even if the device size or resolution increases or the power system becomes more complex, and the display device 100 and the same It has the effect of providing a driving method.

The above description and attached drawings are merely illustrative of the technical idea of the present invention, and those skilled in the art will be able to combine the components without departing from the essential characteristics of the present invention. , various modifications and transformations such as separation, substitution, and change will be possible. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

100: display device
110: display panel
120: data driver
130: gate driver
140: Timing controller
400: Driving voltage supply circuit
600: Driving voltage monitoring circuit
610: Driving voltage monitoring line
S-PCB-1, SPCB-2: Source printed circuit board
IF-PCB: Interface printed circuit board
C-PCB: Control printed circuit board
PB: power board

Claims (9)

a display panel on which a plurality of data lines and a plurality of gate lines are arranged, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged;
One or more source printed circuit boards electrically connected to one side of the display panel;
an interface printed circuit board electrically connected to the source printed circuit board through one or more first cables;
a control printed circuit board electrically connected to the interface printed circuit board through one or more second cables;
a power board electrically connected to the control printed circuit board;
A driving voltage supply circuit located on the power board and outputting a driving voltage, and
It includes a driving voltage monitoring line disposed from the source printed circuit board to the power board via the interface printed circuit board and the control printed circuit board,
The driving voltage output from the driving voltage supply circuit is,
A common voltage commonly applied to all subpixels to drive each subpixel arranged in the display panel,
is applied to the display panel through the power board, the control printed circuit board, the interface printed circuit board, and the source printed circuit board,
The voltage value of the driving voltage is monitored at the driving voltage input point to the display panel using the driving voltage monitoring line located on the source printed circuit board, and the driving voltage correction value is calculated by comparing the monitored voltage value with the desired voltage value. Further comprising a driving voltage monitoring circuit that determines,
The driving voltage supply circuit corrects and outputs a driving voltage according to the driving voltage correction value,
The driving voltage monitoring circuit subtracts the voltage value measured through the driving voltage monitoring line from the voltage value of the driving voltage output from the driving voltage supply circuit, and divides the value obtained by subtraction by 2 to obtain the voltage drop in the driving voltage transmission path. A display device that calculates and determines the driving voltage correction value based on the calculated voltage drop. delete According to paragraph 1,
a circuit film electrically connecting one side of the display panel and one side of the source printed circuit board;
Further comprising a source driver integrated circuit mounted on the circuit film,
A display device in which the driving voltage output from the driving voltage input point is applied to the display panel through the circuit film. According to paragraph 1,
The driving voltage monitoring circuit is,
When the monitored voltage value is lower than the desired voltage value, a display device that determines a driving voltage correction value based on the difference between the desired voltage value and the monitored voltage value. According to paragraph 1,
In the display panel, each subpixel is,
Organic light emitting diode,
A driving transistor for driving the organic light emitting diode,
A first transistor electrically connected between the gate node of the driving transistor and the data line,
Includes a storage capacitor to maintain voltage during one frame time,
The driving voltage applied to the display panel is,
A display device supplied to the drain node or source node of the driving transistor. According to paragraph 1,
If it contains two or more source printed circuit boards,
Among the two or more source printed circuit boards, each of the first source printed circuit board and the second source printed circuit board is electrically connected to the interface printed circuit board through two first cables,
The interface printed circuit board and the control printed circuit board,
Electrically connected through a second cable passing between the first source printed circuit board and the second source printed circuit board,
Each of the first source printed circuit board and the second source printed circuit board,
A display device that receives the driving voltage output from the interface printed circuit board through one of the two first cables. Driving a display device including a display panel on which a plurality of data lines and a plurality of gate lines are arranged, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines and driven by a driving voltage are arranged. In the method,
supplying the driving voltage output from the driving voltage supply circuit to the display panel through a power board, a control printed circuit board, an interface printed circuit board, and a source printed circuit board;
The driving voltage supplied to the display panel at the driving voltage input point to the display panel using a driving voltage monitoring line disposed from the source printed circuit board through the interface printed circuit board and the control printed circuit board to the power board. monitoring; and
Comprising a step of correcting the driving voltage according to the monitoring results,
The step of monitoring the driving voltage is to subtract the voltage value measured through the driving voltage monitoring line from the voltage value of the driving voltage output from the driving voltage supply circuit, and divide the value obtained by dividing by 2 to determine the driving voltage transmission path. A method of driving a display device that calculates a voltage drop and determines a driving voltage correction value based on the calculated voltage drop. delete a display panel on which a plurality of data lines and a plurality of gate lines are arranged, and a plurality of subpixels defined by the plurality of data lines and the plurality of gate lines are arranged;
a circuit film, one end of which is electrically connected to one side of the display panel, and a source driver integrated circuit mounted on the circuit film;
a source printed circuit board electrically connected to the other end of the circuit film;
a control printed circuit board electrically connected to the source printed circuit board through one or more cables;
A driving voltage supply circuit that outputs a driving voltage to be supplied to the display panel, and
It includes a driving voltage monitoring line disposed from the source printed circuit board through the control printed circuit board to the driving voltage supply circuit,
The driving voltage output from the driving voltage supply circuit is,
A common voltage commonly applied to all subpixels to drive each subpixel arranged in the display panel,
input to the display panel through the control printed circuit board and the source printed circuit board,
The voltage value of the driving voltage is monitored at the driving voltage input point to the display panel using the driving voltage monitoring line located on the source printed circuit board, and the driving voltage correction value is calculated by comparing the monitored voltage value with the desired voltage value. Further comprising a driving voltage monitoring circuit that determines,
The driving voltage supply circuit corrects and outputs a driving voltage according to the driving voltage correction value,
The driving voltage monitoring circuit subtracts the voltage value measured through the driving voltage monitoring line from the voltage value of the driving voltage output from the driving voltage supply circuit, and divides the value obtained by subtraction by 2 to obtain the voltage drop in the driving voltage transmission path. A display device that calculates and determines the driving voltage correction value based on the calculated voltage drop.

Images