KR102598198B1 - Light Emitting Display Device - Google Patents

Abstract

The present invention provides a light emitting display device including a display panel, a first circuit unit, and a second circuit unit. The display panel includes pixels. The first circuit unit supplies data voltages to the data lines of the pixels. The second circuit unit includes sampling circuits that sense and sample the sensing lines of pixels, a mux unit that time-divides the sensing values output from the sampling circuit units, and converts the analog sensing values output from the mux unit into digital sensing values. and a second circuit unit including a sensing circuit unit that outputs an output. The mux unit includes a plurality of mux switches, and at least one of the plurality of mux switches may remain turned on from the period of supplying the data voltage to the data line to the period of sensing and sampling the sensing line.

Description

Light Emitting Display Device

The present invention relates to a light emitting display device.

As information technology develops, the market for display devices, which are a connecting medium between users and information, is growing. Accordingly, the use of display devices such as light emitting display (LED), quantum dot display (QDD), and liquid crystal display (LCD) is increasing.

The display devices described above include a display panel including subpixels, a driver that outputs a driving signal to drive the display panel, and a power supply that generates power to be supplied to the display panel or the driver.

The above display devices can display images by transmitting light or emitting light directly when driving signals, such as scan signals and data signals, are supplied to the subpixels formed on the display panel. .

Meanwhile, among the display devices described above, the light emitting display device has many advantages such as electrical and optical characteristics such as fast response speed, high brightness, and wide viewing angle, as well as mechanical characteristics that can be implemented in a flexible form. However, light emitting display devices still have room for improvement in the composition of the compensation circuit, so continuous research in this regard is necessary.

The present invention to solve the problems of the background technology described above is to shorten the sensing time by performing multi-sensing and sampling of the sensing lines. In addition, the present invention improves the loss of sensing time by preventing signal transmission delays in the operation and flow of the device during the sensing value acquisition process. Additionally, the present invention improves sensing time loss even without multi-sensing.

As a means of solving the above-described problem, the present invention provides a light emitting display device including a display panel, a first circuit unit, and a second circuit unit. The display panel includes pixels. The first circuit unit supplies data voltages to the data lines of the pixels. The second circuit unit includes sampling circuits that sense and sample the sensing lines of pixels, a mux unit that time-divides the sensing values output from the sampling circuit units, and converts the analog sensing values output from the mux unit into digital sensing values. and a second circuit unit including a sensing circuit unit that outputs an output. The mux unit includes a plurality of mux switches, and at least one of the plurality of mux switches may remain turned on from the period of supplying the data voltage to the data line to the period of sensing and sampling the sensing line.

The first mux switch among the plurality of mux switches may be turned off in synchronization with the falling edge of the first sampling control signal generated to sample the first sensing line among the sensing lines.

The second mux switch among the plurality of mux switches may be turned off in synchronization with the falling edge of the second sampling control signal generated to sample the second sensing line among the sensing lines.

The first mux switch unit and the second mux switch unit may be simultaneously turned on until the first sampling control signal is generated.

The second mux switch can remain turned on for a longer time than the first mux switch.

Among the multiple mux switches, the second mux switch may be in a turn-on state while supplying the data voltage to the data line.

The second mux switch may have two turn-on states from the period of supplying the data voltage to the data line to the period of sensing and sampling the sensing line.

The second mux switch is turned on in synchronization with the falling edge of the first sampling control signal, which is generated to sample the first sensing line among the sensing lines, and the second sampling signal is generated to sample the second sensing line among the sensing lines. It can be turned off in synchronization with the falling edge of the control signal.

The turn-on time of the second mux switch during the period of supplying the data voltage to the data line may be the same as the turn-on time of the second mux switch during the period of sensing and sampling the sensing line.

The turn-on time of the second mux switch during the period of supplying the data voltage to the data line may be different from the turn-on time of the second mux switch during the period of sensing and sampling the sensing line.

The time for which the second mux switch maintains the turn-on state during the period of sensing and sampling the sensing line may be variable.

While the first mux switch unit is turned on, the sensing circuit unit senses the first sensing line connected to the first pixel through the first mux switch unit, and while the second mux switch unit is turned on, the sensing circuit unit senses the first sensing line connected to the first pixel through the first mux switch unit. The second sensing line connected to 2 pixels can be sensed.

The second circuit unit may sense the sensing lines of the pixels sequentially, non-sequentially, or randomly in response to the mux control signal that controls the mux unit.

Among the plurality of mux switches, the first mux switch and the second mux switch may be turned on simultaneously in synchronization with the generation of a scan signal applied to supply a data voltage to the data line.

Among the multiple mux switches, the first mux switch and the second mux switch are turned on at the same time, but the turn-off time may be different.

The present invention has the effect of shortening the sensing time by performing multi-sensing and sampling of the sensing lines by charging the sensing lines with a certain time difference in the program stage and then operating the mux unit sequentially. In addition, the present invention has the effect of improving sensing time loss (preventing and improving charge mobility delay) by preventing signal transmission delays in the operation and flow of the device during the sensing value acquisition process. In addition, the present invention has the effect of improving sensing time loss even without multi-sensing by using a method of turning on the mux switch on the side where sensing is performed in the mux unit for a long time.

1 is a block diagram schematically showing an organic light emitting display device according to a first embodiment of the present invention.
FIG. 2 is a schematic configuration diagram of the subpixel shown in FIG. 1.
3 is an equivalent circuit diagram showing a subpixel including a compensation circuit according to the first embodiment of the present invention.
FIGS. 4 and 5 are example diagrams of pixels that can be implemented based on the subpixel of FIG. 3.
Figure 6 is a first example diagram showing the main blocks of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention.
7 and 8 are second exemplary diagrams showing main blocks of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention.
Figure 9 is a first example diagram showing a mux unit of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention.
Figure 10 is an example of an internal block of the mux unit shown in Figure 9.
Figure 11 is a second example diagram showing a mux unit of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention.
12 to 15 are diagrams for explaining a method of driving an organic light emitting display device having a compensation circuit according to a first embodiment of the present invention.
16 to 18 are diagrams for explaining a method of driving an organic light emitting display device with a compensation circuit according to a second embodiment of the present invention.

Hereinafter, specific details for implementing the present invention will be described with reference to the attached drawings.

The light emitting display device according to the present invention can be implemented in a television, video player, personal computer (PC), home theater, automobile electric device, smartphone, etc., but is not limited thereto.

In addition, the light emitting display device described below includes an organic light emitting display device implemented based on an organic light emitting diode, as well as an inorganic light emitting display device implemented based on an inorganic light emitting diode. It can also be applied to Emitting Display Device). However, hereinafter, an organic electroluminescent display device will be described as an example.

Additionally, the organic light emitting display device described below performs an image display operation and an external compensation operation. The external compensation operation can be performed on a sub-pixel basis or a pixel basis. The external compensation operation may be performed in a vertical blank section during the image display operation, in a power-on sequence section before image display begins, or in a power-off sequence section after image display ends.

The vertical blank section is a section in which data signals for video display are not written, and is disposed between vertical active sections where data signals for one frame are written. The power-on sequence period refers to the period from when the power to drive the device is turned on until the image is displayed. The power-off sequence section refers to the section from the end of video display until the power to drive the device is turned off.

The external compensation method that performs this external compensation operation operates the driving transistor in a source follower method and then senses the voltage (source voltage of the driving TFT) stored in the line capacitor (parasitic capacitor) of the sensing line. The external compensation method uses the source voltage when the source node potential of the driving transistor is in a saturation state (i.e., when the current (Ids) of the driving TFT becomes zero) to compensate for the threshold voltage deviation of the driving transistor. Sensing. And the external compensation method senses the value of the linear state before the source node of the driving transistor reaches the saturation state in order to compensate for the mobility deviation of the driving transistor.

In addition, the subpixel described below includes an n-type thin film transistor as an example, but it may also be implemented as a p-type thin film transistor or a combination of n-type and p-type. A thin film transistor is a three-electrode device including a gate, source, and drain. The source is an electrode that supplies carriers to the transistor. Within a thin film transistor, carriers begin to flow from a source. The drain is the electrode through which carriers go out in a thin film transistor. That is, in a thin film transistor, carriers flow from the source to the drain.

In the case of an n-type thin film transistor, because the carriers are electrons, the source voltage has a lower voltage than the drain voltage so that electrons can flow from the source to the drain. In an n-type thin film transistor, since electrons flow from the source to the drain, the direction of current flows from the drain to the source. In contrast, in the case of a p-type thin film transistor, since the carrier is a hole, the source voltage is higher than the drain voltage so that holes can flow from the source to the drain. In a p-type thin film transistor, current flows from the source to the drain because holes flow from the source to the drain. However, the source and drain of a thin film transistor can change depending on the applied voltage. Reflecting this, in the following description, one of the source and drain will be described as the first electrode, and the other one of the source and drain will be described as the second electrode.

<First embodiment>

FIG. 1 is a block diagram schematically showing an organic light emitting display device according to a first embodiment of the present invention, and FIG. 2 is a configuration diagram schematically showing the subpixel shown in FIG. 1.

As shown in Figures 1 and 2, the organic light emitting display device according to the first embodiment of the present invention includes an image supply unit 110, a timing control unit 120, a scan driver 130, a data driver 140, A display panel 150 and a power supply unit 180 are included.

The image supply unit 110 (or host system) outputs various driving signals in addition to image data signals supplied from the outside or image data signals stored in internal memory. The image supply unit 110 may supply data signals and various driving signals to the timing control unit 120.

The timing control unit 120 includes a gate timing control signal (GDC) for controlling the operation timing of the scan driver 130, a data timing control signal (DDC) for controlling the operation timing of the data driver 140, and various synchronization signals ( Outputs the vertical synchronization signal (Vsync) and the horizontal synchronization signal (Hsync).

The timing control unit 120 supplies the data signal DATA supplied from the image supply unit 110 along with the data timing control signal DDC to the data driver 140. The timing control unit 120 may be formed in the form of an integrated circuit (IC) and mounted on a printed circuit board, but is not limited to this.

The scan driver 130 outputs a scan signal (or scan voltage) in response to a gate timing control signal (GDC) supplied from the timing controller 120. The scan driver 130 supplies scan signals to subpixels included in the display panel 150 through scan lines GL1 to GLm. The scan driver 130 may be formed in the form of an IC or directly on the display panel 150 using a gate in panel method, but is not limited thereto.

The data driver 140 samples and latches the data signal (DATA) in response to the data timing control signal (DDC) supplied from the timing control unit 120 and converts the digital data signal into analog data based on the gamma reference voltage. Converts to voltage and outputs.

The data driver 140 supplies data voltage to subpixels included in the display panel 150 through the data lines DL1 to DLn. The data driver 140 may be formed in the form of an IC and mounted on the display panel 150 or on a printed circuit board, but is not limited thereto.

The power supply unit 180 generates and outputs a high-potential first power source (EVDD) and a low-potential second power source (EVSS) based on an external input voltage. The power supply unit 180 provides not only the first and second power supplies (EVDD, EVSS) but also the voltage (e.g., scan high voltage, scan low voltage) required to drive the scan driver 130 or the data driver 140. Voltages (drain voltage, half-drain voltage), etc. can be generated and output.

The display panel 150 receives a driving signal including a scan signal and a data voltage output from a driving unit including the scan driving unit 130 and a data driving unit 140, and first and second power supplies output from the power supply unit 180 ( Displays images in response to EVDD, EVSS). Subpixels of the display panel 150 directly emit light.

The display panel 150 may be manufactured based on a rigid or flexible substrate such as glass, silicon, or polyimide. And the subpixels that emit light may be composed of pixels containing red, green, and blue, or pixels containing red, green, blue, and white.

For example, one subpixel (SP) includes a pixel circuit (PC) including a switching transistor (SW), a driving transistor, a storage capacitor, and an organic light emitting diode. Subpixels (SP) used in organic light emitting displays emit light directly, so the circuit configuration is complex. In addition, there are various compensation circuits that compensate for the deterioration of not only the organic light-emitting diode that emits light, but also the driving transistor that supplies driving current to the organic light-emitting diode. Therefore, please refer to the fact that the pixel circuit (PC) included in the subpixel (SP) is shown in block form.

Meanwhile, in the above description, the timing control unit 120, scan driver 130, data driver 140, etc. were described as if they were individual components. However, depending on the implementation method of the organic light emitting display device, one or more of the timing control unit 120, scan driver 130, and data driver 140 may be integrated into one IC.

Figure 3 is an equivalent circuit diagram showing a subpixel including a compensation circuit according to the first embodiment of the present invention, and Figures 4 and 5 are example diagrams of pixels that can be implemented based on the subpixel of Figure 3.

As shown in FIG. 3, the subpixel including the compensation circuit according to the first embodiment of the present invention includes a switching transistor (SW), a sensing transistor (ST), a driving transistor (DT), a capacitor (CST), and an organic Includes light emitting diodes (OLED).

The switching transistor SW has a gate electrode connected to the 1A scan line GL1a, a first electrode connected to the first data line DL1, and a second electrode connected to the gate electrode of the driving transistor DT. The driving transistor (DT) has a gate electrode connected to the capacitor (CST), a first electrode connected to the first power line (EVDD), and a second electrode connected to the anode electrode of the organic light emitting diode (OLED).

The capacitor CST has a first electrode connected to the gate electrode of the driving transistor DT and a second electrode connected to the anode electrode of the organic light emitting diode (OLED). The organic light emitting diode (OLED) has an anode connected to the second electrode of the driving transistor (DT) and a cathode electrode connected to the second power line (EVSS).

The sensing transistor (ST) has a gate electrode connected to the first B scan line (GL1b), a first electrode connected to the first sensing line (VREF1), and a second electrode connected to the anode electrode of the organic light emitting diode (OLED), which is a sensing node. connected. The sensing transistor (ST) is a compensation circuit added to sense the deterioration or threshold voltage of the driving transistor (DT) and organic light-emitting diode (OLED). The sensing transistor (ST) acquires the sensing value through the sensing node defined between the driving transistor (DT) and the organic light-emitting diode (OLED). The sensing value obtained from the sensing transistor (ST) is transmitted to an external compensation circuit provided outside the subpixel through the first sensing line (VREF1).

The 1A scan line (GL1a) connected to the gate electrode of the switching transistor (SW) and the 1B scan line (GL1b) connected to the gate electrode of the sensing transistor (ST) have a separate structure or a common structure as shown. can be taken. The gate electrode common connection structure can reduce the number of scan lines and, as a result, prevent a decrease in the aperture ratio due to the addition of a compensation circuit.

As shown in FIGS. 4 and 5 , the first to fourth subpixels SP1 to SP4 including a compensation circuit according to an embodiment of the present invention may be defined to form one pixel. At this time, the first to fourth subpixels (SP1 to SP4) may be arranged in the order of emitting red, green, blue, and white, respectively, but are not limited to this.

As in the first example of FIG. 4, the first to fourth subpixels (SP1 to SP4) including the compensation circuit are connected to share one first sensing line (VREF1), and the first to fourth data lines (DL1 to DL4) may have a separate and connected structure.

As in the second example of FIG. 5, the first to fourth subpixels (SP1 to SP4) including the compensation circuit are connected to share one first sensing line (VREF1), and each two subpixels transmit one data. It can have a shared structure connected to the line. For example, the first and second subpixels SP1 and SP2 may share the first data line DL1, and the third and fourth subpixels SP3 and SP4 may share the second data line DL2. .

However, FIGS. 4 and 5 only show two examples, and the present invention can also be applied to display panels having subpixels of other structures not previously shown or described. Additionally, the present invention can be applied to a structure with a compensation circuit in a subpixel or a structure without a compensation circuit in a subpixel.

Figure 6 is a first example diagram showing the main blocks of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention, and Figures 7 and 8 are a compensation circuit according to the first embodiment of the present invention. These are second example diagrams showing the main blocks of an organic light emitting display device having a circuit.

As shown in FIG. 6, the organic light emitting display device according to the first embodiment of the present invention supplies a data voltage to the subpixel, senses the elements included in the subpixel, and calculates the data voltage based on the sensing value obtained through sensing. It includes a circuit that generates a compensation value.

The data drivers 140a to 104b are circuits that perform a driving operation such as supplying a data voltage to the subpixel as well as a sensing operation for sensing elements included in the subpixel, and include the first circuit 140a and the second circuit. It may include (140b). However, the external compensation circuit, such as the second circuit unit 140b, may be configured as a separate device.

The first circuit unit 140a is a circuit that outputs a data voltage (Vdata) for driving a subpixel, and may include a data voltage output unit (DAC), etc. The data voltage output unit (DAC) converts the digital data signal supplied from the timing control unit into an analog voltage and outputs it. The output terminal of the data voltage output unit (DAC) is connected to the first data line (DL1). The data voltage output unit (DAC) can output not only the data voltage (Vdata) required for image expression, but also the voltage required for compensation operation (e.g., black voltage, etc.).

The second circuit unit 140b is a circuit for outputting the voltage required for the sensing operation as well as the switching operation for the sensing operation, and includes a switch unit for initialization voltage output (SPSW), a switch unit for driving voltage output (RPSW), and a sampling switch unit ( SASW), sensing circuit (ADC), etc.

The initialization voltage output switch unit (SPSW) turns on or turns off in response to the initialization control signal (SPRE). The initialization voltage output switch unit (SPSW) may output the initialization voltage generated by the initialization voltage source (VPRES) through the first sensing line (VREF1). The initialization voltage generated by the initialization voltage source (VPRES) may be generated as a voltage between the first power source (high potential voltage) and the second power source (low potential voltage), but is usually generated as a voltage close to the second power source. The initialization voltage output switch unit (SPSW) is simply shown in the form of a switch, but is not limited to this and may be implemented as an active element, etc.

The drive voltage output switch unit (RPSW) turns on or turns off in response to the drive control signal (RPRE). The driving voltage output switch unit (RPSW) may output the driving voltage generated by the driving voltage source (VPRER) through the first sensing line (VREF1). The driving voltage generated by the driving voltage source (VPRER) may be generated at a voltage between the first power source (high potential voltage) and the second power source (low potential voltage), but is usually generated at a voltage close to the second power source. However, the level of the driving voltage is different from the level of the initialization voltage.

The sampling switch unit (SASW) turns on or turns off in response to the sampling control signal (SAM). The sampling switch unit (SASW) can sense the characteristics of devices included in the subpixel based on the current, voltage, and charge charged in the line capacitor (Vsen) of the first sensing line (VREF1). The sampling switch unit (SASW) operates to sense device characteristics, including the threshold voltage of an organic light-emitting diode (OLED) and the threshold voltage or mobility of a driving transistor (DT), using a sampling method. The sampling switch unit (SASW) is simply shown in the form of a switch, but is not limited to this and may be implemented as an active element, etc.

When the sampling switch unit (SASW) is turned on, the sensing circuit unit (ADC) senses the threshold voltage of the organic light emitting diode (OLED), the threshold voltage or mobility of the driving transistor (DT), etc. through the first sensing line (VREF1). You can obtain and output values.

The compensation circuit unit 160 is a circuit for analyzing the image and generating a compensation value based on the sensing value, and may include an image analysis unit 165 and a compensation value generation unit 167. The image analysis unit 165 may serve to analyze the sensing value output from the sensing circuit unit (ADC) in addition to the data signal input from the outside. The compensation value generator 167 may determine the degree of deterioration of the sensed element in response to the analysis result output from the image analysis unit 165 and generate a compensation value necessary for compensation.

As shown in FIGS. 7 and 8, when the first circuit unit 140a and the second circuit unit 140b are included inside the data driver 140, the compensation circuit unit 160 is inside the timing control unit 120. may be included in Accordingly, the timing control unit 120 may supply a compensation data signal (CDATA) obtained by compensating the data signal (DATA) based on the compensation value to the data driver 140. Additionally, the timing control unit 120 may supply a control signal (CNT) for controlling the second circuit unit 140b and the compensation circuit unit 160 to the data driver 140.

FIG. 9 is a first example diagram showing a MUX unit of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention, FIG. 10 is an exemplary diagram of an internal block of the MUX unit shown in FIG. 9, and FIG. 11 is a diagram showing an internal block of the MUX unit shown in FIG. This is a second example diagram showing the mux unit of an organic light emitting display device having a compensation circuit according to the first embodiment of the present invention.

As in the first example shown in FIG. 9, the organic electroluminescent display device according to the first example of the present invention selectively senses the characteristics of the elements included in each of the first pixel (P1) and the second pixel (P2). It has a mux unit (MUX) for The first pixel P1 includes red, white, blue, and green subpixels SP_R, SP_W, SP_B, and SP_G. Likewise, the second pixel P2 also includes red, white, blue, and green subpixels (SP_R, SP_W, SP_B, and SP_G).

The red, white, blue, and green subpixels (SP_R, SP_W, SP_B, and SP_G) included in the first pixel (P1) are connected to the first sensing line (VREF1). And the first sensing line (VREF1) is connected to the first input terminal of the mux unit (MUX). The red, white, blue, and green subpixels (SP_R, SP_W, SP_B, and SP_G) included in the second pixel (P2) are connected to the second sensing line (VREF2). And the second sensing line (VREF2) is connected to the second input terminal of the MUX.

The first sensing line VREF1 connected to the first pixel P1 and the second sensing line VREF2 connected to the second pixel P2 correspond to sensing lines located on the display panel. And the sensing line (VREF) connected to the output terminal of the mux unit (MUX) corresponds to the sensing line located inside the second circuit unit.

As shown in FIG. 10, the mux unit (MUX) includes a first mux switch (MSW1) and a second mux switch (MSW2). The first mux switch (MSW1) has a gate electrode connected to the first mux control signal line (MUX CTRL1), a first electrode connected to the first sensing line (VREF1), and a second electrode connected to the sensing line (VREF). . The second mux switch (MSW2) has a gate electrode connected to the second mux control signal line (MUX CTRL2), a first electrode connected to the second sensing line (VREF2), and a second electrode connected to the sensing line (VREF). .

The organic electroluminescent display device having the configuration shown in FIGS. 9 and 10 determines the characteristics of the elements included in the first pixel (P1) and the second pixel (P2) according to the MUX control signal that controls the MUX unit (MUX). ) can be acquired in a time-sharing manner. In other words, two pixels can be sensed in a time division manner.

As in the second example shown in FIG. 11, the organic electroluminescent display device according to the first embodiment of the present invention selectively senses the characteristics of the elements included in each of the first pixel (P1) to the N-th pixel (Pn). It has a mux unit (MUX) to do this. The first pixel (P1) to the N-th pixel (Pn) (n is an integer greater than or equal to 2) include red, white, blue, and green subpixels (SP_R, SP_W, SP_B, and SP_G), respectively.

The red, white, blue, and green subpixels (SP_R, SP_W, SP_B, and SP_G) included in the first pixel (P1) are connected to the first sensing line (VREF1). And the first sensing line (VREF1) is connected to the first input terminal of the mux unit (MUX). The red, white, blue, and green subpixels (SP_R, SP_W, SP_B, SP_G) included in the Nth pixel (Pn) are connected to the Nth sensing line (VREFn). And the Nth sensing line (VREFn) is connected to the Nth input terminal of the MUX.

The first sensing line (VREF1) connected to the first pixel (P1) to the N-th sensing line (VREFn) connected to the N-th pixel (Pn) correspond to sensing lines located on the display panel. And the sensing line (VREF) connected to the output terminal of the mux unit (MUX) corresponds to the sensing line located inside the second circuit unit. The mux unit (MUX) can be implemented based on the mux switch as described in FIG. 10.

The organic electroluminescent display device having the configuration shown in FIG. 11 varies from the characteristics of the elements included in the first pixel (P1) to the elements included in the N-th pixel (Pn) according to the control method of the mux unit (MUX). Even characteristics can be acquired through time sharing. In other words, two or more pixels can be sensed in a time-sharing manner. The MUX unit can perform sequential, non-sequential, or random sensing operations in response to the MUX control signal.

12 to 15 are diagrams for explaining a method of driving an organic light emitting display device with a compensation circuit according to a first embodiment of the present invention.

As shown in FIG. 12, the data driver 140 includes a data voltage output unit (DAC), first to Nth initialization voltage output switch units (SPSW1 to SPSWn), initialization voltage source (VPRES), and first to Nth sampling units. Switch unit (SASW1 ~ SASWn), 1st to Nth sampling and scaler units (SAM & SCA1 ~ SAM & SCAn), mux unit (MUX), sensing circuit unit (ADC), memory unit (MEM), and signal transmission unit ( TX) may be included.

The data voltage output unit (DAC) is included in the first circuit part of the data driver 140. 1st to Nth initialization voltage output switch units (SPSW1 to SPSWn), initialization voltage source (VPRES), 1st to Nth sampling switch units (SASW1 to SASWn), 1st to Nth sampling and scaler units (SAM & SCA1) ~ SAM & SCAn), MUX, and sensing circuit (ADC) are included in the second circuit of the data driver 140. The memory unit (MEM) and the signal transmission unit (TX) are included in the third circuit part of the data driver 140.

The data voltage output unit (DAC) is a red data voltage output unit that outputs a red data voltage (R), a white data voltage output unit that outputs a white data voltage (W), and a blue data voltage output unit that outputs a blue data voltage (B). It may include an output unit and a green data voltage output unit that outputs a green data voltage (G). The data voltage output unit (DAC) may be connected to the data lines (DL1 to DLn) through output buffers provided for each output channel (CH1 to CHn) of the data driver 140.

The first to Nth initialization voltage output switch units (SPSW1 to SPSWn) are respectively arranged to correspond to the first to Nth sensing lines (VREF1 to VREFn). The first to Nth initialization voltage output switch units (SPSW1 to SPSWn) may output the initialization voltage generated by the initialization voltage source (VPRES) through the first to Nth sensing lines (VREF1 to VREFn), respectively.

The first to Nth sampling switch units (SASW1 to SASWn) are located between the first to Nth sensing lines (VREF1 to VREFn) and the first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn), respectively. It is placed. The first to Nth sampling switch units (SASW1 to SASWn) may be turned on to sense at least one of the first to Nth sensing lines (VREF1 to VREFn).

The first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn) are respectively disposed between the first to Nth sampling switch units (SASW1 to SASWn) and the input terminals of the mux unit (MUX). The first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn) can sample and scale the sensing value transmitted through the turned-on sampling switch unit and transmit it to the mux unit (MUX).

The first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn) are shown as including a sampling circuit unit and a scaler circuit unit. However, the sampling circuitry and scaler circuitry can be separated. And depending on the configuration of the device, the scaler circuit part may be omitted. Additionally, the sampling circuit unit may include an integration circuit unit capable of integrating the sensing value and a sample & hold unit capable of sampling and holding the integrated sensing value.

The mux unit (MUX) is disposed between the first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn) and the sensing circuit unit (ADC). The mux unit (MUX) includes a plurality of mux switch units. The mux unit (MUX) may acquire the sensing value transmitted from at least one of the first to Nth sampling and scaler units (SAM & SCA1 to SAM & SCAn) in a time division manner and then transfer it to the memory unit (MEM).

The sensing circuit unit (ADC) converts analog sensing values into digital sensing values and outputs them. The sensing circuit (ADC) may include an analog-to-digital conversion circuit. The memory unit (MEM) stores at least one sensing value transmitted from the mux unit (MUX) and then transmits it to the signal transmission unit (TX). The signal transmission unit (TX) transmits the sensing value received from the memory unit (MEM) to the timing control unit 120.

Since the devices included inside the data driver 140 are configured as above, the sensing operation for sensing the sensing line includes (A) precharging of the display panel, (B) driving of the display panel, and (C) sensing line. This consists of sampling and scaling the sensing value, (D) converting the sensing value from an analog value to a digital value, and (E) transmitting the converted sensing value to the timing control unit.

As shown in FIGS. 7 to 14, the organic light emitting display device according to the first embodiment of the present invention has a program stage, a sensing stage, a sampling stage, and a recovery stage. It can operate in that order. The time including the program stage, sensing stage, sampling stage, and recovery stage can be defined as the time required for real-time sensing of one line (time required for 1 line RT). , which corresponds to 1 vertical blank section.

The program step is a step of applying a data voltage to the subpixels included in the display panel and applying a sensing voltage to the sensing lines. The sensing step is a step of sensing the sensing lines of subpixels included in the display panel. The sampling step is a step of sampling sensing values such as current, voltage, and charge charged in the sensing lines. The recovery step is a step of recovering elements (e.g., threshold voltage of a driving transistor) of subpixels included in the display panel. During the program stage (Program), a data voltage (Vdata) is applied to the data lines, and a sensing voltage (Vref) is applied to the sensing lines.

The scan signal (Scan) is generated as logic high during the program and recovery stages and as logic low during the remaining sensing and sampling stages. When the scan signal (Scan) is generated at logic high, the switching transistor (SW) is turned on.

The sense signal (Sense) is generated at logic high during the program stage, sensing stage, sampling stage, and recovery stage. When the sense signal (Sense) occurs at logic high, the sensing transistor (ST) is turned on.

The first mux control signal (Mux ctrl1) is generated at logic high during the program, sensing, and sampling stages. The first mux control signal (Mux ctrl1) may be switched from logic high to logic low in synchronization with the falling edge of the first sampling control signal (Samp1). When the first mux control signal (Mux ctrl1) occurs at logic high, the first mux switch (MSW1) is turned on.

The second mux control signal (Mux ctrl2) is generated at logic high during the program, sensing, and sampling stages. The second mux control signal (Mux ctrl2) may be switched from logic high to logic low in synchronization with the falling edge of the second sampling control signal (Samp2). When the second mux control signal (Mux ctrl2) occurs at logic high, the second mux switch (MSW2) is turned on.

As can be seen through FIG. 13, the first mux control signal (Mux ctrl1) and the second mux control signal (Mux ctrl2) overlap and turn on during the program stage, sensing stage, and sampling stage. maintain. And the time for which the second mux control signal (Mux ctrl2) maintains logic high is longer than the time for which the first mux control signal (Mux ctrl1) maintains logic high.

Accordingly, while the first sampling control signal (Samp1) maintains logic high, the first mux switch (MSW1) and the second mux switch (MSW2) remain turned on at the same time, as shown in FIG. 14A. On the other hand, while the second sampling control signal (Samp2) maintains logic high, the first mux switch (MSW1) is turned off, but the second mux switch (MSW2) remains turned on, as shown in FIG. 14B. That is, the first mux switch (MSW1) and the second mux switch (MSW2) are turned on at the same time, but the turn-off times are different.

The sampling control signal (Samp) is generated at logic high at least twice during the sampling step (Sampling). The first sampling control signal (Samp1) and the second sampling control signal (Samp2) are generated at a certain interval apart. The first sensing value (Vsen1) of the first sensing line (VREF1) connected to the first pixel (P1) is acquired by the first sampling control signal (Samp1) of logic high. The second sensing value (Vsen2) of the second sensing line (VREF2) connected to the second pixel (P2) is acquired by the logic high second sampling control signal (Samp2).

According to the first embodiment of the present invention, the first mux control signal (Mux ctrl1) and the second mux control signal (Mux ctrl2) include a program stage (Program), a sensing stage (Sensing), and a sampling stage (Sampling). The logic high state is maintained by overlapping for a long period of time. When the MUX control signal is applied as above, the MUX switch on the side performing sensing is always maintained in the turn-on state, so there is no signal transmission delay due to charge movement. An explanation related to this is as follows.

The first mux switch (MSW1) is turned on for a time including the program stage (Program), the sensing stage (Sensing), and the sampling stage (Sampling) by the logic high first mux control signal (Mux ctrl1). And the second mux switch (MSW2) includes a program stage (Program), a sensing stage (Sensing), and a sampling stage (Sampling) by the logic high second mux control signal (Mux ctrl2), and the first mux switch (MSW1) ) and remains turned on for a longer period of time.

Accordingly, when the first sampling control signal (Samp1) changes from logic low to logic high, the charge of the first sensing line (VREF1) is sensed, sampled, and scaled without signal transmission delay, and then the first mux switch (MSW1) is turned on. It is transmitted to the sensing circuit unit (ADC) and acquired as the first sensing value (Vsen1). And when the second sampling control signal (Samp2) changes from logic low to logic high, the charge of the second sensing line (VREF2) is sensed, sampled, and scaled without signal transmission delay, and then passes through the turned on second mux switch (MSW2). It is transmitted to the sensing circuit unit (ADC) and acquired as the second sensing value (Vsen2).

Meanwhile, when performing multi-sensing by sensing at least two pixels as in the first embodiment of the present invention, a process of separating the sensing value of each pixel is required. In relation to this, description is given with reference to FIG. 15 as follows. If the charge mobility of the first pixel (P1) is defined as a1 and the charge mobility of the second pixel (P2) is defined as a2, the capacitance of the first pixel (P1) is (a1+a2) * t1 = Since it is V1/C, and the capacitance of the second pixel (P2) is (a2+t2) = V2-V1/C/2, a1 and a2 can be obtained by solving this simultaneously. Therefore, even if two pixels are multi-sensed, the first sensing value (Vsen1) corresponding to the first pixel (P1) and the second sensing value corresponding to the second pixel (P2) are calculated by calculating the difference value between the sensing values. It can be acquired separately by (Vsen2).

Above, a sensing method such as the first embodiment of the present invention is particularly useful when sensing the threshold voltage or mobility of a driving transistor included in subpixels. The reason is that when sensing the threshold voltage or mobility of the driving transistor, the source voltage is sensed when the source node potential of the driving transistor is saturated (i.e., when the current (Ids) of the driving transistor becomes zero). . To put it another way, when sensing the threshold voltage of a driving transistor, the potential remains unchanged even if the sensing line is floating, so the sensing value does not change even if multi-sensing is performed. In addition, since there is no signal transmission delay in the operation and flow of the device including the sensing circuit unit and the mux unit, etc., loss of sensing time due to a decrease in charge mobility can be improved. This is because sensing is done simultaneously, but sampling is done separately with a certain time lag.

16 to 18 are diagrams for explaining a method of driving an organic light emitting display device with a compensation circuit according to a second embodiment of the present invention.

The organic electroluminescent display device according to the second embodiment of the present invention has the same structure as the device described in the organic electroluminescent display device according to the first embodiment of the present invention, except for the difference in the driving method according to the mux control signal. . Therefore, the device configuration of the organic light emitting display device according to the second embodiment of the present invention will be described with reference to FIGS. 7 to 12.

As shown in FIGS. 7 to 12 and 16 to 17, the organic light emitting display device according to the second embodiment of the present invention includes a programming step, a sensing step, a sampling step, It can be operated in the order of recovery steps. The time including the program stage, sensing stage, sampling stage, and recovery stage can be defined as the time required for real-time sensing of one line (time required for 1 line RT). , which corresponds to 1 vertical blank section.

The program step is a step of applying a data voltage to the subpixels included in the display panel and applying a sensing voltage to the sensing lines. The sensing step is a step of sensing the sensing lines of subpixels included in the display panel. The sampling step is a step of sampling sensing values such as current, voltage, and charge charged in the sensing lines. The recovery step is a step of recovering elements (e.g., threshold voltage of a driving transistor) of subpixels included in the display panel. During the program stage (Program), a data voltage (Vdata) is applied to the data lines, and a sensing voltage (Vref) is applied to the sensing lines.

The scan signal (Scan) is generated as logic high during the program and recovery stages and as logic low during the remaining sensing and sampling stages. When the scan signal (Scan) is generated at logic high, the switching transistor (SW) is turned on.

The sense signal (Sense) is generated at logic high during the program stage, sensing stage, sampling stage, and recovery stage. When the sense signal (Sense) occurs at logic high, the sensing transistor (ST) is turned on.

The first mux control signal (Mux ctrl1) is generated at logic high during the program, sensing, and sampling stages. The first mux control signal (Mux ctrl1) may be switched from logic high to logic low in synchronization with the falling edge of the first sampling control signal (Samp1). When the first mux control signal (Mux ctrl1) occurs at logic high, the first mux switch (MSW1) is turned on.

The second mux control signal (Mux ctrl2) is generated at logic high only during the program and sampling stages. The second mux control signal (Mux ctrl2) switches to logic high in synchronization with the falling edge of the first sampling control signal (Samp1) and switches from logic high to logic low in synchronization with the falling edge of the second sampling control signal (Samp2). It can be. When the second mux control signal (Mux ctrl2) occurs at logic high, the second mux switch (MSW2) is turned on.

As can be seen through FIG. 16, the first mux control signal (Mux ctrl1) and the second mux control signal (Mux ctrl2) partially overlap and remain turned on only during the program phase (Program). And the first mux control signal (Mux ctrl1) generates logic high once, but the second mux control signal (Mux ctrl2) generates logic high twice.

Accordingly, as shown in FIG. 17A, during the program phase (Program), the first mux switch (MSW1) and the second mux switch (MSW2) remain turned on at the same time. However, as shown in FIG. 17B, while the first sampling control signal Samp1 maintains logic high, the first mux switch MSW1 is turned on, but the second mux switch MSW2 is turned off. And as shown in FIG. 17C, while the second sampling control signal (Samp2) maintains logic high, the first mux switch (MSW1) is turned off but the second mux switch (MSW2) is turned on. That is, the first mux switch (MSW1) and the second mux switch (MSW2) are turned on at the same time, but the turn-off times are different.

The sampling control signal (Samp) is generated at logic high at least twice during the sampling step (Sampling). The first sampling control signal (Samp1) and the second sampling control signal (Samp2) are generated at a certain interval apart. The first sensing value (Vsen1) of the first sensing line (VREF1) connected to the first pixel (P1) is acquired by the first sampling control signal (Samp1) of logic high. The second sensing value (Vsen2) of the second sensing line (VREF2) connected to the second pixel (P2) is acquired by the logic high second sampling control signal (Samp2).

According to the second embodiment of the present invention, the first mux control signal (Mux ctrl1) and the second mux control signal (Mux ctrl2) overlap and maintain a logic high state during the program phase (Program). The first mux control signal (Mux ctrl1) maintains a logic high state for a long period of time including the program stage (Program), the sensing stage (Sensing), and the sampling stage (Sampling). On the other hand, the second mux control signal (Mux ctrl2) is in a logic high state only during the program and sampling stages. When the MUX control signal is applied as above, the MUX switch on the side performing sensing is always maintained in the turn-on state, so there is no signal transmission delay due to charge movement. In addition, since the second sensing and sampling can be performed consecutively upon completion of the first sensing and sampling, signal transmission delays due to charge movement do not occur in the next operation. An explanation related to this is as follows.

The first mux switch (MSW1) is turned on for a time including the program stage (Program), the sensing stage (Sensing), and the sampling stage (Sampling) by the logic high first mux control signal (Mux ctrl1). And the second mux switch (MSW2) is turned on twice during the program and sampling stages by the logic high second mux control signal (Mux ctrl2), which is generated in two separate turns. has

Accordingly, when the first sampling control signal (Samp1) changes from logic low to logic high, the charge of the first sensing line (VREF1) is sensed, sampled, and scaled without signal transmission delay, and then the first mux switch (MSW1) is turned on. It is transmitted to the sensing circuit unit (ADC) and acquired as the first sensing value (Vsen1). And when the second sampling control signal (Samp2) changes from logic low to logic high, the charge of the second sensing line (VREF2) is sensed, sampled, and scaled without signal transmission delay, and then passes through the turned on second mux switch (MSW2). It is transmitted to the sensing circuit unit (ADC) and acquired as the second sensing value (Vsen2).

Meanwhile, in the second embodiment of the present invention, the second mux control signal (Mux ctrl2) is generated in two separate waves, so the process of separating the sensed values of the pixels can be omitted when multi-sensing two pixels. However, when multi-sensing a larger number of pixels, a process of separating the sensing value of each pixel may be necessary.

In addition, the second embodiment of the present invention can generate the second mux control signal (Mux ctrl2) generated during the sampling step (Sampling) after the falling edge of the first sampling control signal (Samp1), as shown in FIG. 18. It is possible to maintain a flexible control margin that allows the time needed for charge transfer. This is because the time to sense the value charged in the sensing line is the falling edge section, which is the end of the sampling control signal. Therefore, the second mux control signal (Mux ctrl2) generated during the sampling step (Sampling) may be generated in synchronization with the second sampling control signal (Samp2).

In other words, the time that the second mux control signal (Mux ctrl2) maintains logic high during the sampling step is variable, so it may be the same as or different from the time that the second sampling control signal (Samp2) maintains logic high. . Accordingly, the time that the second mux control signal (Mux ctrl2) maintains logic high during the program phase (Program) and the sampling phase (Sampling) may be the same or different.

Above, a sensing method such as the second embodiment of the present invention is particularly useful when sensing the threshold voltage or mobility of a driving transistor included in subpixels. The reason is that when sensing the threshold voltage or mobility of the driving transistor, the source voltage is sensed when the source node potential of the driving transistor is saturated (i.e., when the current (Ids) of the driving transistor becomes zero). . To put it another way, when sensing the threshold voltage of a driving transistor, the potential remains unchanged even if the sensing line is floating, so the sensing value does not change even if multi-sensing is performed. In addition, because signal transmission delay does not occur due to the operating characteristics of the mux unit, loss of sensing time due to lower charge mobility can be improved. This is because sensing is done simultaneously, but sampling is done separately with a certain time lag.

The present invention described above has the effect of shortening the sensing time by performing multi-sensing and sampling of the sensing lines by charging the sensing lines with a certain time difference in the program stage and then operating the mux unit sequentially. In addition, the present invention has the effect of improving sensing time loss (preventing and improving charge mobility delay) by preventing signal transmission delays in the operation and flow of the device during the sensing value acquisition process. In addition, the present invention has the effect of improving sensing time loss even without multi-sensing by using a method of turning on the mux switch on the side where sensing is performed in the mux unit for a long time.

Although embodiments of the present invention have been described with reference to the accompanying drawings, the technical configuration of the present invention described above can be modified by those skilled in the art in the technical field to which the present invention belongs in other specific forms without changing the technical idea or essential features of the present invention. You will understand that it can be done. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the claims described later rather than the detailed description above. In addition, the meaning and scope of the patent claims and all changes or modified forms derived from the equivalent concept should be construed as being included in the scope of the present invention.

120: timing control unit 140: data driver
140a: first circuit 140b: second circuit
150: Display panel SP: Subpixel
P1: 1st pixel VREF1: 1st sensing line
P2: 2nd pixel VREF2: 2nd sensing line
MUX: Mux section ADC: Sensing circuit section
MEM: Memory section TX: Signal transmission section
SAM & SCA1 ~ SAM & SCAn: Sampling and scaler section
SPSW1 ~ SPSWn: Switch unit for initialization voltage output
SASW1 ~ SASWn: Switch unit for sampling

Claims (15)

A display panel including pixels;
a first circuit unit supplying data voltages to data lines of the pixels; and
Sampling circuit units that sense and sample the sensing lines of the pixels, a mux unit that time-divides the sensing values output from the sampling circuit units, and convert the analog sensing values output from the mux unit into digital sensing values. It includes a second circuit unit including a sensing circuit unit that outputs,
The MUX unit includes a plurality of MUX switches,
At least one of the first mux switch and the second mux switch of the plurality of mux switches remains turned on from the period of supplying the data voltage to the data line to the period of sensing and sampling the sensing line,
The first mux switch and the second mux switch remain turned on simultaneously during at least a portion of the period from the period of supplying the data voltage to the period in which the first sampling control signal for sampling the first sensing line is generated,
While the first mux switch is turned on, the sensing circuit unit senses the first sensing line connected to the first pixel through the first mux switch,
While the second MUX switch is turned on, the sensing circuit unit senses a second sensing line connected to the second pixel through the second MUX switch,
A light emitting display device in which the first mux switch and the second mux switch are turned on at the same time but have different turn-off times. According to paragraph 1,
The first mux switch is
A light emitting display device that is turned off in synchronization with a falling edge of the first sampling control signal. According to paragraph 2,
The second mux switch is
A light emitting display device that is turned off in synchronization with the falling edge of a second sampling control signal generated to sample a second sensing line among the sensing lines. According to paragraph 3,
The first mux switch and the second mux switch are
A light emitting display device that is simultaneously turned on until the first sampling control signal is generated. According to paragraph 3,
The second mux switch is
A light emitting display device that remains turned on for a longer period of time than the first mux switch. According to paragraph 2,
The second mux switch is
A light emitting display device that is turned on during the period of supplying the data voltage to the data line. According to clause 6,
The second mux switch is
A light emitting display device having two turn-on states from the period of supplying the data voltage to the data line to the period of sensing and sampling the sensing line. In clause 7,
The second mux switch is
Turned on in synchronization with the falling edge of the first sampling control signal generated to sample the first sensing line among the sensing lines,
A light emitting display device that is turned off in synchronization with the falling edge of a second sampling control signal generated to sample a second sensing line among the sensing lines. According to clause 6,
The second mux switch is
A light emitting display device in which the turn-on time during the period of supplying the data voltage to the data line and the turn-on time during the sensing and sampling period of the sensing line are the same. According to clause 6,
The second mux switch is
A light emitting display device in which a turn-on time during a period of supplying a data voltage to the data line is different from a turn-on time during a period of sensing and sampling the sensing line. According to clause 6,
The second mux switch is
A light emitting display device in which the time for maintaining the turn-on state is variable during the period of sensing and sampling the sensing line. delete According to paragraph 1,
The second circuit part is
A light emitting display device that sequentially, non-sequentially, or randomly senses the sensing lines of the pixels in response to a MUX control signal that controls the MUX unit. According to paragraph 1,
The first mux switch and the second mux switch are
A light emitting display device that is turned on in synchronization with the generation of a scan signal applied to supply the data voltage to the data line. delete

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