KR102597232B1 - Display Device - Google Patents

Abstract

The present invention relates to a display device that can prevent damage to the GIP driving unit due to external static electricity inflow. A display device according to an embodiment of the present invention includes a substrate including a display portion on which a plurality of subpixels are arranged and another non-display portion, a GIP driver disposed in the non-display portion and disposed on at least one side of the display portion, and the non-display portion. It is disposed in and includes a ground line surrounding the GIP driver and the display unit, and the ground line branches off into at least two.

Description

Display Device {Display Device}

The present invention relates to a display device, and more specifically, to a display device that can prevent damage to the GIP driving unit due to external static electricity inflow.

As the information society develops, the demand for display devices for displaying images is increasing in various forms. The display device field has been rapidly changing toward thin, light, large-area flat panel displays (FPDs) replacing bulky cathode ray tubes (CRTs). Flat panel displays include Liquid Crystal Display Device (LCD), Plasma Display Panel (PDP), Organic Light Emitting Display Device (OLED), and Electrophoretic Display Device. : ED), etc.

Among these, organic light emitting display devices are self-emitting devices that emit light on their own and have the advantages of fast response speed, high luminous efficiency, brightness, and viewing angle. In particular, organic light emitting display devices can not only be formed on flexible substrates, but can also be driven at lower voltages and consume relatively less power than plasma display panels or inorganic electroluminescence (EL) displays. It has the advantage of excellent color.

However, organic light emitting display devices have a problem in that operation abnormalities occur in internal elements such as thin film transistors due to static electricity flowing in from the outside.

The present invention provides a display device that can prevent damage to the GIP driving unit due to external static electricity inflow.

In order to achieve the above object, a display device according to an embodiment of the present invention includes a substrate including a display portion on which a plurality of subpixels are arranged and another non-display portion, the non-display portion being disposed on at least one side of the display portion. It includes a GIP driving unit, and a ground line disposed in the non-display part and surrounding the GIP driving unit and the display unit, and the ground line branches at least into two.

The ground line includes a single portion consisting of one line and at least two branched portions.

It is disposed in the non-display portion and further includes a pad portion disposed on one side of the display portion where the GIP driver is not disposed, wherein a single portion of the ground line is disposed on the pad portion, and a branch portion of the ground line is adjacent to the GIP driver. placed in the area.

The ground line branches off from one side of the pad portion, surrounds the GIP driver and the display portion, and merges at the other side of the pad portion.

A single portion of the ground line is disposed on one side of the non-display portion opposite the pad portion.

It further includes an adhesive for bonding the substrate and the protective member, and at least one of the ground lines overlaps with the adhesive.

At least one of the ground lines completely overlaps the adhesive.

It further includes an overcoat layer in contact with the adhesive, and at least one of the ground lines overlaps the overcoat layer.

At least one of the ground lines overlaps the overcoat layer and the adhesive.

The display device according to embodiments of the present invention branches the ground line into at least two, so that even if static electricity flows in from the outside, the static electricity can be dissipated or discharged to the outside by spreading the static electricity through the branched ground lines. Therefore, there is an advantage in preventing damage to the adjacent GIP driving unit due to static electricity through the ground line.

1 is a schematic block diagram of an organic light emitting display device.
Figure 2 is a first example diagram showing the circuit configuration of a subpixel.
Figure 3 is a second example diagram showing the circuit configuration of a subpixel.
Figure 4 is a plan view showing an organic light emitting display device according to the present invention.
Figure 5 is a cross-sectional view showing a subpixel portion of an organic light emitting display device according to the present invention.
Figure 6 is a plan view showing an organic light emitting display device according to the present invention.
Figure 7 is a cross-sectional view taken along line A-A' of Figure 6.
Figure 8 is a plan view showing an organic light emitting display device according to an embodiment of the present invention.
Figure 9 is a cross-sectional view taken along line B-B' of Figure 8.
10 and 11 are cross-sectional views of organic light emitting display devices of various structures according to embodiments of the present invention.
Figure 12 is a plan view showing an organic light emitting display device of another structure of the present invention.
Figure 13 is a graph measuring the static electricity defect rate and performance level before and after changing the design of the ground line.

Hereinafter, preferred embodiments of the present invention will be described with reference to the attached drawings. Like reference numerals refer to substantially the same elements throughout the specification. In the following description, if it is determined that a detailed description of a known technology or configuration related to the present invention may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. Additionally, the component names used in the following description may have been selected in consideration of ease of specification preparation, and may be different from the component names of the actual product.

The display device according to the present invention is a display device in which display elements are formed on a glass substrate or a flexible substrate. Examples of display devices include organic light emitting display devices, liquid crystal display devices, and electrophoretic display devices. However, in the present invention, the organic light emitting display device is described as an example. The organic light emitting display device includes an organic film layer made of organic material between a first electrode, which is an anode, and a second electrode, which is a cathode. Therefore, the holes supplied from the first electrode and the electrons supplied from the second electrode combine within the organic layer to form excitons, which are hole-electron pairs, and emit light by the energy generated when the excitons return to the ground state. It is a self-luminous display device.

Hereinafter, embodiments of the present invention will be described with reference to the attached drawings.

FIG. 1 is a schematic block diagram of an organic light emitting display device, FIG. 2 is a first example diagram showing the circuit configuration of a subpixel, and FIG. 3 is a second example diagram showing the circuit configuration of a subpixel.

Referring to FIG. 1, the organic light emitting display device includes an image processing unit 10, a timing control unit 20, a data driver 30, a gate driver 40, and a display panel 50.

The image processing unit 10 outputs a data enable signal (DE) in addition to a data signal (DATA) supplied from the outside. The image processing unit 10 may output one or more of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal in addition to the data enable signal DE, but these signals are omitted for convenience of explanation. The image processing unit 10 is formed in the form of an integrated circuit (IC) on a system circuit board.

The timing control unit 20 receives a data enable signal (DE) or a driving signal including a vertical synchronization signal, a horizontal synchronization signal, and a clock signal, as well as a data signal (DATA) from the image processing unit 10.

The timing control unit 20 includes a gate timing control signal (GDC) for controlling the operation timing of the gate driver 40 and a data timing control signal (DDC) for controlling the operation timing of the data driver 30 based on the driving signal. outputs. The timing control unit 20 is formed in the form of an IC on a control circuit board.

The data driver 30 samples and latches the data signal DATA supplied from the timing control unit 20 in response to the data timing control signal DDC supplied from the timing control unit 20, converts it to a gamma reference voltage, and outputs it. . The data driver 30 outputs a data signal DATA through the data lines DL1 to DLn. The data driver 30 is attached in the form of an IC on a substrate.

The gate driver 40 outputs a gate signal while shifting the level of the gate voltage in response to the gate timing control signal (GDC) supplied from the timing controller 20. The gate driver 40 outputs a gate signal through the gate lines GL1 to GLm. The gate driver 40 is formed in the form of an IC on a gate circuit board or in the form of a gate in panel (GIP) on the display panel 50.

The display panel 50 displays images in response to the data signal (DATA) and gate signal supplied from the data driver 30 and the gate driver 40. The display panel 50 includes subpixels (SP) that display images.

Referring to FIG. 2, one subpixel includes a switching transistor (SW), a driving transistor (DR), a compensation circuit (CC), and an organic light emitting diode (OLED). An organic light emitting diode (OLED) operates to emit light according to a driving current formed by a driving transistor (DR).

The switching transistor SW performs a switching operation in response to the gate signal supplied through the gate line GL1 so that the data signal supplied through the first data line DL1 is stored as a data voltage in the capacitor Cst. The driving transistor (DR) operates so that a driving current flows between the power line (VDD) and the ground (GND) according to the data voltage stored in the capacitor (Cst). The compensation circuit (CC) is a circuit for compensating the threshold voltage of the driving transistor (DR). Additionally, the capacitor connected to the switching transistor (SW) or driving transistor (DR) may be located inside the compensation circuit (CC). The compensation circuit (CC) consists of one or more thin film transistors and a capacitor. The composition of the compensation circuit (CC) varies greatly depending on the compensation method, so specific examples and descriptions thereof will be omitted.

In addition, as shown in FIG. 3, when the compensation circuit (CC) is included, the subpixel further includes a signal line and a power line for supplying a specific signal or power in addition to driving the compensation thin film transistor. The gate line GL1 includes a 1-1 gate line GL1a for supplying a gate signal to the switching transistor SW, and a 1-2 gate line GL1b for driving the compensation thin film transistor included in the subpixel. It can be included. And the added power line can be defined as an initialization power line (INIT) for initializing a specific node of a subpixel to a specific voltage. However, this is only an example and is not limited to this.

Meanwhile, in Figures 2 and 3, one subpixel includes a compensation circuit (CC) as an example. However, if the subject of compensation is located outside the subpixel, such as the data driver 30, the compensation circuit (CC) may be omitted. In other words, one subpixel is basically composed of a 2T (Transistor) 1C (Capacitor) structure including a switching transistor (SW), a driving transistor (DR), a capacitor, and an organic light emitting diode (OLED), but the compensation circuit (CC) If added, it may be configured in various ways such as 3T1C, 4T2C, 5T2C, 6T2C, 7T2C, etc. In addition, in Figures 2 and 3, the compensation circuit (CC) is shown as being located between the switching transistor (SW) and the driving transistor (DR), but it can also be located between the driving transistor (DR) and the organic light-emitting diode (OLED). It may be possible. The location and structure of the compensation circuit (CC) are not limited to FIGS. 2 and 3.

Figure 4 is a plan view showing an organic light emitting display device according to the present invention. Figure 5 is a cross-sectional view showing the subpixel portion of the organic light emitting display device according to the present invention.

Referring to FIG. 4, the organic light emitting display device includes a display portion (A/A) and a non-display portion (N/A) on a substrate (SUB). The non-display portion N/A includes a GIP driver GIP disposed on the left and right sides of the substrate SUB, and a pad portion PD disposed below the substrate SUB. The display unit (A/A) has a plurality of subpixels (SP) arranged and emits R, G, B or R, G, B, W to implement full color. The GIP driver (GIP) applies a gate drive signal to the display portion (A/A). The pad portion PD is disposed on one side, for example, the lower side of the display portion A/A, and chip-on-films (COFs) are attached to the pad portion PD. A data signal and power supplied through a chip-on-film (COF) are applied to a plurality of signal lines (not shown) connected from the display unit (A/A).

Hereinafter, with reference to FIG. 5 of the present invention, the cross-sectional structure of the subpixel (SP) area of the organic light emitting display device will be examined.

Referring to FIG. 5, the organic light emitting display device according to one embodiment of the present invention has a first buffer layer (BUF1) located on the substrate (SUB). The substrate (SUB) may be a flexible substrate or a glass substrate, and the flexible substrate may be a flexible resin substrate such as polyimide. The first buffer layer BUF1 serves to protect the thin film transistor formed in a subsequent process from impurities such as alkali ions leaking from the substrate SUB. The buffer layer (BUF) may be silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof.

The shield layer LS is located on the first buffer layer BUF1. The shield layer (LS) serves to prevent photocurrent from occurring in the thin film transistor by blocking external light from entering. A second buffer layer (BUF2) is located on the shield layer (LS). The second buffer layer (BUF2) serves to protect the thin film transistor formed in a subsequent process from impurities such as alkali ions leaking from the shield layer (LS). The second buffer layer (BUF2) may be silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof.

The semiconductor layer (ACT) is located on the second buffer layer (BUF2). The semiconductor layer (ACT) may be made of a silicon semiconductor or an oxide semiconductor. Silicon semiconductors may include amorphous silicon or crystallized polycrystalline silicon. Here, polycrystalline silicon has high mobility (over 100㎠/Vs), low energy consumption and excellent reliability, so it can be applied to gate drivers and/or multiplexers (MUX) for driving elements or to driving TFTs within pixels. there is. Meanwhile, oxide semiconductors have low off-current, so they are suitable for switching TFTs that have a short on time and a long off time. In addition, since the off-current is small, the pixel voltage maintenance period is long, making it suitable for display devices that require low-speed driving and/or low power consumption. Additionally, the semiconductor layer ACT includes a drain region and a source region containing p-type or n-type impurities, and includes a channel between them.

A gate insulating film (GI) is located on the semiconductor layer (ACT). The gate insulating film (GI) may be silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. A gate electrode (GA) is located on the gate insulating film (GI) in a certain area of the semiconductor layer (ACT), that is, at a position corresponding to a channel where impurities are injected. The gate electrode (GA) is selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It is formed from either one or an alloy thereof. In addition, the gate electrode (GA) is a group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a multi-layer made of any one selected from or an alloy thereof. For example, the gate electrode GA may be a double layer of molybdenum/aluminum-neodymium or molybdenum/aluminum.

An interlayer dielectric (ILD) that insulates the gate electrode (GA) is located on the gate electrode (GA). The interlayer insulating layer (ILD) may be a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof. Contact holes (CH) exposing a portion of the semiconductor layer (ACT) are located in some areas of the interlayer insulating layer (ILD) and the gate insulating layer (GI).

A drain electrode (DE) and a source electrode (SE) are located on the interlayer insulating layer (ILD). The drain electrode (DE) is connected to the semiconductor layer (ACT) through a contact hole (CH) that exposes the drain region of the semiconductor layer (ACT), and the source electrode (SE) exposes the source region of the semiconductor layer (ACT). It is connected to the semiconductor layer (ACT) through the contact hole (CH). The source electrode (SE) and drain electrode (DE) may be made of a single layer or multiple layers. When the source electrode (SE) and drain electrode (DE) are a single layer, molybdenum (Mo), aluminum (Al), or chromium It may be made of any one selected from the group consisting of (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. In addition, when the source electrode (SE) and drain electrode (DE) are multilayers, a double layer of molybdenum/aluminum-neodymium, a triple layer of titanium/aluminum/titanium, molybdenum/aluminum/molybdenum, or molybdenum/aluminum-neodymium/molybdenum. It can be done. Accordingly, a thin film transistor (TFT) is constructed including a semiconductor layer (ACT), a gate electrode (GA), a drain electrode (DE), and a source electrode (SE).

The first passivation film (PAS1) is located on the substrate (SUB) including the thin film transistor (TFT). The first passivation film (PAS1) is an insulating film that protects the underlying device, and may be a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multiple layer thereof. A color filter (CF) is located on the first passivation film (PAS1). A color filter (CF) serves to convert white light emitted from an organic light-emitting diode (OLED) into red, green, or blue. An overcoat layer (OC) is located on the color filter (CF). The overcoat layer (OC) may be a flattening film to alleviate steps in the lower structure, and is made of organic materials such as polyimide, benzocyclobutene series resin, and acrylate. The overcoat layer (OC) can be formed in a method such as SOG (spin on glass) in which the organic material is coated in a liquid form and then cured.

A via hole (VIA) exposing the drain electrode (DE) is located in some areas of the overcoat layer (OC). An organic light emitting diode (OLED) is located on the overcoat layer (OC). More specifically, the first electrode (ANO) is located on the overcoat layer (OC). The first electrode (ANO) acts as a pixel electrode and is connected to the drain electrode (DE) of the thin film transistor (TFT) through a via hole (VIA). The first electrode (ANO) is an anode and may be made of a transparent conductive material such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or ZnO (Zinc Oxide). When the first electrode (ANO) is a reflective electrode, the first electrode (ANO) further includes a reflective layer. The reflective layer may be made of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), or an alloy thereof, and is preferably made of APC (silver/palladium/copper alloy).

A bank layer (BNK) that partitions pixels is located on the substrate (SUB) including the first electrode (ANO). The bank layer (BNK) is made of organic materials such as polyimide, benzocyclobutene series resin, and acrylate. The bank layer (BNK) has a pixel definition portion (OP) that exposes the first electrode (ANO). An organic layer (EML) in contact with the first electrode (ANO) is located on the front surface of the flexible substrate (PI). The organic layer (EML) is a layer that emits light by combining electrons and holes, and may include a hole injection layer or hole transport layer between the organic layer (EML) and the first electrode (ANO), and may include a hole injection layer or a hole transport layer on the organic layer (EML). It may include an electron transport layer or an electron injection layer.

The second electrode (CAT) is located on the organic layer (EML). The second electrode (CAT) is located in front of the display unit (A/A), and as a cathode electrode, it can be made of magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or an alloy thereof with a low work function. there is. If the second electrode (CAT) is a transmissive electrode, it is thin enough to allow light to pass through, and if it is a reflective electrode, it is thick enough to reflect light. A second passivation film (PAS2) is located on the second electrode (CAT).

A protective member (FSM) is attached to the upper surface of the substrate (SUB) on which the thin film transistor (TFT) and organic light emitting diode (OLED) are formed through an adhesive layer (ADL). The protective member (FSM) may be a thin metal film.

The organic light emitting display device configured as described above is provided with a ground line for discharging static electricity flowing in from the outside.

FIG. 6 is a plan view showing an organic light emitting display device according to the present invention, and FIG. 7 is a cross-sectional view taken along line A-A' of FIG. 6. In the following, the description of the same configurations as those in FIGS. 4 and 5 described above will be simplified or omitted.

Referring to FIG. 6, the organic light emitting display device includes a display portion (A/A) on which a plurality of subpixels (SP) are arranged, and a substrate (SUB) including a non-display portion (N/A) other than the display portion (A/A). Includes. The non-display portion (N/A) includes a GIP driver (GIP) disposed on the left and right sides of the substrate (SUB), respectively, and a chip-on-film (COF) disposed on the lower side of the substrate (SUB). The display unit (A/A) has a plurality of subpixels (SP) arranged and emits R, G, B or R, G, B, W to implement full color.

The organic light emitting display device is provided with a ground line (GND) in the non-display area (N/A) to discharge static electricity flowing in from the outside. The ground line (GND) is made of a conductive material that can emit static electricity, and is positioned to surround the edge of the organic light emitting display device to protect elements such as thin film transistors, organic light emitting diodes, and capacitors. Specifically, the ground line (GND) is arranged in a shape surrounding the GIP driver (GIP) and the display unit (A/A). Both ends of the ground line (GND) surrounding the GIP driver (GIP) and display unit (A/A) are connected to the chip-on-film (COF) to discharge static electricity to the outside.

Specifically, referring to FIG. 7, a ground line (GND) is located on the outside of the non-display portion of the organic light emitting display device and a plurality of clock lines (CLK) are located on the inside. The clock lines (CLK) are composed of a lower layer (CLK1) and an upper layer (CLK2), but are not particularly limited. The clock lines (CLK) constitute the GIP driver (GIP) and serve to apply signals to a plurality of thin film transistors of the GIP driver (GIP). However, when external static electricity is induced into the ground line (GND), static electricity may flow into clock lines (CLK) adjacent to the ground line (GND). Since the clock lines (CLK) are connected to the thin film transistors of the GIP driver (GIP), the thin film transistors are damaged by static electricity, causing driving failure.

Hereinafter, an organic light emitting display device according to various embodiments of the present invention that can prevent damage to the GIP driver will be described. In the following, the description of the same components as those in FIGS. 6 and 7 described above will be simplified or omitted.

<Example>

FIG. 8 is a plan view showing an organic light emitting display device according to an embodiment of the present invention, and FIG. 9 is a cross-sectional view taken along line B-B' of FIG. 8.

Referring to FIG. 8, the organic light emitting display device according to an embodiment of the present invention includes a display portion (A/A) in which a plurality of subpixels (SP) are arranged, and a non-display portion (N/A) other than the display portion (A/A). It includes a substrate (SUB) including a.

The display unit (A/A) has a plurality of subpixels (SP) arranged and emits R, G, B or R, G, B, W to implement full color. The non-display area (N/A) refers to the area other than the display area (A/A). The GIP driving unit (GIP) is placed on the left and right sides of the display area (A/A), and the display area where the GIP driving unit (GIP) is not placed ( A/A) and includes a pad portion (PD) disposed on one side. The pad portion (PD) includes a chip-on-film (COF) connected to the circuit board.

The organic light emitting display device according to an embodiment of the present invention is provided with a ground line (GND) in the non-display area (N/A) to discharge static electricity flowing in from the outside. The ground line (GND) is made of a conductive material that can emit static electricity, and is positioned to surround the edge of the organic light emitting display device to protect elements such as thin film transistors, organic light emitting diodes, and capacitors. Specifically, the ground line (GND) is arranged in a shape surrounding the GIP driver (GIP) and the display unit (A/A). Both ends of the ground line (GND) surrounding the GIP driver (GIP) and display unit (A/A) are connected to the chip-on-film (COF) to discharge static electricity to the outside.

In particular, in the embodiment of the present invention, the ground line (GND) is branched into at least two or more branches. Specifically, the ground line (GND) includes a single portion (GNDI) consisting of one line and at least two branch portions (GNDD). A single portion (GNDI) of the ground line (GND) is disposed in the pad portion (PD), and a branch portion (GNDD) of the ground line (GND) is disposed in an area adjacent to the GIP driver (GIP). For example, the ground line (GND) branches off from one side of the pad portion (PD), surrounds the GIP driver (GIP) and the display portion (A/A), and merges again at the other side of the pad portion (PD).

Referring to FIG. 9 , a ground line (GND) is located on the outside of the non-display portion of the organic light emitting display device and a plurality of clock lines (CLK) are located on the inside. The clock lines (CLK) constitute the GIP driver (GIP) and serve to apply signals to a plurality of thin film transistors of the GIP driver (GIP). Since the clock lines (CLK) of the GIP driver (GIP) are placed closest to the ground line (GND), there is a possibility that static electricity may flow into the clock lines (CLK) through the ground line (GND). If static electricity flows into the clock lines (CLK), the thin film transistors of the GIP driver (GIP) are damaged.

Accordingly, the ground line (GND) of the present invention includes a branch portion (GNDD) branched from an area adjacent to the GIP driver (GIP). If the ground lines (GND) are branched into multiple numbers, even if static electricity flows in from the outside, the static electricity may spread through the branched ground lines (GND) and dissipate or be discharged to the outside.

Referring again to FIG. 8, in this embodiment, the branch portion (GNDD) of the ground line (GND) is disposed on the upper and left and right sides of the display portion (A/A), and the single portion (GNDI) of the ground line (GND) is It may be placed in the pad portion PD. Two or more ground lines (GND) may be branched and disposed at the branch (GNDD) of the ground line (GND). In this embodiment, the ground line (GND) may be branched into three. If the number of branched lines of the ground line (GND) is large, static electricity can spread better, but the number of branched lines of the ground line (GND) can be appropriately adjusted within the allowed area of the non-display area (N/A). . The gap between branched lines of the ground line (GND) may be widened or narrowed depending on the number of branched lines, but is not particularly limited.

10 and 11 are cross-sectional views of organic light emitting display devices of various structures according to embodiments of the present invention.

Referring to FIG. 10, the organic light emitting display device according to an embodiment of the present invention may be arranged so that at least one of the branched ground lines overlaps an adhesive. In the organic light emitting display device, an adhesive (FSA) is placed on a passivation film (PAS) covering the ground line (GND) and clock lines (CLK), and the protective member (FSM) is attached to the substrate (SUB) through the adhesive (FSA). It is constructed by cementing with.

One of the branched ground lines (GND) of the present invention is disposed overlapping with the adhesive (FSA). Adhesives (FSA) are made of polymers such as acrylic or epoxy. Adhesive (FSA) Due to the nature of the material, adhesive (FSA) acts as a dielectric and can prevent static electricity from entering. Therefore, it is possible to block static electricity from flowing into the branched ground line (GND) disposed to overlap the adhesive (FSA).

As shown in Figure 10, it is preferred that one of the ground lines (GND) completely overlaps the adhesive (FSA). However, even if one of the ground lines (GND) only partially overlaps with the adhesive (FSA), the inflow of static electricity can be blocked to some extent.

Meanwhile, referring to FIG. 11, the organic light emitting display device according to an embodiment of the present invention may be arranged so that at least one of the branched ground lines overlaps an overcoat layer that overlaps the adhesive. In an organic light emitting display device, an overcoat layer (OC) is partially disposed on a passivation film (PAS) that covers the ground line (GND) and clock lines (CLK). The organic light emitting display device is formed by bonding the protective member (FSM) to the substrate (SUB) on which the overcoat layer (OC) is formed using an adhesive (FSA).

One of the branched ground lines (GND) of the present invention is disposed overlapping an overcoat layer (OC) overlaid with an adhesive (FSA). The overcoat layer (OC) is made of polymers such as acrylic and imide. Due to the nature of the overcoat layer (OC) material, the overcoat layer (OC) acts as a dielectric and can prevent static electricity from flowing in. Accordingly, it is possible to block static electricity from flowing into the branched ground line (GND) disposed to overlap the overcoat layer (OC) that overlaps the adhesive (FSA). In particular, the overcoat layer (OC) can block static electricity twice along with the adhesive (FSA).

As shown in FIG. 11, it is preferable that one of the ground lines (GND) completely overlaps the overcoat layer (OC), but even if it only partially overlaps, the inflow of static electricity can be blocked to some extent.

Figure 12 is a plan view showing an organic light emitting display device of another structure according to the present invention.

Referring to FIG. 12, unlike the above-described FIG. 8, the organic light emitting display device of the present invention may have different positions of the branch portion (GNDD) and the single portion (GNDI) of the ground line (GND). In the above-mentioned FIG. 8, it is shown and explained that a single portion (GNDI) of the ground line (GND) is disposed on the pad portion (PD) and a branch portion (GNDD) of the ground line (GND) is disposed in addition.

In this embodiment, a single portion (GNDI) of the ground line (GND) may be disposed on one side of the non-display portion (N/A) opposite to the pad portion (PD). The GIP driver (GIP) is not disposed on one side of the non-display portion (N/A) opposite the pad portion (PD), and the distance from the display portion (A/A) is relatively wide. Accordingly, the branch portion GNDI of the ground line GND is disposed adjacent to the GIP driver GIP and, for example, may be disposed on the left and right sides of the display portion A/A, respectively. Although not shown, the branch part (GNDI) of the ground line (GND) may be arranged in parallel with the GIP driving part (GIP).

Figure 13 is a graph measuring the static electricity defect rate and performance level before and after changing the design of the ground line. (Here, the power value refers to the magnitude of the static electricity voltage that can damage the thin film transistor through the ground line when static electricity is applied to the organic light emitting display device. For example, static electricity with voltages of 1, 2, 3, and 4V is applied sequentially. If the thin film transistor is damaged at 4V when applied, this static electricity capacity is 4V.)

Referring to FIG. 13, when considering the static electricity defect rate and skill level of 0% when the ground line is composed of one line (Figure 6), the relative static electricity defect rate when the ground line is branched into three lines (Figure 8) is It was found to be -88.6%, and the static electricity skill level increased by 25%.

The organic light emitting display device according to the above-described embodiments of the present invention branches the ground line into at least two or more, so that even if static electricity flows in from the outside, the static electricity can be dissipated or discharged to the outside by spreading the static electricity through the branched ground lines. Therefore, there is an advantage in preventing damage to the adjacent GIP driving unit due to static electricity through the ground line.

Through the above-described content, those skilled in the art will be able to see that various changes and modifications can be made without departing from the technical idea of the present invention. Therefore, the technical scope of the present invention should not be limited to what is described in the detailed description of the specification, but should be defined by the scope of the patent claims.

SUB: Board A/A: Display unit
N/A: Non-displaying part GIP: GIP driving part
GND: Ground line GNDD: Branch
GNDI: Single part COF: Chip on film
PD: Pad SP: Subpixel

Claims (9)

A substrate including a display portion on which a plurality of subpixels are arranged and another non-display portion;
a GIP driving unit disposed in the non-display portion and disposed on at least one side of the display portion;
a ground line disposed in the non-display portion and surrounding the GIP driver and the display portion;
a protective member disposed on the display unit and the GIP driving unit; and
It includes an adhesive disposed between the display unit, the GIP driver, and the protective member to bond the substrate and the protective member,
The ground line branches at least into two,
A display device wherein at least one of the branched ground lines overlaps both the adhesive and the protective member. According to claim 1,
The ground line is a display device including a single line and at least two branched portions. According to clause 2,
It is disposed in the non-display portion and further includes a pad portion disposed on one side of the display portion where the GIP driving portion is not disposed,
A display device in which a single portion of the ground line is disposed in the pad portion, and a branch portion of the ground line is disposed in an area adjacent to the GIP driver. According to clause 3,
The display device wherein the ground line branches off from one side of the pad portion, surrounds the GIP driver and the display portion, and merges at the other side of the pad portion. According to clause 3,
A display device in which a single portion of the ground line is disposed on one side of the non-display portion opposite the pad portion. delete According to claim 1,
A display device wherein at least one of the ground lines completely overlaps the adhesive. According to claim 1,
It is disposed on the ground line, and further includes an overcoat layer partially disposed below the adhesive,
A display device wherein at least one of the ground lines overlaps the overcoat layer. According to clause 8,
A display device wherein at least one of the ground lines overlaps all of the overcoat layer, the adhesive, and the protective member.

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