KR102593790B1 - LCoS and Its Manufacturing Method - Google Patents

Abstract

Disclosed is LCoS and its manufacturing method.
According to one aspect of this embodiment, in the method of manufacturing LCoS, a forming process of forming grooves at intervals between unit cells on a silicon wafer, a rubbing process of printing and rubbing an alignment film on one side of the silicon wafer and a glass substrate, and the silicon wafer A printing process of printing or drawing a seal line between the wafer and a glass substrate, a bonding process of bonding the silicon wafer and the glass substrate, a cutting process of cutting the silicon wafer and the glass substrate at each LCoS unit cell interval, and each cut LCoS unit. An LCoS manufacturing method is provided, which includes an injection process of injecting liquid crystal between the lower and upper substrates of a cell and a sealing process of sealing an injection hole using an encapsulant.

Description

LCoS and its manufacturing method {LCoS and Its Manufacturing Method}

This embodiment relates to LCoS and its manufacturing method.

The content described in this section simply provides background information for this embodiment and does not constitute prior art.

LCoS (Liquid Crystal on Silicon) is an ultra-small display device that is applied to augmented reality devices. LCoS has structural similarities and differences from general LCDs at the same time. The similarities are that liquid crystals are contained between two substrates, an alignment film that arranges the liquid crystals exists on the surface of the substrate, a pixel electrode for applying an electric field to control the liquid crystal arrangement for each pixel, and a plurality of TFT elements connected to the pixel electrodes. It has a driving circuit including.

The difference between LCoS and general LCD is that the back plane substrate of LCoS uses a silicon wafer, so it can only be used as a reflective display, not a transmissive display, and LCoS has very small pixels. In addition, a significant portion of the LCoS TFT circuit or the driver circuit for driving the wiring or display is built inside or below the silicon wafer. The display size of LCoS is also very small, usually not exceeding 1 inch diagonally.

In the case of LCoS, similar to a regular LCD, it can have various liquid crystal modes. That is, LCoS can have various liquid crystal arrangement structures such as horizontal alignment mode, twist alignment mode, or vertical alignment mode. LCoS, which has such a variety of liquid crystal modes, requires a rubbing process to rub the alignment layer.

In conventional LCoS, liquid crystal is injected between the backplane substrate (silicon wafer) and the upper glass substrate and then sealed. Then, by cutting to the size of each cell, an LCoS with one cell size is manufactured. However, when cutting the substrate to each cell size during the conventional LCoS manufacturing process, the backplane substrate has been cut using sawing equipment or a scribing wheel.

However, cutting using sawing equipment takes a long time, fine particles from the backplane board are generated during the cutting process, causing foreign matter, and it is quite difficult to precisely cut only the backplane board out of the two joined boards.

On the other hand, cutting with a scribing wheel does not cause the same problems as cutting with the sawing equipment described above. There is no problem in the process of cutting the upper glass substrate with a scribing wheel, but when cutting the backplane substrate, a problem occurs in that the cutting surface is not straight and is cut at an angle. When cutting the backplane substrate with a scribing wheel, the backplane substrate is not cut in line with the cutting direction due to the atomic arrangement structure and physical characteristics of the silicon wafer, which is the backplane substrate, and problems frequently occur in that the backplane substrate is cut at an angle or irregularly. .

The purpose of one embodiment of the present invention is to provide LCoS with a smooth shape and an LCoS manufacturing method that is simple and can secure high yield.

According to one aspect of this embodiment, in the method of manufacturing LCoS, a forming process of forming grooves at intervals between unit cells on a silicon wafer, a rubbing process of printing and rubbing an alignment film on one side of the silicon wafer and a glass substrate, and the silicon wafer A printing process of printing or drawing a seal line between the wafer and a glass substrate, a bonding process of bonding the silicon wafer and the glass substrate, a cutting process of cutting the silicon wafer and the glass substrate at each LCoS unit cell interval, and each cut LCoS unit. An LCoS manufacturing method is provided, which includes an injection process of injecting liquid crystal between the lower substrate and the upper substrate of the cell and a sealing process of sealing the injection hole using an encapsulant.

According to one aspect of this embodiment, the forming process is characterized in that it proceeds as much as a preset width.

According to one aspect of this embodiment, the preset width is characterized in that it is 50㎛ or less.

According to one aspect of this embodiment, the forming process is characterized in that it progresses to a preset depth.

According to one aspect of this embodiment, the preset depth is 10 to 60% of the thickness of the silicon wafer.

According to one aspect of this embodiment, the seal line is characterized by being implemented with a polymer sealant (Sealant) having thermosetting characteristics.

According to one aspect of this embodiment, LCoS manufactured by the above manufacturing method is provided.

According to one aspect of this embodiment, a pixel electrode and an alignment layer are disposed on one side, a lower substrate supporting the LCoS internal structure, a transparent electrode and an alignment layer are disposed on one side, and an upper substrate and a positive electrode form a space into which liquid crystal will be injected. A seal line printed or drawn between the substrates to maintain the gap between each substrate and form a liquid crystal receiving space, and a sealing material that seals the liquid crystal inlet of the seal line to prevent liquid crystal from being discharged from the receiving space. It provides an LCoS, wherein the lower substrate includes steps at both ends.

According to one aspect of this embodiment, the upper substrate is seated on the seal line to form a space into which injection will be performed together with the lower substrate and the seal line.

According to one aspect of this embodiment, the seal line is printed or drawn with a bias toward one end of each of the lower substrate and the upper substrate.

As described above, according to one aspect of this embodiment, there is an advantage in that LCoS with a smooth shape can be manufactured simply and with high yield.

1 is a top view of LCoS according to a first embodiment of the present invention.
Figure 2 is a cross-sectional view of LCoS according to the first embodiment of the present invention.
Figures 3 to 8 are diagrams showing the process of manufacturing LCoS according to the first embodiment of the present invention.
Figure 9 is a top view of LCoS according to the second embodiment of the present invention.
Figure 10 is a flowchart showing a method of manufacturing LCoS according to an embodiment of the present invention.

Since the present invention can make various changes and have various embodiments, specific embodiments will be illustrated in the drawings and described in detail. However, this is not intended to limit the present invention to specific embodiments, and should be understood to include all changes, equivalents, and substitutes included in the spirit and technical scope of the present invention. While describing each drawing, similar reference numerals are used for similar components.

Terms such as first, second, A, and B may be used to describe various components, but the components should not be limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, a first component may be named a second component, and similarly, the second component may also be named a first component without departing from the scope of the present invention. The term and/or includes any of a plurality of related stated items or a combination of a plurality of related stated items.

When a component is said to be "connected" or "connected" to another component, it is understood that it may be directly connected to or connected to the other component, but that other components may exist in between. It should be. On the other hand, when it is mentioned that a component is “directly connected” or “directly connected” to another component, it should be understood that there are no other components in between.

The terms used in this application are only used to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, terms such as "include" or "have" should be understood as not precluding the existence or addition possibility of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification. .

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the technical field to which the present invention pertains.

Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related technology, and unless explicitly defined in the present application, should not be interpreted in an ideal or excessively formal sense. No.

Additionally, each configuration, process, process, or method included in each embodiment of the present invention may be shared within the scope of not being technically contradictory to each other.

FIG. 1 is a plan view of an LCoS according to a first embodiment of the present invention, and FIG. 2 is a cross-sectional view of an LCoS according to a first embodiment of the present invention.

Referring to Figures 1 and 2, the LCoS 100 according to the first embodiment of the present invention includes a lower substrate 110, a pad portion 113, an alignment layer 116, 125, an upper substrate 120, and a liquid crystal 130. ), seal line 140, and encapsulant 150.

The lower substrate 110 (Back Plane) includes the pixel electrode in the LCoS 100 and other components for driving it. The lower substrate 110 may be implemented as a silicon wafer, thereby reflecting light incident from the outside and operating as an LCoS (100) reflective display.

The lower substrate 110 may include a pixel electrode (not shown) on one side facing the upper substrate 120 to generate an electric field. A pixel electrode (not shown) is disposed, receives power from the outside, forms an electric field, and orients the liquid crystal 130.

A seal line 140 or a pad portion 113 may be printed or drawn on the outside of the liquid crystal on one side of the lower substrate 110 facing the upper substrate 120 . On the lower substrate 110, the seal line 140 is printed or drawn with a bias toward one end, and the liquid crystal 130 is injected into the space formed by the seal line 140. Accordingly, the other end on the corresponding side of the lower substrate 110 forms a sufficient space in which the pad portion 113 can be disposed. The pad portion 113 is disposed on the other end of one side of the lower substrate 110 and allows a driving circuit (not shown) to be connected to the lower substrate 110 from the outside. The lower substrate 110 is electrically connected to the driving circuit (not shown) via the pad portion 113, and determines whether or not an electric field is generated in the pixel electrode (not shown) according to the control of the driving circuit (not shown) and the electric field to be generated. You can control the intensity.

The alignment film 116 is disposed on one side of the lower substrate 110 facing the upper substrate 120 . In particular, the alignment film 116 is formed by the lower substrate 110, the upper substrate 120, and the seal line 140 within the space into which the liquid crystal 130 will be injected (on the above-mentioned surface of the lower substrate 110). ) is placed. The alignment film 116 is disposed at the above-mentioned position and is formed so as not to deviate from the seal line 140. The alignment film 116 is disposed at the corresponding position, and when an electric field is formed by a driving circuit (not shown), the electric field Even if the arrangement direction of the liquid crystals changes to a direction different from the initial arrangement direction, the liquid crystals adjacent to the alignment film are maintained in the initial arrangement direction.

The lower substrate 110 has steps 119 at both ends. The lower substrate 110 is manufactured to have a groove first formed during the manufacturing process of the LCoS 100 and later to have steps 119 at both ends of the LCoS, so that the wafer surface edge on the side in contact with the liquid crystal has a pre-formed groove shape. You can have a cutting surface without error along . As in the related art, when the lower substrate 110 is cut into a shape without steps due to grooves, there is a problem in that the edge surface is not formed uniformly due to the atomic arrangement structure and physical characteristics of the silicon wafer. The lower substrate 110 includes the step 119, thereby solving the above-described problem.

The lower substrate 110 can be equipped with a TFT circuit and wiring to control the operation of the LCoS (100).

The upper substrate 120 is seated on the seal line 140 and, together with the lower substrate 110 and the seal line 140, forms a space into which the liquid crystal 130 will be injected. The upper substrate 120 is made of glass, allowing light incident from the outside to pass through.

The upper substrate 120 may include a transparent electrode (not shown) on one side facing the lower substrate 110 to similarly generate an electric field. A transparent electrode (not shown) is disposed, receives power from the outside, forms an electric field, and orients the liquid crystal 130. Similar to the lower substrate 110, the upper substrate 120 is printed or drawn with a seal line 140 biased toward one end, and the liquid crystal 130 is injected into the space formed by the seal line 140. Accordingly, sufficient space is formed at the other end of the corresponding side of the upper substrate 120 to allow power to be applied from the outside using a transparent electrode (not shown). A transparent electrode (not shown) formed on the other end of the upper substrate 120 receives power from the outside and forms an electric field.

The alignment film 125 is disposed on one side of the upper substrate 120 facing the lower substrate 110 . In particular, like the alignment film 116, the alignment film 125 is also formed by the lower substrate 110, the upper substrate 120, and the seal line 140 within the space where the liquid crystal 130 will be injected (lower substrate (on the above-described side of 110) and performs the same operation.

Meanwhile, the upper substrate 120 may be implemented with a material having a thermal expansion coefficient within a preset error range and the lower substrate 110 may be implemented as a silicon wafer. When the lower substrate 110 is implemented as a silicon wafer, the upper substrate 120 may be implemented as borosilicate glass whose thermal expansion coefficient is within a preset error range. As will be described later, the seal line 140 is implemented with a polymer sealant having thermosetting characteristics. Accordingly, it is essential for each substrate 110 and 120 to be exposed to at least the temperature at which the seal line 140 must be cured. At this time, if the thermal expansion coefficients of the two are different, a problem may occur in which the two are bent to different degrees during the above-described thermal process. If the two bend to different degrees due to differences in thermal expansion coefficients (more than the error range), it makes the LCoS manufacturing process difficult and causes a problem that reduces the reliability of housing (sealing) the liquid crystal 130. In order to prevent this problem, the upper substrate 120 is implemented with the above-described material, thereby preventing the above-mentioned problem.

The seal line 140 is printed or drawn between the substrates 110 and 120 to maintain a gap between the substrates 110 and 120 and form a space 144 for receiving the liquid crystal 130. The seal line 140 is implemented with a polymer sealant having thermosetting characteristics and can be printed or drawn between each substrate 110 and 120. The seal line 140 may be implemented with a polymer sealant having photocurable characteristics, but the adhesive strength of the photocurable polymer sealant is relatively weak and may be unstable when accommodating the liquid crystal 130. Accordingly, the seal line 140 is implemented with a polymer sealant having thermosetting characteristics.

The seal line 140 has a preset shape, for example, a square shape, and forms an accommodation space therein. The seal line 140 includes an injection hole 148 in one portion, allowing liquid crystal 130 to be injected into the receiving space 144 from the outside.

The encapsulant 150 seals the injection port 148 of the seal line 140 to prevent the liquid crystal 130 from being discharged from the receiving space 144. The encapsulant 150 is partially injected and hardened into the receiving space 144 formed by the seal line 140, particularly the injection port 148, and seals the injection port 148. The encapsulant 150 seals the injection port 148 of the seal line 140 and prevents the liquid crystal 130 from being discharged to the outside from the receiving space 144.

The LCoS 100 may have the above-described configuration and structure by being manufactured according to a process to be described later. Because of this, the LCoS (100) can be manufactured simply and secure a high yield, while at the same time having a structure or shape that does not cause deviation or error in the cutting surface.

Figures 3 to 8 are diagrams showing the process of manufacturing LCoS according to the first embodiment of the present invention.

Referring to FIG. 3, a process of forming grooves 320 at intervals between LCoS unit cells 330 to be formed on the silicon wafer 310 is performed. The pixel electrode (not shown) is already formed on the silicon wafer 310. A groove 320 is formed on the silicon wafer 310, especially on the side facing the glass substrate 420 to be mounted according to a process to be described later, through a sawing process at intervals between the LCoS unit cells 330.

The formation of the groove 320 in the silicon wafer 310 progresses only to the following extent. The width of the formed groove 320 is 50 μm or less, and the depth is 10 to 60% of the thickness of the silicon wafer 310.

If the width of the formed groove 320 is greater than the above-mentioned length, the probability of scratches occurring on the surface of the silicon wafer 310 during the rubbing process of the alignment layer 116, which will be described later, significantly increases. In other words, the rubbing yarn (or yarn) of the rubbing cloth rotating at high speed is damaged due to the groove or causes rubbing scratches on the side of the groove. However, when the width of the groove 320 is 50 μm or less, the probability of such defects is significantly lowered. Accordingly, the width of the formed groove 320 is only 50㎛ or less.

Additionally, the depth of the groove 320 is formed only by 10 to 60%. In particular, as will be described later, when the groove 320 is formed in the silicon wafer 310 through the process (scribing process) shown in FIG. 6A, the depth of the groove 320 is 10 to 10 times the thickness of the silicon wafer 310. It is desirable to form only up to 30%. If the silicon wafer 310 includes a groove 320 with a depth less than the above-described level, there is a possibility that the silicon wafer 310 may not be cut smoothly as it is cut at unit cell intervals through the process shown in FIG. 6A. exist. Conversely, if the silicon wafer 310 includes a groove 320 having a depth greater than the above-mentioned level, a situation may occur in which the silicon wafer 310 is separated before the cutting process.

Meanwhile, as will be described later, when cutting the silicon wafer 310 using the process shown in FIG. 6B (process using breaking equipment), the depth of the groove 320 is formed only up to 30 to 60% of the thickness of the silicon wafer 310. It is desirable to be If the silicon wafer 310 includes a groove 320 with a depth less than the above-described level, a significant impact must be applied in order for the silicon wafer 310 to be cut through the process shown in FIG. 6B. Conversely, if the silicon wafer 310 includes a groove 320 having a depth greater than the above-mentioned level, a situation may occur in which the silicon wafer 310 is separated before the cutting process. Accordingly, the depth of the groove 320 formed in the silicon wafer 310 progresses to an appropriate depth according to the subsequent process.

Referring to FIG. 4, alignment layers 116 and 125 are rubbed on one surface of the silicon wafer 310 and the glass substrate 410 on which the grooves are formed, respectively. Alignment layers 116 and 125 are coated on one side of each of the silicon wafer 310 and the glass substrate 410, and the coated alignment layers 116 and 125 are rubbed.

Referring to FIG. 5, a seal line 140 is printed or drawn on one side (where the groove is formed) of the silicon wafer 310 to form a receiving space within the LCoS unit cell at every LCoS unit cell interval, and the seal line 140 ) The glass substrate 410 is bonded on top. At this time, the glass substrate 410 is bonded so that the alignment layer 125 faces the silicon wafer 310. After the glass substrate 410 is bonded, the seal line 140 is thermoset.

Referring to FIG. 6A, cutting is performed on the glass substrate 410 and the silicon wafer 310 at intervals of each LCoS unit cell. As described with reference to FIG. 2, the glass substrate 410 has a structure in which each LCoS unit cell has sufficient space at the other end (the right end based on FIG. 6A), so that the spacing between each LCoS unit cell is Each is scribed. Meanwhile, the silicon wafer 310 is scribed at every LCoS unit cell interval on the side opposite to the side where the groove is formed. Since the groove is formed in the silicon wafer 310, cutting can be performed in a relatively straight shape, and the possibility of damaging the glass substrate 410 during the cutting (scribing) process is significantly reduced. When a silicon wafer without grooves is completely scribed, there is a high possibility of damage to the glass substrate 410 during the scribing process. However, as the groove is formed in the silicon wafer 310, the above-described problem can be prevented.

Referring to FIG. 6b, similarly, cutting is performed on the glass substrate 410 and the silicon wafer 310 at intervals of each LCoS unit cell, but when cutting the silicon wafer 310, the breaking equipment impacts the side opposite to the side where the groove is formed. It can be progressed by adding . Since the groove has already been formed to a relatively deeper depth (compared to cutting with a scribing process), the silicon wafer 310 can be cut without the breaking equipment applying excessive impact.

Accordingly, the lower substrate 110 of the LCoS unit cell 100 may be implemented in a form having a step 119. The upper surface of the step 119 has a relatively smoother cross-section because it is the surface where the groove is formed, and the upper surface of the step 119 has a relatively less uniform cross-section because it is a surface that may be formed by breaking equipment. do. However, no matter what process the lower substrate 110 is cut through, it is done after the groove forming process, so the shape of the lower substrate 110 is not slanted or irregular and can be cut uniformly in the thickness direction (of the lower substrate). You can.

Referring to FIG. 7, liquid crystal 130 is injected into the injection hole 148 of each cut LCoS unit cell 100. After the liquid crystal 130 is injected, the injection hole 148 is sealed by the encapsulant 150.

Referring to FIG. 8, a pad portion 113 is disposed on the upper surface (the surface facing the upper substrate) of the lower substrate 110.

Through this process, the LCoS unit cell 100 is manufactured. Even if the lower substrate 110 of the LCoS unit cell 100 does not undergo a complicated process, it can be manufactured to have a shape without error on the edge surface.

Figure 9 is a top view of LCoS according to the second embodiment of the present invention.

Referring to FIG. 9, the LCoS 900 according to the second embodiment of the present invention includes seal lines 140 and 910 of a different shape from the LCoS 100.

The LCoS (900) has the same configuration as the LCoS (100), but further includes a second seal line (910) protruding from one end of the seal line (140) toward the receiving space (144). The second seal line 910 protrudes from one end of the seal line 140 toward the receiving space 144 and separates the receiving space 144 from the gas receiving space 920. The second seal line 910 does not completely physically separate the two spaces 144 and 920, and only a portion of the second seal line 910 is open so that the liquid crystal 130 injected into the receiving space 144 separates the two spaces 144 and 920. Separate it so it can flow.

When liquid crystal is injected through the inlet 148 into the receiving space 144 within the seal line 140, 910 implemented in this way, it does not proceed until all the receiving spaces 144, 920 are filled, but rather fills the gas receiving space. It proceeds only until residual gas (930) within (920) exists. If the liquid crystal 130 is not injected to the entire volume of all accommodation spaces 144 and 920, the remaining gas 930 is pushed out to the far end of the gas accommodation space 920 by the injection of the liquid crystal 130. Accordingly, the residual gas 930 is intentionally implemented to exist in the gas accommodation space 920. When external pressure or temperature changes, the characteristics or size (volume) of the liquid crystal 130 change. Residual gas 930 exists in the accommodation space 920, and internal pressure changes that occur as the characteristics or size of the liquid crystal 130 change can be minimized (buffered).

Figure 10 is a flowchart showing a method of manufacturing LCoS according to an embodiment of the present invention. The method of manufacturing LCoS 100 shown in FIG. 10 can be performed by an LCoS manufacturing device.

Grooves are formed at intervals between unit cells within the silicon wafer 310 (S1010).

Alignment layers 116 and 125 are printed and rubbed on one side of the silicon wafer 310 and the glass substrate 410 (S1020).

A seal line 140 is printed or drawn between the silicon wafer 310 and the glass substrate 410 (S1030).

The silicon wafer 310 and the glass substrate 410 are bonded (S1040).

The silicon wafer 310 and the glass substrate 410 are cut at each LCoS unit cell interval (S1040).

Liquid crystal 130 is injected between the lower substrate 110 and the upper substrate 120 (S1050).

The injection port 148 is sealed using the sealant 150 (S1060).

In Figure 10, each process is described as being sequentially executed, but this is merely an illustrative explanation of the technical idea of an embodiment of the present invention. In other words, a person skilled in the art to which an embodiment of the present invention pertains can change the order depicted in each drawing or perform one or more of the processes without departing from the essential characteristics of an embodiment of the present invention. Since various modifications and variations can be applied by executing in parallel, FIG. 10 is not limited to a time series order.

Meanwhile, the processes shown in FIG. 10 can be implemented as computer-readable codes on a computer-readable recording medium. Computer-readable recording media include all types of recording devices that store data that can be read by a computer system. That is, computer-readable recording media include storage media such as magnetic storage media (eg, ROM, floppy disk, hard disk, etc.) and optical read media (eg, CD-ROM, DVD, etc.). Additionally, computer-readable recording media can be distributed across networked computer systems so that computer-readable code can be stored and executed in a distributed manner.

The above description is merely an illustrative explanation of the technical idea of the present embodiment, and those skilled in the art will be able to make various modifications and variations without departing from the essential characteristics of the present embodiment. Accordingly, the present embodiments are not intended to limit the technical idea of the present embodiment, but rather to explain it, and the scope of the technical idea of the present embodiment is not limited by these examples. The scope of protection of this embodiment should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of this embodiment.

100: LCoS
110: lower substrate
113: Pad part
116, 125: alignment film
119: step
120: upper substrate
130: liquid crystal
140, 910: seal line
144: Accommodation space
148: Inlet
150: Encapsulation material
310: silicon wafer
320: Home
330: LCoS unit cell
410: glass substrate
920: Gas accommodation space

Claims (10)

In the method of manufacturing LCoS,
A forming process of forming grooves in a silicon wafer at intervals between unit cells;
A rubbing process of printing and rubbing an alignment film on one side of a silicon wafer and a glass substrate;
A printing process of printing or drawing a seal line to form a receiving space within an LCoS unit cell at every LCoS unit cell interval on the grooved surface of the silicon wafer;
A bonding process of bonding the silicon wafer and the glass substrate by bonding the glass substrate on the seal line;
A thermal curing process in which the seal line is thermally cured after the silicon wafer and the glass substrate are bonded through the bonding process;
A cutting process of cutting the silicon wafer and glass substrate at each LCoS unit cell interval;
An injection process of injecting liquid crystal between the lower and upper substrates of each cut LCoS unit cell; and
Including a sealing process of sealing the injection port using a sealing material,
The width of the groove formed in the forming process is 50㎛ or less, and the depth of the groove formed in the forming process is 30 to 60% of the thickness of the silicon wafer,
During the cutting process, the cutting of the silicon wafer is carried out by a breaking device applying an impact to the surface opposite to the grooved surface of the silicon wafer,
Through the cutting process, the lower substrate of the LCoS unit cell is implemented in a form with a step due to the groove,
The glass substrate is implemented with borosilicate glass, and the seal line is implemented with a polymer sealant having thermosetting characteristics,
The cutting position of the silicon wafer formed by the cutting process and the cutting position of the glass substrate formed by the cutting process are not located on the same straight line in the direction in which the silicon wafer and the glass substrate face each other. LCoS manufacturing method. delete delete delete delete delete LCoS manufactured by the manufacturing method of paragraph 1 delete delete delete

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