KR102586989B1 - 부분 행렬 순서화를 이용하는 행렬 곱셈기 - Google Patents

부분 행렬 순서화를 이용하는 행렬 곱셈기 Download PDF

Info

Publication number
KR102586989B1
KR102586989B1 KR1020217015589A KR20217015589A KR102586989B1 KR 102586989 B1 KR102586989 B1 KR 102586989B1 KR 1020217015589 A KR1020217015589 A KR 1020217015589A KR 20217015589 A KR20217015589 A KR 20217015589A KR 102586989 B1 KR102586989 B1 KR 102586989B1
Authority
KR
South Korea
Prior art keywords
matrix
multiplication
input register
cycle
multiplication cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020217015589A
Other languages
English (en)
Korean (ko)
Other versions
KR20210071073A (ko
Inventor
맥심 브이. 카자코프
지안 마오
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 어드밴스드 마이크로 디바이시즈, 인코포레이티드 filed Critical 어드밴스드 마이크로 디바이시즈, 인코포레이티드
Publication of KR20210071073A publication Critical patent/KR20210071073A/ko
Application granted granted Critical
Publication of KR102586989B1 publication Critical patent/KR102586989B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3243Power saving in microcontroller unit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
KR1020217015589A 2018-10-31 2019-06-18 부분 행렬 순서화를 이용하는 행렬 곱셈기 Active KR102586989B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/176,449 2018-10-31
US16/176,449 US11093580B2 (en) 2018-10-31 2018-10-31 Matrix multiplier with submatrix sequencing
PCT/US2019/037656 WO2020091848A1 (en) 2018-10-31 2019-06-18 Matrix multiplier with submatrix sequencing

Publications (2)

Publication Number Publication Date
KR20210071073A KR20210071073A (ko) 2021-06-15
KR102586989B1 true KR102586989B1 (ko) 2023-10-10

Family

ID=70327188

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020217015589A Active KR102586989B1 (ko) 2018-10-31 2019-06-18 부분 행렬 순서화를 이용하는 행렬 곱셈기

Country Status (6)

Country Link
US (1) US11093580B2 (https=)
EP (1) EP3891626A4 (https=)
JP (2) JP7461945B2 (https=)
KR (1) KR102586989B1 (https=)
CN (1) CN113168430A (https=)
WO (1) WO2020091848A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109871236B (zh) * 2017-12-01 2025-05-06 超威半导体公司 具有低功率并行矩阵乘法流水线的流处理器
US20210303987A1 (en) * 2020-03-26 2021-09-30 Advanced Micro Devices, Inc. Power reduction for machine learning accelerator background
US11720328B2 (en) 2020-06-26 2023-08-08 Advanced Micro Devices, Inc. Processing unit with small footprint arithmetic logic unit
CN112429475B (zh) * 2020-09-29 2023-06-30 贵州大学 一种胶囊排序送料装置
CN112433760B (zh) * 2020-11-27 2022-09-23 海光信息技术股份有限公司 数据排序方法和数据排序电路
CN112632464B (zh) * 2020-12-28 2022-11-29 上海壁仞智能科技有限公司 用于处理数据的处理装置
US11556337B2 (en) 2021-04-12 2023-01-17 Analog Devices International Unlimited Company Parallel matrix multiplication technique optimized for memory fetches
CN117407640A (zh) * 2022-07-15 2024-01-16 华为技术有限公司 一种矩阵计算方法及装置
KR102640249B1 (ko) * 2023-06-12 2024-02-27 주식회사 하이퍼엑셀 대규모 언어 모델을 위해 멀티-디바이스에 기반한 추론을 수행하는 방법 및 시스템
CN119883379B (zh) * 2024-12-24 2025-11-18 深圳市鸿合创新信息技术有限责任公司 数据排序方法、装置、电子设备和存储介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050193050A1 (en) * 2001-03-21 2005-09-01 Apple Computer Inc. Matrix multiplication in a vector processing system
US20180246855A1 (en) * 2017-02-28 2018-08-30 Texas Instruments Incorporated Reconfigurable matrix multiplier system and method

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH594477A5 (https=) * 1976-08-20 1978-01-13 Agie Ag Ind Elektronik
JPH05324700A (ja) * 1992-05-19 1993-12-07 N T T Data Tsushin Kk 行列乗算装置
JP3935678B2 (ja) * 2001-01-31 2007-06-27 富士通株式会社 Simd積和演算方法、積和演算回路、および、半導体集積回路装置
US20040122887A1 (en) * 2002-12-20 2004-06-24 Macy William W. Efficient multiplication of small matrices using SIMD registers
US20050240646A1 (en) * 2004-04-23 2005-10-27 The Research Foundation Of State University Of New York Reconfigurable matrix multiplier architecture and extended borrow parallel counter and small-multiplier circuits
US8051124B2 (en) * 2007-07-19 2011-11-01 Itt Manufacturing Enterprises, Inc. High speed and efficient matrix multiplication hardware module
US9354944B2 (en) * 2009-07-27 2016-05-31 Advanced Micro Devices, Inc. Mapping processing logic having data-parallel threads across processors
US8577951B1 (en) * 2010-08-19 2013-11-05 Altera Corporation Matrix operations in an integrated circuit device
US8862653B2 (en) * 2011-04-26 2014-10-14 University Of South Carolina System and method for sparse matrix vector multiplication processing
US9886418B2 (en) * 2015-04-28 2018-02-06 Intel Corporation Matrix operands for linear algebra operations
CN108491359B (zh) 2016-04-22 2019-12-24 北京中科寒武纪科技有限公司 子矩阵运算装置及方法
US10032247B2 (en) 2016-06-22 2018-07-24 Palo Alto Research Center Incorporated System and method for speeding up general matrix-vector multiplication on GPU
US10067910B2 (en) 2016-07-01 2018-09-04 Palo Alto Research Center Incorporated System and method for GPU maximum register count optimization applied to general matrix-matrix multiplication
US10929944B2 (en) * 2016-11-23 2021-02-23 Advanced Micro Devices, Inc. Low power and low latency GPU coprocessor for persistent computing
JP6912703B2 (ja) * 2017-02-24 2021-08-04 富士通株式会社 演算方法、演算装置、演算プログラム及び演算システム
US10521225B2 (en) * 2017-06-29 2019-12-31 Oracle International Corporation Matrix multiplication at memory bandwidth
CN107622037A (zh) 2017-09-27 2018-01-23 郑州云海信息技术有限公司 一种提高图形处理单元的矩阵乘计算性能的方法和装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050193050A1 (en) * 2001-03-21 2005-09-01 Apple Computer Inc. Matrix multiplication in a vector processing system
US20180246855A1 (en) * 2017-02-28 2018-08-30 Texas Instruments Incorporated Reconfigurable matrix multiplier system and method

Also Published As

Publication number Publication date
JP2023089161A (ja) 2023-06-27
EP3891626A4 (en) 2022-08-10
US20200133991A1 (en) 2020-04-30
WO2020091848A1 (en) 2020-05-07
JP7461945B2 (ja) 2024-04-04
JP2022506418A (ja) 2022-01-17
KR20210071073A (ko) 2021-06-15
EP3891626A1 (en) 2021-10-13
US11093580B2 (en) 2021-08-17
CN113168430A (zh) 2021-07-23

Similar Documents

Publication Publication Date Title
KR102586989B1 (ko) 부분 행렬 순서화를 이용하는 행렬 곱셈기
JP7728831B2 (ja) 加速数学エンジン
US11573765B2 (en) Fused convolution and batch normalization for neural networks
JP6744913B2 (ja) 浮動小数点数の丸め処理
CN103440121A (zh) 一种面向向量处理器的三角矩阵乘法向量化方法
CN112446007B (zh) 一种矩阵运算方法、运算装置以及处理器
KR20210089247A (ko) 그래픽 처리 장치에서 행렬 곱셈의 파이프라인 처리
CN114741650A (zh) 张量计算装置、数据处理器、张量计算方法、存储介质
US20230289191A1 (en) Vertical and horizontal broadcast of shared operands
JP6712052B2 (ja) 演算処理装置及び演算処理装置の制御方法
US20210319080A1 (en) Tensor data calculating apparatus, tensor data calculating method and program
US20240329998A1 (en) Wave level matrix multiply instructions
US20250298861A1 (en) Acceleration unit configured for multi- dimensional block-scaled matrices
Venieris et al. Towards heterogeneous solvers for large-scale linear systems
JP7241397B2 (ja) 演算装置、演算方法、および演算プログラム
CN112632464A (zh) 用于处理数据的处理装置

Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20210524

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
A201 Request for examination
A302 Request for accelerated examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20220613

Comment text: Request for Examination of Application

PA0302 Request for accelerated examination

Patent event date: 20220613

Patent event code: PA03022R01D

Comment text: Request for Accelerated Examination

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20221006

Patent event code: PE09021S01D

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20230223

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20230705

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20231004

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20231005

End annual number: 3

Start annual number: 1

PG1601 Publication of registration