KR102537439B1 - Organic light emitting display apparatus and method for manufacturing the same - Google Patents

Abstract

One embodiment of the present invention is a substrate; a thin film transistor disposed on the substrate; a via insulating layer covering the thin film transistor and including a via hole; a pixel electrode disposed on the via insulating layer and electrically connected to the thin film transistor through the via hole; a first passivation layer surrounding an edge of the pixel electrode; a pixel-defining layer covering an edge of the pixel electrode and the first passivation layer and including an opening exposing a top surface of the pixel electrode; a counter electrode facing the pixel electrode; and an organic light emitting layer interposed between the pixel electrode and the counter electrode.

Description

Organic light emitting display device and method for manufacturing the same {Organic light emitting display apparatus and method for manufacturing the same}

The present invention relates to an organic light emitting display device and a manufacturing method thereof, and more particularly, to an organic light emitting display device and a method of manufacturing the same, in which manufacturing cost is reduced by reducing the number of masks.

An organic light emitting display device includes an organic light emitting device including a hole injection electrode, an electron injection electrode, and an organic light emitting layer formed therebetween, wherein holes injected from the hole injection electrode and electrons injected from the electron injection electrode pass through the organic light emitting layer. A self-luminous display device in which light is generated while excitons generated by the coupling fall from an excited state to a ground state.

Organic light emitting display, which is a self-emissive display device, does not require a separate light source, so it can be driven with low voltage, can be configured in a lightweight and thin shape, and has excellent characteristics such as viewing angle, contrast, and response speed, so it is an MP3 player. The range of application is expanding from personal portable devices such as mobile phones to televisions (TVs).

Recently, there is an increasing demand for an organic light emitting display device having high resolution while minimizing manufacturing cost and a method for manufacturing the organic light emitting display device.

Embodiments of the present invention provide an organic light emitting display capable of realizing high resolution at low cost and a manufacturing method thereof.

One embodiment of the present invention is a substrate; a thin film transistor disposed on the substrate; a via insulating layer covering the thin film transistor and including a via hole; a pixel electrode disposed on the via insulating layer and electrically connected to the thin film transistor through the via hole; a first passivation layer surrounding an edge of the pixel electrode; a pixel-defining layer covering an edge of the pixel electrode and the first passivation layer and including an opening exposing a top surface of the pixel electrode; a counter electrode facing the pixel electrode; and an organic light emitting layer interposed between the pixel electrode and the counter electrode.

In this embodiment, the first passivation layer may contact an edge of the pixel electrode.

In this embodiment, the center of the pixel electrode and the center of the opening may coincide.

In this embodiment, the thickness of the first passivation layer may be substantially the same as the thickness of the pixel electrode.

In this embodiment, the first passivation layer may include an inorganic or organic insulating material.

In this embodiment, a wiring made of the same material as the pixel electrode and spaced apart from the pixel electrode; a second protective film surrounding an edge of the wiring; and a wiring insulating layer covering the wiring and the second passivation layer.

In this embodiment, the wiring insulating layer includes the same material as the pixel defining layer and may be spaced apart from the pixel defining layer.

In this embodiment, the first passivation layer may be disposed in a closed loop shape including inner and outer surfaces.

Another embodiment of the present invention, forming a thin film transistor on a substrate; forming a via insulating film covering the thin film transistor and having a via hole; forming a conductive material layer connected to the thin film transistor through the via hole on the via insulating layer; forming a first photoresist pattern layer including a first region and a second region surrounding the first region on the conductive material layer; patterning the conductive material layer using the first photoresist pattern layer to form a pixel electrode; forming a first passivation layer surrounding an edge of the pixel electrode; forming a second photoresist pattern layer exposing an upper surface of the pixel electrode by removing the first region of the first photoresist pattern layer; reflowing the second photoresist pattern layer to form a pixel-defining layer covering an edge of the pixel electrode and the first passivation layer; forming an organic light emitting layer on the pixel electrode; and forming a counter electrode on the organic light emitting layer.

In this embodiment, the first area of the first photoresist pattern layer may have a smaller thickness than the second area.

In this embodiment, the first photoresist pattern layer may be formed using a halftone mask or a slit mask.

In the present embodiment, in the step of patterning the conductive material layer, a width of the pixel electrode may be smaller than a width of the first photoresist pattern layer.

In this embodiment, the first passivation layer may contact an edge of the pixel electrode.

In this embodiment, the first passivation layer may include an inorganic or organic insulating material.

In the present embodiment, forming the first protective layer may include forming a protective material layer covering the first photoresist pattern layer and the via insulating layer; and etching the protective material layer to form the first protective layer surrounding the edge of the pixel electrode. In the etching of the protective material layer, anisotropic etching may be used.

In this embodiment, the first passivation layer may be positioned between an edge of the pixel electrode and an edge of the first photoresist pattern layer.

In this embodiment, the forming of the first photoresist pattern layer on the conductive material layer may further include forming a third photoresist pattern layer spaced apart from the first photoresist pattern layer on the conductive material layer. can include

In this embodiment, forming a wiring made of the same material as the pixel electrode and spaced apart from the pixel electrode using the third photoresist pattern layer; forming a second protective layer made of the same material as the protective material layer and disposed along an edge of the wiring; and reflowing the third photoresist pattern layer to form a wiring insulating film completely covering the wiring including at least a portion of the second passivation film.

In this embodiment, the edge of the wiring may be positioned inside the edge of the third photoresist pattern layer, and the second passivation layer may be positioned between the edge of the wiring and the edge of the third photoresist pattern layer.

Other aspects, features and advantages other than those described above will become apparent from the following drawings, claims and detailed description of the invention.

The organic light emitting diode display according to the embodiments of the present invention includes the first passivation layer disposed along the edge of the pixel electrode, so that even if there is a process deviation, the edge of the pixel electrode can be completely shielded, thereby preventing pixel defects. . Also, in the manufacturing method of the organic light emitting diode display according to the embodiments of the present invention, the pixel electrode and the pixel defining layer may be formed using one mask. Therefore, manufacturing cost can be reduced and the process can be simplified.

1 is a plan view schematically illustrating an organic light emitting display device according to an exemplary embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along the line IIa-IIa of FIG. 1 .
FIG. 3 is a plan view schematically illustrating an arrangement of a pixel electrode, a first passivation layer, and a pixel defining layer of FIG. 2 .
4A to 5 are cross-sectional views sequentially illustrating a method of manufacturing the organic light emitting diode display of FIG. 2 .

Since the present invention can apply various transformations and have various embodiments, specific embodiments will be illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention, and methods for achieving them will become clear with reference to the embodiments described later in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and when describing with reference to the drawings, the same or corresponding components are assigned the same reference numerals, and overlapping descriptions thereof will be omitted. .

In the following embodiments, terms such as first and second are used for the purpose of distinguishing one component from another component without limiting meaning.

In the following examples, expressions in the singular number include plural expressions unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have mean that features or components described in the specification exist, and do not preclude the possibility that one or more other features or components may be added.

In the following embodiments, when a part such as a film, region, component, etc. is said to be on or on another part, not only when it is directly above the other part, but also when another film, region, component, etc. is interposed therebetween. Including if there is

In the drawings, the size of components may be exaggerated or reduced for convenience of description. For example, since the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of description, the present invention is not necessarily limited to the illustrated bar.

When an embodiment is otherwise implementable, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or may be performed in an order reverse to the order described.

In the following embodiments, when it is assumed that films, regions, components, etc. are connected, not only are the films, regions, and components directly connected, but also other films, regions, and components are interposed between the films, regions, and components. This includes cases where it is connected indirectly. For example, when a film, region, component, etc. is electrically connected in this specification, not only is the film, region, component, etc. directly electrically connected, but another film, region, component, etc. is interposed therebetween. Including cases of indirect electrical connection.

1 is a plan view schematically illustrating an organic light emitting display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1 , the organic light emitting display device includes a display area DA displaying an image and a non-display area NDA adjacent to the display area DA. The display area DA includes a plurality of pixel areas PA, and a pixel emitting a predetermined light is formed in each pixel area PA. An image is provided through light emitted from a plurality of pixels provided in the display area DA.

The non-display area NDA may be disposed to surround the display area DA, and a scan driver (not shown) and a data driver (not shown) transmit predetermined signals to a plurality of pixels provided in the display area DA. Si) may include a driving unit such as

Although FIG. 1 illustrates the case where the non-display area NDA surrounds the display area, the present invention is not limited thereto. As another embodiment, the non-display area NDA may be disposed on one side of the display area to reduce an area where no image is displayed, that is, a dead area.

FIG. 2 is a cross-sectional view taken along the line IIa-IIa of FIG. 1, and FIG. 3 is a plan view schematically illustrating the arrangement of the pixel electrode, the first passivation layer, and the pixel defining layer of FIG. 2.

Referring to FIG. 2 , an organic light emitting display device 10 according to an exemplary embodiment of the present invention includes a substrate 100, a thin film transistor (TFT) disposed on the substrate 100, and a structure covering the thin film transistor (TFT). A via insulating film 109, a pixel electrode 171 disposed on the via insulating film 109 and electrically connected to the thin film transistor (TFT), a first protective film 160 disposed along the edge of the pixel electrode 171, 1 The pixel-defining layer 140 and the pixel electrode 171 covering at least one region of the passivation layer 160 and an edge region of the pixel electrode 171 and including an opening 171h exposing the central portion of the pixel electrode 171 ) and an organic light emitting layer 172 interposed between the opposite electrode 173 and the pixel electrode 171 and the opposite electrode 173.

The substrate 100 may be formed of a plastic substrate including polyethylen terephthalate (PET), polyethylen naphthalate (PEN), polyimide, or the like, as well as a glass substrate. According to one embodiment, the substrate 100 may include the substrate 100 of a flexible material. Here, the substrate 100 of a flexible material refers to a substrate that can be easily bent, bent, folded or rolled. The flexible substrate 100 may be made of ultra-thin glass, metal or plastic.

A buffer layer 101 may be further provided on the substrate 100 to block the smoothness of the substrate 100 and penetration of impurity elements from the substrate 100 . The buffer layer 101 may include a single layer or multiple layers of silicon nitride and/or silicon oxide. A thin film transistor TFT may be disposed on the display area DA of the buffer layer 101 . A barrier layer (not shown) may be further disposed between the substrate 100 and the buffer layer 101, and the buffer layer 101 may be omitted if necessary.

The thin film transistor TFT may function as a part of a driving circuit unit for driving the organic light emitting diode OLED. The driving circuit unit may further include capacitors and wires in addition to the thin film transistor (TFT).

The thin film transistor (TFT) includes an active layer 121 disposed on the buffer layer 101, a gate electrode 122 disposed on at least a portion of the active layer 121, a source electrode 123 to which a data signal is applied, and a pixel electrode. It may include a drain electrode 125 electrically connected to (171), a gate insulating film 103 is disposed between the active layer 121 and the gate electrode 122, and the gate electrode 122 and the source electrode 123 An interlayer insulating layer 105 may be disposed between the drain electrode 125 and the drain electrode 125 .

The active layer 121 includes a semiconductor material, and may include, for example, amorphous silicon or polycrystalline silicon. However, the present invention is not limited thereto, and the active layer 121 according to another embodiment may include an organic semiconductor material or an oxide semiconductor material.

The gate electrode 122 may be connected to a gate line (not shown) for applying an on/off signal to the thin film transistor TFT and may be made of a low-resistance metal material. For example, the gate electrode 122 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), Formed in a single layer or multi-layer with one or more metals selected from among iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu) It can be.

The source electrode 123 and the drain electrode 125 may be a single layer or a multilayer made of a conductive material having good conductivity, and may be connected to the source region and the drain region of the active layer 121 , respectively. The source electrode 123 and the drain electrode 125 may be formed of, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), or nickel (Ni). At least one metal selected from neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu) It can be formed as a single layer or multi-layer.

The thin film transistor (TFT) according to one embodiment is a top gate type in which the gate electrode 122 is disposed on the active layer 121, but the present invention is not limited thereto, and the thin film transistor according to another embodiment (TFT) may be a bottom gate type in which the gate electrode 122 is disposed below the active layer 121 .

The gate insulating film 103 and the interlayer insulating film 105 may be a single film or a multi-layer made of an inorganic material, for example, silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), and/or zinc oxide (ZrO ₂ ).

The buffer layer 101, the gate insulating layer 103, and the interlayer insulating layer 105 may extend not only to the display area DA but also to a part of the non-display area NDA. According to an embodiment, the buffer layer 101 , the gate insulating layer 103 , and the interlayer insulating layer 105 may be disposed on the remaining regions of the substrate 100 except for the outermost edge region.

The via insulating film 109 covers the thin film transistor (TFT), can eliminate the step difference caused by the thin film transistor (TFT), etc., and can flatten the upper surface. The via insulating layer 109 may be a single layer or multiple layers made of an organic material. However, the present invention is not limited thereto, and the via insulating film 109 according to another embodiment may be a composite laminate of an inorganic insulating film and an organic insulating film.

A pixel electrode 171 electrically connected to the thin film transistor TFT may be disposed on the via insulating layer 109 through the via hole VIA included in the via insulating layer 109 . The pixel electrode 171 according to one embodiment is electrically connected to the drain electrode 125, but the present invention is not limited thereto, and the pixel electrode 171 according to another embodiment is electrically connected to the source electrode 123. may be

The pixel electrode 171 may be formed of a material having a high work function, and in the case of a bottom emission type displaying an image in a downward direction of the substrate 100, indium tin oxide (ITO) or indium zinc oxide (ITO). Indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ ; indium oxide), indium gallium oxide (IGO), and aluminum zinc oxide (AZO) It may include at least one or more transparent conductive oxides selected from the group including.

In another embodiment, in the case of a top emission type displaying an image in the direction of the opposite electrode 173, the pixel electrode 171 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (in addition to the transparent conductive oxide) A metal reflective film such as Pt, lead (Pd), gold (Au), nickel (Ni), niobium (Nd), iridium (Ir), or chromium (Cr) may be further included.

The pixel-defining layer 140 may cover at least one region of the first passivation layer 160 and an edge region of the pixel electrode 171 and may include an opening 171h exposing a central portion of the pixel electrode 171 . The pixel-defining layer 140 covers an edge region of the pixel electrode 171 to insulate between the pixel electrode 171 and the counter electrode 173 . The pixel-defining layer 140 may be formed to cover the circumference of the pixel electrode 171 and may have a donut shape or a square frame shape when viewed from a plan view. The pixel defining layer 140 may be a photosensitive organic layer, and may include, for example, polyimide (PI). Since the organic light emitting diode display 10 according to an exemplary embodiment of the present invention forms the pixel electrode 171 and the pixel defining layer 140 using one photomask, the center of the pixel defining layer 140 is the pixel electrode. The center of the opening 171h of 171 may coincide.

The pixel-defining layer 140 may include a first surface 140a facing the opening 171h and a second surface 140b positioned opposite the first surface 140a and covering the edge of the pixel electrode 171. . The first surface 140a and the second surface 140b of the pixel defining layer 140 may be inclined surfaces.

The first surface 140a may extend in a direction away from the substrate 100 in an area where the top surface of the pixel electrode 171 and the opening 171h contact each other, and the second surface 140b may extend away from the first surface 140a. It may extend in a direction toward the substrate 100 . At this time, the direction away from the substrate 100 and the direction toward the substrate 100 do not mean a direction perpendicular to the main surface of the substrate 100, but inclined at a predetermined angle with respect to the main surface of the substrate 100. means

The first passivation layer 160 may be disposed to surround the edge of the pixel electrode 171 to shield the edge of the pixel electrode 171 together with the pixel defining layer 140 . The first protective film 160 according to an embodiment may be a single film or a multi-film including an inorganic insulating material, for example, silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiON ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), and/or zinc oxide (ZrO ₂ ). As another example, the first passivation layer 160 may be a single layer or multiple layers including an organic insulating material. For example, the first passivation layer 160 may include polyimide or siloxane.

A thickness d2 of the first passivation layer 160 may be substantially the same as a thickness d1 of the pixel electrode 171 . Since the first passivation layer 160 is made of the same thickness d2 as the thickness d1 of the pixel electrode 171, it shields the edge portion of the pixel electrode 171 from being exposed to the outside, and at the same time, the pixel defining layer 140 Thus, the edge area of the pixel electrode 171 can be sufficiently covered.

Referring to FIG. 3 , the first passivation layer 160 may be disposed around the pixel electrode 171 and may contact an edge of the pixel electrode 171 . The first passivation layer 160 may be disposed in a closed loop shape surrounding the edge of the pixel electrode 171 . The closed loop shape may include an inner surface and an outer surface. In this case, the inner surface of the first passivation layer 160 may contact the edge of the pixel electrode 171 .

The pixel defining layer 140 may cover at least one area of the first passivation layer 160 . As another example, the pixel-defining layer 140 may completely cover the top surface of the first passivation layer 160 . It may be positioned between the insulating films 109 .

The pixel-defining layer 140 according to the comparative example of the present invention may not completely cover the edge region of the pixel electrode 171 depending on manufacturing process variations. For example, in the comparative embodiment, a portion of the edge region of the upper surface of the pixel electrode 171 is covered, but the edge portion of the pixel electrode 171 may not be covered. At this time, in the organic light emitting diode display according to the comparative example, the pixel electrode 171 is not completely shielded, so pixel defects occur through the exposed portion.

However, in the organic light emitting display device 10 according to an exemplary embodiment of the present invention, the first passivation layer 160 is disposed along the edge of the pixel electrode 171 so that the pixel defining layer 140 is formed on the pixel electrode 171. Even if the edge of the pixel electrode 171 is not covered, the edge portion of the pixel electrode 171 can be shielded through the first passivation layer 160 .

Meanwhile, an organic emission layer 172 may be disposed on a region of the pixel electrode 171 that is not covered by the pixel defining layer 140 .

The organic light emitting layer 172 may be composed of a low molecular weight organic material or a high molecular weight organic material, and between the pixel electrode 171 and the counter electrode 173, in addition to the organic light emitting layer 172, a hole injection layer and a hole transport layer may be formed. layer), at least one of an electron transport layer and an electron injection layer may be further disposed. According to an embodiment, various other functional layers may be further disposed between the pixel electrode 171 and the counter electrode 173 in addition to the above-described layers.

The organic light emitting layer 172 may be respectively disposed on one organic light emitting diode OLED. In this case, the organic light emitting diode OLED may be red depending on the type of the organic light emitting layer 172 included in the organic light emitting diode OLED. , can emit green and blue light, respectively. However, the present invention is not limited thereto, and a plurality of organic light emitting layers 172 may be disposed on one organic light emitting diode OLED. For example, a plurality of organic emission layers 172 emitting red, green, and blue light may be vertically stacked or mixed to emit white light. In this case, a color conversion layer or color filter for converting the emitted white light into a predetermined color may be further provided. The red, green, and blue colors are exemplary, and a combination of colors for emitting white light is not limited thereto.

A counter electrode 173 is disposed on the organic emission layer 172, and the counter electrode 173 may be made of various conductive materials. For example, the counter electrode 173 may include at least one selected from the group consisting of lithium (Li), calcium (Ca), lithium fluoride (LiF), aluminum (Al), magnesium (Mg), and silver (Ag). It may include, and may be formed of a single layer or multiple layers. In the case of a bottom emission type, the opposite electrode 173 may be a reflective electrode, and in the case of a top emission type, the opposite electrode 173 may be a transparent or translucent electrode.

According to an exemplary embodiment, a thin film encapsulation layer 150 including at least one organic layer 151 and at least one inorganic layer 152 to encapsulate the organic light emitting diode (OLED) is disposed on the opposite electrode 173. can The thin film encapsulation layer 150 serves to seal the organic light emitting diode (OLED) so that the organic light emitting diode (OLED) is not exposed to external air or foreign substances, and has a very thin thickness, so that bending or folding ( It can be used as an encapsulation means of a flexible display device capable of folding.

According to an embodiment, the inorganic layer 152 may include an oxide, nitride, or nitride such as silicon nitride (SiN _x ), silicon oxide (SiO ₂ ), or silicon oxynitride (SiO _x N _y ). The inorganic layer 152 serves to block or reduce penetration of foreign substances such as moisture or oxygen into the organic light emitting diode OLED, and may extend from the display area DA to the non-display area NDA.

In the non-display area NDA, at least a portion of the inorganic layer 152 may directly contact the interlayer insulating layer 105 . In addition, the inorganic layer 152 may extend to the outermost edge region of the substrate 100 beyond the ends of the gate insulating layer 103 and the interlayer insulating layer 105, and the inorganic layer 152 may extend to the upper surface of the substrate 100. It may include a region in direct contact with.

That is, the edge region of the inorganic film 152 is in contact with the top surface of the substrate 100, and through this, separation of the inorganic film 152 from the interlayer insulating film 105 is reduced or prevented, thereby encapsulating the thin film encapsulation layer 150. characteristics can be improved.

The organic layer 151 of the thin film encapsulation layer 150 may be disposed between the counter electrode 173 and the inorganic layer 152, and may block penetration of foreign substances such as moisture or oxygen into the organic light emitting diode OLED. can reduce The organic layer 151 may be used together with the inorganic layer 152 to improve encapsulation characteristics and flatten an uneven surface. According to an embodiment, the organic layer 151 may include various organic materials such as an epoxy-based resin, an acryl-based resin, or a polyimide-based resin.

According to an embodiment, a functional layer (not shown) and a protective layer (not shown) may be further disposed between the counter electrode 173 and the thin film encapsulation layer 150 . The functional layer (not shown) may include a capping layer (not shown) that improves light efficiency by controlling the refractive index of visible light emitted from the organic light emitting diode (OLED) and/or a LiF layer (not shown), and protects The layer (not shown) may include an inorganic material such as aluminum oxide.

As another example, the organic light emitting diode display 10 may further include a wire 180 , a second passivation layer 165 , and a wire insulating layer 145 .

A wiring 180 made of the same material and on the same layer as the pixel electrode 171 may be disposed on the via insulating layer 109 . The wiring 180 may be spaced apart from the pixel electrode 171, and the type of the wiring 180 is not particularly limited. For example, the wire 180 may be a data wire or an initialization voltage wire, and may function as an auxiliary wire by being electrically connected to a wire in another layer.

A second passivation layer 165 formed of the same material as the first passivation layer 160 may be disposed on the via insulating layer 109 along the edge of the wiring 180 . The second passivation layer 165 shields the edge of the wire 180 so that the edge of the wire 180 is not exposed. The second passivation layer 165 may be disposed on both edges of the wiring 180 .

The wiring insulating layer 145 may completely cover the wiring 180 including at least one region of the second passivation layer 165 . The wiring insulating layer 145 is formed of the same material on the same layer as the pixel defining layer 140 and may be spaced apart from the pixel defining layer 140 . As another example, the wiring insulating layer 145 may completely cover the upper surface of the second passivation layer 165 . The wiring insulating film 145 completely covers the wiring 180 including the second protective film 165 , thereby minimizing pixel defects that may occur due to exposure of an edge portion of the wiring 180 .

Hereinafter, a method of manufacturing an organic light emitting diode display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4A to 5 .

4A to 5 are cross-sectional views sequentially illustrating a method of manufacturing the organic light emitting diode display of FIG. 2 .

Referring to FIG. 4A , a thin film is formed on a substrate 100 including a display area DA (FIG. 1) where an image is displayed and a non-display area NDA (FIG. 1) disposed around the display area DA (FIG. 1). A transistor (TFT) may be formed.

Specifically, after forming the buffer layer 101 on the substrate 100 , the active layer 121 may be formed by patterning a semiconductor material on the buffer layer 101 . After forming the active layer 121 , the gate insulating layer 103 may be formed on the active layer 121 , and then the gate electrode 122 may be formed by patterning a conductive material on the gate insulating layer 103 . The gate electrode 122 may overlap at least a portion of the active layer 121 on a plane.

After forming the gate electrode 122, an interlayer insulating film 105 may be formed to cover the gate electrode 122, and the interlayer insulating film 105 and the gate insulating film 103 are simultaneously etched to expose the active layer 121. At least two contact holes C1 and C2 may be formed.

According to an embodiment, the active layer 121 may include polycrystalline silicon, and regions exposed through the contact holes C1 and C2 may be a source region and a drain region of the active layer 121 . The source region and the drain region may be doped polycrystalline silicon regions, that is, conductor regions. According to one embodiment, doping may be performed after forming the gate electrode.

The buffer layer 101, the gate insulating layer 103, and the interlayer insulating layer 105 may extend from the display area DA to the non-display area NDA, and may extend from the display area DA to the non-display area NDA, of the substrate 100 disposed in the non-display area NDA. The buffer layer 101, the gate insulating layer 103, and the interlayer insulating layer 105 may be removed to expose the edge region. A process of removing the buffer layer 101, the gate insulating film 103, and the interlayer insulating film 105 for exposing the substrate of the non-display area NDA may be performed simultaneously with the process of forming the contact holes C1 and C2. .

After forming the contact holes C1 and C2, a conductive material is formed on the interlayer insulating film 105 and then patterned to form a source electrode 123 and a drain electrode connected to the source and drain regions of the active layer 121, respectively. (125) can be formed.

Referring to FIG. 4B , after forming a first insulating material covering the thin film transistor TFT on the substrate 100 , a via insulating film 109 disposed in the display area DA may be formed by patterning the first insulating material. The via insulation layer 109 may be a single layer or a multi-layer structure made of an organic material, and the via insulation layer 109 may include a via hole (VIA).

Referring to FIG. 4C , a conductive material 171' and a second insulating material 140''' may be formed on the via insulating layer 109. The conductive material layer 171' may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In ₂ O ₃ ). , indium gallium oxide (IGO), and aluminum zinc oxide (AZO), and may be at least one transparent conductive oxide selected from the group consisting of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pd), gold (Au), nickel (Ni), niobium (Nd), iridium (Ir), chromium (Cr), etc. can do. The second insulating material 140''' may be a photosensitive organic material such as polyimide.

Light may be irradiated to the second insulating material 140''' using the photo mask M. The photomask M may be formed of either a halftone mask or a slit mask. As an example, when the photo mask M is a halftone mask, the halftone mask M may include a light-transmissive part M3, a light-blocking part M2, and a semi-light-transmitting part M1. The light-transmitting portion M3 is the area where the conductive material layer 171' is completely removed, the light-blocking portion M2 is the area where the second insulating material 140''' is finally left, and the semi-light-transmitting portion M1 is the second insulating material. After a portion of the material 140''' remains, each may correspond to a region to be removed by ashing. As another embodiment, when the photomask M is a slit mask, the slit mask includes a slit portion M1 including at least one slit bar for blocking light, a light transmitting portion M3 for transmitting light, and a light blocking portion. A miner M2 may be included.

Referring to FIG. 4D , the second insulating material 140'' to which light is irradiated through the light-transmissive portion M3 is completely removed, and the second insulating material 140'' to which light is irradiated through the semi-transmissive portion M1 140'' is completely removed. '), the first photoresist pattern layer 140'' including the first area A1 and the second area A2 surrounding the first area A may be formed. The thickness d3 of the first area A1 may be smaller than the thickness d4 of the second area A2, and the second area A2 may substantially correspond to the edge area of the pixel electrode 171. there is. Through the same process, a third photoresist pattern layer 145' spaced apart from the first photoresist pattern layer 140'' may be formed together.

Thereafter, the conductive material layer 171' is etched using the first photoresist pattern layer 140'' and the third photoresist pattern layer 145' as masks, thereby forming the pixel electrode 171 and the wiring 180. can form At this time, by over-etching the exposed area of the conductive material layer 171', the width W2 of the pixel electrode 171 is smaller than the width W1 of the first photoresist pattern layer 140''. do. An edge of the pixel electrode 171 may be positioned inside the edge of the first photoresist pattern layer 140''. Similarly, the width W4 of the wiring 180 is smaller than the width W3 of the third photoresist pattern layer 145', and the edge of the wiring 180 is inward than the edge of the third photoresist pattern layer 145'. can be located in

Referring to FIG. 4E , a protective material layer 160 ′ may be formed to cover the first photoresist pattern layer 140 ″ and the via insulating layer 109 . As an example, the protective material layer 160 ′ may include an inorganic insulating material, such as silicon nitride (SiN _x ) or silicon oxynitride (SiON). As another embodiment, the protective material layer 160' may include an organic insulating material, such as polyimide or siloxane. The protective material layer 160' is formed by a capillary phenomenon to form not only the upper surface of the first photoresist pattern layer 140'', the third photoresist pattern layer 145' and the via insulating layer 109, but also the pixel electrode ( 171) and the wire 180 may be formed even to an excessively etched portion.

Referring to FIG. 4F , the pixel electrode 171 and the wiring 180 are disposed in an excessively etched portion and disposed below the first photoresist pattern layer 140'' and the third photoresist pattern layer 145'. Excluding the protective material layer 160', the exposed protective material layer 160' may be etched to form the first protective layer 160 and the second protective layer 165. At this time, the exposed protective material layer 160' may be removed by dry etching, and the dry etching may be anisotropic etching. Since anisotropic etching has an etching direction, the first passivation layer 160 and the second passivation layer 165 disposed under the first photoresist pattern layer 140″ and the third photoresist pattern layer 145′ will not be etched. can

The first passivation layer 160 is disposed along the edge of the pixel electrode 171 and may be positioned between the edge of the pixel electrode 171 and the edge of the first photoresist pattern layer 140''. The second passivation layer 165 is disposed along the edge of the wiring 180 and may be positioned between the edge of the wiring 180 and the edge of the third photoresist pattern layer 145'.

Referring to FIG. 4G , a portion of the patterned first photoresist pattern layer 140 ″ may be removed through ashing. That is, the height of the patterned first photoresist pattern layer 140'' may be reduced through ashing, and at this time, the height of the third photoresist pattern layer 145' may also be reduced. The first area A1 of the first photoresist pattern layer 140 ″, in which light is irradiated through the semi-transmissive portion M1 of FIG. 3C and a portion of which remains, may be completely removed through ashing. Through this, it is possible to form the second photoresist pattern layer 140' exposing the central region, which is a part of the pixel electrode 171. The second photoresist pattern layer 140 ′ may cover at least one region of the first passivation layer 160 and an upper surface of an edge region of the pixel electrode 171 .

Referring to FIG. 4H , the second photoresist pattern layer 140 ′ after ashing is reflowed by applying heat to form a pixel defining layer 140 covering an edge region of the pixel electrode 171 . The second photoresist pattern layer 140' may flow down by thermal reflow and completely cover the upper surface of the first passivation layer 160, and the edge of the pixel electrode 171 together with the first passivation layer 160. areas can be covered. When the edge of the pixel electrode 171 is exposed, it may be short-circuited with the opposite electrode 173 (FIG. 4) formed by a subsequent process. To prevent this, a reflow process is performed so that the pixel-defining layer 140 It can cover the edge area of (171). In particular, in the manufacturing method of the organic light emitting device according to an embodiment of the present invention, the first passivation layer 160 is disposed along the edge of the pixel electrode 171, so that the pixel defining layer 140 is formed at the pixel electrode ( 171), it is possible to prevent the edge of the pixel electrode 171 from being exposed by the first passivation layer 160. Accordingly, pixel defects in subsequent processes can be minimized.

In the same process, by applying heat to the third photoresist pattern layer 145' and reflowing, the wiring insulating film 145 covering the edge of the wiring 180 may be formed. The wiring insulating film 145 also protects the edge of the wiring, so that the edge of the wiring is not exposed even when it is not completely covered with the wiring insulating film 145 .

Referring to FIG. 5 , an organic light emitting layer 172 is formed on a region of the pixel electrode 171 that is not covered by the pixel defining layer 140, and then a counter electrode 173 is formed on the organic light emitting layer 172. By doing so, an organic light emitting diode (OLED) may be formed. The counter electrode 173 may be formed only in the display area DA and may not be formed in the non-display area NDA. Although not shown, a thin film encapsulation layer 150 ( FIG. 2 ) including at least one inorganic layer 152 ( FIG. 2 ) and at least one organic layer 151 ( FIG. 2 ) may be formed on the counter electrode 173 thereafter. there is.

As described above, in the manufacturing method of the organic light emitting display device 10 according to an exemplary embodiment, the pixel electrode 171 and the pixel defining layer 140 may be formed using one mask. Therefore, manufacturing cost can be reduced and the process can be simplified. In addition, the manufacturing method of the organic light emitting display device 10 according to an exemplary embodiment includes the first passivation layer 160 disposed along the edge of the pixel electrode 171, so that the pixel electrode 171 can be formed even if there is a process variation. Since the edge can be completely shielded, pixel defects can be prevented.

As such, the present invention has been described with reference to one embodiment shown in the drawings, but this is merely exemplary, and those skilled in the art will understand that various modifications and variations of the embodiment are possible therefrom. Therefore, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims.

10: organic light emitting display device.
100: Substrate
101: buffer layer
103: gate insulating film
105: interlayer insulating film
109 Via insulating film
121: active layer
122: gate electrode
123 , 125: source electrode, drain electrode
140: pixel defining film
145: wiring insulation film
150: thin film encapsulation layer
160: first protective film
165: second protective film
171: pixel electrode
172: organic light emitting layer
173: counter electrode
180: wiring

Claims (20)

Board;
a thin film transistor disposed on the substrate;
a via insulating layer covering the thin film transistor and including a via hole;
a pixel electrode disposed on the via insulating layer and electrically connected to the thin film transistor through the via hole;
a first passivation layer that does not cover the pixel electrode and surrounds an edge of the pixel electrode;
a pixel-defining layer covering an edge of the pixel electrode and the first passivation layer and including an opening exposing a top surface of the pixel electrode;
a counter electrode facing the pixel electrode; and
An organic light emitting display device comprising: an organic light emitting layer interposed between the pixel electrode and the counter electrode. According to claim 1,
The first passivation layer contacts an edge of the pixel electrode. According to claim 1,
An organic light emitting display device, wherein a center of the pixel electrode coincides with a center of the opening. According to claim 1,
A thickness of the first passivation layer is the same as a thickness of the pixel electrode. According to claim 1,
The first passivation layer includes an inorganic or organic insulating material. According to claim 1,
a wire made of the same material as the pixel electrode and spaced apart from the pixel electrode;
a second protective film surrounding an edge of the wiring; and
The organic light emitting display device further includes a wiring insulating layer covering the wiring and the second passivation layer. According to claim 6,
The wiring insulating layer includes the same material as the pixel-defining layer and is spaced apart from the pixel-defining layer. According to claim 1,
The first passivation layer is disposed in a closed loop form including inner and outer surfaces. According to claim 8,
The organic light emitting display device of claim 1 , wherein the inner surface of the first passivation layer contacts an edge of the pixel electrode. Forming a thin film transistor on a substrate;
forming a via insulating film covering the thin film transistor and having a via hole;
forming a conductive material layer connected to the thin film transistor through the via hole on the via insulating layer;
forming a first photoresist pattern layer including a first region and a second region surrounding the first region on the conductive material layer;
patterning the conductive material layer using the first photoresist pattern layer to form a pixel electrode;
forming a first passivation layer that does not cover the pixel electrode and surrounds an edge of the pixel electrode;
forming a second photoresist pattern layer exposing an upper surface of the pixel electrode by removing the first region of the first photoresist pattern layer;
reflowing the second photoresist pattern layer to form a pixel-defining layer covering an edge of the pixel electrode and the first passivation layer;
forming an organic light emitting layer on the pixel electrode; and
A method of manufacturing an organic light emitting display device, comprising forming a counter electrode on the organic light emitting layer. According to claim 10,
The method of claim 1 , wherein the first region of the first photoresist pattern layer has a thickness smaller than that of the second region. According to claim 11,
The first photoresist pattern layer is formed using a halftone mask or a slit mask. According to claim 10,
In the patterning of the conductive material layer, a width of the pixel electrode is smaller than a width of the first photoresist pattern layer. According to claim 10,
The method of claim 1 , wherein the first passivation layer contacts an edge of the pixel electrode. According to claim 10,
The method of claim 1 , wherein the first passivation layer includes an inorganic or organic insulating material. According to claim 10,
Forming the first protective film,
forming a protective material layer covering the first photoresist pattern layer and the via insulating layer; and
Etching the protective material layer to form the first protective layer surrounding an edge of the pixel electrode;
In the etching of the protective material layer, anisotropic etching is used. According to claim 16,
The first passivation layer is positioned between an edge of the pixel electrode and an edge of the first photoresist pattern layer. According to claim 10,
The step of forming the first photoresist pattern layer on the conductive material layer further comprises forming a third photoresist pattern layer spaced apart from the first photoresist pattern layer on the conductive material layer. Method of manufacturing the device. According to claim 16,
forming a wiring made of the same material as the pixel electrode and spaced apart from the pixel electrode by using the third photoresist pattern layer;
forming a second protective layer made of the same material as the protective material layer and disposed along an edge of the wiring; and
Reflowing the third photoresist pattern layer to form a wiring insulating film completely covering the wiring including at least a portion of the second passivation film; According to claim 19,
The edge of the wiring is located inside the edge of the third photosensitive pattern layer,
wherein the second passivation layer is positioned between an edge of the wiring and an edge of the third photoresist pattern layer.

Images