KR102395211B1 - Organic light emitting display device and manufacturing method of the same - Google Patents

Abstract

An embodiment of the present disclosure relates to an organic light emitting display device capable of improving image quality, comprising: a gate line formed in a display area on a substrate in one direction; a light blocking pattern formed to correspond to at least a portion of an outer portion of each pixel area on the substrate and spaced apart from the gate line; at least one insulating layer formed on the entire surface of the substrate and covering the gate line and the light blocking pattern; a data line formed in the display area on the insulating layer in another direction crossing the gate line to define the plurality of pixel areas; a passivation layer formed over the at least one insulating layer and covering the data line; a color filter formed in each pixel area on the passivation film; an overcoat film formed flat on the entire surface of the passivation film and covering the color filter; and an organic light emitting device formed on the overcoat layer and corresponding to each of the pixel areas.

Description

Organic light emitting display device and manufacturing method thereof

The present application relates to an organic light emitting diode display capable of improving image quality and a method for manufacturing the same.

As we enter the information age in earnest, the field of display for visually displaying electrical information signals is rapidly developing. Accordingly, research to develop performance such as thinness, light weight, and low power consumption for various various flat display devices is continuing.

Representative examples of such flat panel display devices include a liquid crystal display device (LCD), a plasma display panel device (PDP), a field emission display device (FED), and an electroluminescence display device. (Electro Luminescence Display device: ELD), Electro-Wetting Display device (EWD), organic light emitting display device (Organic Light Emitting Display device: OLED), and the like.

In common, such flat panel display devices essentially include a flat panel display panel for realizing an image. The flat panel display panel has a structure in which a pair of substrates with a unique light emitting material or a polarizing material interposed therebetween are bonded together, and includes a display surface on which a display area and a non-display area outside the display area are defined. The display area is defined by a plurality of pixel areas.

Among them, an organic light emitting diode display (OLED) displays an image by using an organic light emitting diode, which is a self-emissive device. That is, the organic light emitting display device includes a plurality of organic light emitting devices corresponding to a plurality of pixel areas.

As described above, since the organic light emitting diode display displays an image using the organic light emitting diode corresponding to each pixel area, there is no need to include a black matrix for blocking light leakage outside of each pixel area.

However, in a typical organic light emitting display device, external light or light emitted from an adjacent pixel area is reflected by the metal pattern, and thus light leakage may occur outside each pixel area. Accordingly, there is a problem in that the color coordinates are misaligned and the contrast ratio is lowered, so that the image quality is deteriorated.

Accordingly, the general organic light emitting display device may further include a polarizing film attached to the display surface in order to block light leakage outside each pixel area due to external light. In this case, there is a problem in that the luminance is lowered by the polarizing film and the manufacturing cost is increased.

Alternatively, a general organic light emitting display device may further include a black matrix corresponding to the outer edge of each pixel area in order to block light leakage outside each pixel area. In this case, there is a problem in that a separate mask process for forming the black matrix is added, a problem in simplification of the manufacturing process because the process of patterning the black matrix is not easy, and a problem in that the reliability of the device is lowered. .

An object of the present invention is to provide an organic light emitting display device capable of preventing light leakage outside of each pixel area and thus improving image quality without a polarizing film and a black matrix, and a method for manufacturing the same.

In order to solve the above problems, the present application provides an organic light emitting display device in which a plurality of pixel regions are defined corresponding to a display region, comprising: a gate line formed in the display region on a substrate in one direction; a light blocking pattern formed to correspond to at least a portion of an outer portion of each pixel area on the substrate and spaced apart from the gate line; at least one insulating layer formed on the entire surface of the substrate and covering the gate line and the light blocking pattern; a data line formed in the display area on the insulating layer in another direction crossing the gate line to define the plurality of pixel areas; a passivation layer formed over the at least one insulating layer and covering the data line; a color filter formed in each pixel area on the passivation film; an overcoat film formed flat on the entire surface of the passivation film and covering the color filter; and an organic light emitting device formed on the overcoat layer and corresponding to each of the pixel areas.

And, according to the present application, in a method of manufacturing an organic light emitting display device in which a plurality of pixel regions are defined corresponding to a display region, a gate line in one direction on a substrate and at least a portion of an outer edge of each pixel region, forming a light blocking pattern spaced apart from the gate line; forming at least one insulating layer covering the gate line and the light blocking pattern on the entire surface of the substrate; forming a data line in another direction crossing the gate line on the insulating layer to define the plurality of pixel regions; forming a passivation layer covering the data line on the entire surface of the at least one insulating layer; forming a color filter in each pixel area on the passivation film; forming a flat overcoat film covering the color filter on the passivation film; and forming an organic light emitting device corresponding to each pixel area on the overcoat layer.

In this case, in the forming of the data line, the data line overlaps the light blocking pattern at the periphery of each pixel area.

The organic light emitting diode display according to an embodiment of the present application includes a light blocking pattern formed on the same layer as the gate line. Accordingly, external light or light from another neighboring pixel area is reflected by a metal pattern (eg, a data line), thereby preventing light leakage from occurring outside the pixel area. That is, light leakage outside each pixel area may be blocked without forming a separate light blocking pattern and a separate black matrix.

Accordingly, distortion of color coordinates and deterioration of contrast ratio can be easily prevented, and image quality can be improved without accompanying deterioration of luminance due to the polarizing film and deterioration of reliability due to the black matrix.

1 is an equivalent circuit diagram illustrating an organic light emitting display device according to a first embodiment of the present application.
2 is a plan view illustrating an organic light emitting display device according to a first exemplary embodiment of the present application.
3 is a cross-sectional view showing an example of the second thin film transistor and the organic light emitting device of FIG.
4 is a plan view illustrating a gate line and a light blocking pattern of FIG. 2 .
5 is a cross-sectional view taken along line I-I' of FIG. 2 .
6 is a plan view illustrating an organic light emitting display device according to a second exemplary embodiment of the present application.
7 is a plan view illustrating a gate line and a light blocking pattern of FIG. 6 .
FIG. 8 is a cross-sectional view taken along line II-II' of FIG. 6 .
9 is an equivalent circuit diagram illustrating an organic light emitting display device according to a third exemplary embodiment of the present application.
10 is a plan view illustrating an organic light emitting display device according to a third exemplary embodiment of the present application.
11 is a plan view illustrating a gate line and a light blocking pattern of FIG. 10 .
12 is a cross-sectional view taken along III-III' of FIG. 10 .
13 is a plan view illustrating an organic light emitting display device according to a fourth exemplary embodiment of the present application.
14 is a plan view illustrating a gate line and a light blocking pattern of FIG. 13 .
15 is a cross-sectional view taken along line IV-IV' of FIG. 13 .
16 is a flowchart illustrating a method of manufacturing an organic light emitting display device according to each embodiment of the present application.
17A to 17G and 18A to 18E are process diagrams illustrating each step of FIG. 16 .

Hereinafter, an organic light emitting display device and a method of manufacturing the same according to each embodiment of the present application will be described in detail with reference to the accompanying drawings.

First, an organic light emitting diode display according to a first embodiment of the present application will be described with reference to FIGS. 1 to 5 .

1 is an equivalent circuit diagram illustrating an organic light emitting diode display according to a first embodiment of the present application, and FIG. 2 is a plan view illustrating an organic light emitting display device according to a first embodiment of the present application. 3 is a cross-sectional view showing an example of the second thin film transistor and the organic light emitting device of FIG. 4 is a plan view showing the gate line and the light blocking pattern of FIG. 2 , and FIG. 5 is a cross-sectional view taken along line I-I' of FIG. 2 .

1 and 2 , in the organic light emitting display device 100a according to the first exemplary embodiment of the present application, a plurality of pixel areas PA are defined in a display area substantially displaying an image, and are formed to cross each other. and a gate line GL and a data line DL. In addition, the organic light emitting diode display 100a further includes first and second thin film transistors T1 and T2 and a storage capacitor Cst formed in each pixel area PA. Also, as shown in FIG. 1 , the organic light emitting diode display 100a further includes a plurality of organic light emitting devices ED formed in each of the plurality of pixel areas PA.

The first thin film transistor T1 is formed in an intersection region between the gate line GL and the data line DL in each pixel area PA, and is connected to the second thin film transistor T2 . The second thin film transistor T2 is connected between the driving power source Vdd and the organic light emitting device ED. Here, the first thin film transistor T1 is turned on based on the scan signal of the gate line GL, and the data of the data line DL in the second thin film transistor T2 is turned on to turn on the second thin film transistor T2. transmit a signal And, when the second thin film transistor T2 is turned on, it transmits a driving current based on the driving power Vdd to the organic light emitting diode ED and the storage capacitor Cst.

The gate line GL is formed in one direction (the “horizontal direction” in FIGS. 1 and 2 ) in the display area.

The data line DL is formed in the display area in another direction (the "vertical direction" in FIGS. 1 and 2 ) crossing the gate line GL. As described above, the gate line GL and the data line DL are formed to cross each other in the display area, thereby defining a plurality of pixel areas PA corresponding to the display area.

Each of the first and second thin film transistors T1 and T2 includes a gate electrode, a source electrode, and a drain electrode. At this time, in the first thin film transistor T1, the gate electrode is connected to the gate line GL, and any one of the source electrode and the drain electrode (for example, the drain electrode) is connected to the data line DL, Among the source electrode and the drain electrode, the other one (eg, a source electrode) that is not connected to the data line DL is connected to the second thin film transistor T2 . In addition, as shown in FIGS. 1 and 3 , in the second thin film transistor T2 , the gate electrode GE is connected to the first thin film transistor T1 , and among the source electrode and the drain electrode SE and DE One is connected to the driving power source Vdd, and the other one not connected to the driving power source Vdd among the source and drain electrodes SE and DE is connected to the organic light emitting diode ED.

Each organic light emitting device ED is connected between the second thin film transistor T2 and the common power source Vcom. Accordingly, each organic light emitting device ED emits light based on the driving current supplied from each second thin film transistor T2 .

For example, as shown in FIG. 3 , the gate electrode GE of each of the first and second thin film transistors T1 and T2 is formed on a part of the outer portion of each pixel area PA on the substrate 101 .

In addition, although not shown in detail in FIG. 3 , the gate line (GL in FIGS. 1 and 2 ) may be formed on the substrate 101 like the gate electrode GE. In this case, the gate electrode of the first thin film transistor T1 may be branched from the gate line GL to correspond to each pixel area PA.

The gate line GL and the gate electrode GE are covered with the gate insulating layer 102 formed on the entire surface of the substrate 101 .

The active layer ACT is formed on the gate insulating layer 102 to overlap at least a portion of the gate electrode GE.

The active layer ACT may be formed of any one of oxide semiconductor, polysilicon (crystalline silicon), and amorphous silicon (a-Si: amorphous silicon).

In addition, the active layer ACT includes a channel region CA, and a source region SA and a drain region DA on both sides of the channel region CA. Here, the source region SA and the drain region DA may be further doped with impurities to have higher mobility than the channel region CA.

The active layer ACT is covered with an interlayer insulating layer 103 formed on the entire surface of the gate insulating layer 102 .

In each of the first and second thin film transistors T1 and T2, the source electrode SE and the drain electrode DE are formed on the interlayer insulating film 103 into the source region SA and the drain region of the active layer ACT. DA) and are formed to be spaced apart from each other with the channel region CA interposed therebetween.

Here, the source electrode SE is connected to the source region SA of the active layer ACT through a hole penetrating the interlayer insulating layer 103 .

In addition, the drain electrode DE is connected to the drain region DA of the active layer ACT through a hole passing through the interlayer insulating layer 103 .

In addition, although not shown in detail, one of the source electrode and the drain electrode (eg, a drain electrode) of the first thin film transistor T1 is connected to the data line (DL in FIGS. 1 and 2 ).

That is, the data line (DL in FIGS. 1 and 2) is formed on the interlayer insulating film 103 like the source electrode SE and the drain electrode DE of the first and second thin film transistors T1 and T2, respectively. formed in one direction.

Any one (eg, a drain electrode) of the source electrode and the drain electrode of the first thin film transistor T1 may be branched from the data line DL to correspond to each pixel area PA.

In addition, any one of the source electrode SE and the drain electrode DE of the second thin film transistor T2 (eg, the drain electrode DE) is connected to the driving power source (Vdd in FIG. 1 ).

The source electrode SE, the drain electrode DE, and the data line DL are covered with the passivation film 104 formed on the entire surface of the interlayer insulating film 103 .

The organic light emitting diode display 100a according to the first embodiment includes a color filter CF formed in each pixel area PA on the passivation film 104 , and a color filter formed flat on the entire surface of the passivation film 104 . An overcoat film 105 covering (CF) is further included.

The color filter CF is for allowing a specific color to be emitted from each pixel area PA. By the color filter CF, each pixel area PA may emit any one of red (RED), green (GREEN), and blue (BLUE). Alternatively, as in the example of FIG. 5 , each pixel area PA may emit any one of red, green, blue, and white. In this case, as shown by a dotted line in FIG. 5 , the color filter CF corresponding to the pixel area PA emitting white light may be omitted. The colors of the color filter CF are merely examples, and each embodiment of the present application is not limited to the examples.

The organic light emitting device ED is formed in each pixel area PA on the overcoat layer 105 and includes first and second electrodes EX1 and EX2 opposite to each other and an organic light emitting layer EL interposed therebetween. do.

That is, the first electrode EX1 is formed in each pixel area PA on the overcoat film 105 , and through a hole passing through the passivation film 104 and the overcoat film 105 , the second thin film transistor T2 and connected At this time, one of the source electrode SE and the drain electrode DE of the second thin film transistor T2 that is not connected to the data line DL (for example, the source electrode SE) is a passivation layer 104 . And at least a portion may be exposed by a hole passing through the overcoat layer 105 to be connected to the first electrode EX1 .

The outside of the first electrode EX1 is covered with the bank 106 formed outside each pixel area PA on the overcoat layer 105 .

The organic light emitting layer EL is formed of an organic light emitting material on the entire surface of the first electrode EX1 and the bank 106 , and the second electrode EX2 is formed on the entire surface of the organic light emitting layer EL.

In this case, one of the first and second electrodes EX1 and EX2 may be formed of a light-transmitting conductive material, and the other of the first and second electrodes EX1 and EX2 may be formed of a reflective conductive material.

The organic light emitting diode ED is covered with a sealing layer 107 formed on a surface facing the substrate 101 . That is, the sealing layer 107 is formed on the entire surface of the second electrode EX2 to face the substrate 101 .

Again, Fig. 2 will be described next.

As shown in FIG. 2 , in the organic light emitting diode display 100a according to the first embodiment of the present application, the light blocking pattern SLP1 is formed to correspond to at least a portion of the outer portion of each pixel area and is spaced apart from the gate line GL. further includes

The light blocking pattern SLP1 includes at least a portion overlapping the data line DL. That is, a portion of the light blocking pattern SLP in the other one direction (the “vertical direction” in FIG. 2 ) overlaps the data line DL.

The light blocking pattern SLP1 overlaps the edges of each of the color filter CF and the organic light emitting element EL, which are components corresponding to the pixel area PA.

As shown in FIG. 4 , the light blocking pattern SLP1 according to the first exemplary embodiment has a shape that corresponds to the outside of each pixel area PA, surrounds each pixel area PA, and opens each pixel area PA. is formed That is, the light blocking pattern SLP1 is formed in a moat shape corresponding to each pixel area PA.

The light blocking pattern SLP1 is formed on the same layer as the gate line GL and the gate electrode GE of each of the first and second thin film transistors T1 and T2.

5 , the light blocking pattern SLP1 according to the first exemplary embodiment is formed in a moat shape corresponding to each pixel area PA on the substrate 101 . In addition, the light blocking pattern SLP1 is covered with at least one insulating layer 102 , 103 formed on the entire surface of the substrate 101 . That is, the light blocking pattern SLP1 is covered with at least the gate insulating layer 102 and the interlayer insulating layer 103 .

The data line DL is formed on the interlayer insulating layer 103 and overlaps the light blocking pattern SLP1 . In addition, the data line DL is formed on the interlayer insulating layer 103 like the source electrode SE and the drain electrode DE of each of the first and second thin film transistors T1 and T2 formed on the interlayer insulating layer 103 . It is covered with a passivation film 104 formed on the entire surface.

As mentioned above, the color filter CF is formed in each pixel area PA on the passivation layer 104 . In this case, the color filter CF includes a first color filter R of a first pixel area PA1 corresponding to red RED and a second color filter R of a second pixel area PA2 corresponding to green GREEN. (G), a third color filter B of the third pixel area PA3 corresponding to blue may be included. In addition, as shown by a dotted line in FIG. 5 , a separate fourth color filter W may not be formed in the fourth pixel area PA4 corresponding to white.

In addition, the organic light emitting device ED is formed in each pixel area PA on the overcoat film 105 and includes first and second electrodes EX1 and EX2 facing each other and an organic light emitting layer EL therebetween. and covered with a sealing layer 107 .

As shown in FIG. 5 , since the light blocking pattern SLP1 is formed in the form of a moat surrounding each pixel area PA, a color filter CF and an organic light emitting device ED corresponding to each pixel area PA are formed. Each edge overlaps the light blocking pattern SLP1.

As described above, the organic light emitting diode display 100a according to the first exemplary embodiment of the present application is formed on the same layer as the gate line GL, that is, on the substrate 101 in the form of a moat corresponding to each pixel area PA. It further includes a light blocking pattern SLP1 that is

The data line DL parallel to the pixel area PA is covered by the light blocking pattern SLP1 . Therefore, external light or light from another neighboring pixel area PA is reflected by the data line DL, so that light leakage occurs outside the pixel area PA can be prevented. That is, light leakage in each pixel area PA may be blocked without forming a separate polarizing film and a separate black matrix.

As a result, color coordinate distortion and a decrease in contrast ratio can be easily prevented, and thus image quality can be improved. In addition, a decrease in luminance due to the polarizing film and a decrease in reliability due to the black matrix can be prevented.

In addition, the light blocking pattern SLP1 may be formed through the same mask process as that of the gate line GL, so that even if the light blocking pattern SLP1 is further included, a complicated manufacturing process may be prevented.

Meanwhile, according to the first exemplary embodiment of the present application, the light blocking pattern SLP1 is formed in the form of a moat surrounding the outside of each pixel area PA. However, the light blocking pattern according to the present disclosure may be formed in any shape insulated from other components (eg, the gate line GL) on the substrate 101 while opening each pixel area PA.

That is, according to the second exemplary embodiment of the present application, the light blocking pattern surrounds the entire periphery of two or more pixel areas PA adjacent to each other in one direction (“horizontal direction” in FIGS. 6 to 8 ), and two or more adjacent pixel areas PA ) is formed in the form of opening each.

6 is a plan view illustrating an organic light emitting diode display according to a second exemplary embodiment of the present application, FIG. 7 is a plan view illustrating a gate line and a light blocking pattern of FIG. 6 , and FIG. 8 is a cross-sectional view taken along II-II′ of FIG. 6 . .

6 to 8 , in the organic light emitting display device 100b according to the second exemplary embodiment of the present application, the light blocking pattern SLP2 is formed in a shape other than the moat shape corresponding to each pixel area PA. Since it is the same as the organic light emitting diode display 100a of the first embodiment shown in FIGS. 1 to 5 , except that it is the same, the overlapping description will be omitted hereinafter.

As shown in FIG. 6 , in the organic light emitting diode display 100b, a plurality of pixel areas PA are arranged side by side in one direction (the “horizontal direction” in FIG. 6 ) and have different colors (for example, , red, green, and blue) are defined as any one unit pixel area UNIT.

For example, each unit pixel area UNIT may include first to fourth pixel areas PA1 , PA2 , PA3 , and PA4 that are arranged side by side in one direction (horizontal direction) and emit light of different colors. . At this time, among the first to fourth pixel areas PA1, PA2, PA3, and PA4, the first pixel area PA1 emits red light, and the second pixel area PA2 emits green light. , the third pixel area PA3 may emit blue light, and the fourth pixel area PA4 may emit white light.

Alternatively, unlike the illustration of FIG. 6 , each unit pixel area UNIT is arranged side by side in one direction (horizontal direction) and first to third emitting red (RED), green (GREEN), and blue (BLUE) light are emitted. It may be defined as including the pixel areas PA1 , PA2 , and PA3 .

The light blocking pattern SLP2 according to the second exemplary embodiment is formed to correspond to each unit pixel area UNIT, not to each pixel area PA.

Also, similarly to the light blocking pattern SLP1 of the first embodiment, the light blocking pattern SLP2 includes at least a portion of the outer edge of each pixel area PA that overlaps the data line DL, and each pixel area PA. The color filter CF and the organic light emitting device EL, which are components corresponding to , overlap each edge.

That is, as shown in FIG. 7 , the light blocking pattern SLP2 according to the second exemplary embodiment surrounds the periphery of each unit pixel area UNIT, and two or more pixel areas PA1 included in each unit pixel area UNIT. , PA2, PA3, PA4) are formed in the form of opening each. That is, the light blocking pattern SLP2 is formed in the form of a window opening the pixel areas PA1 , PA2 , PA3 , and PA4 of each unit pixel area UNIT to correspond to each unit pixel area UNIT.

In other words, the light blocking pattern SLP2 is formed around each unit pixel area UNIT and between two or more pixel areas PA1 , PA2 , PA3 , PA4 included in each unit pixel area UNIT. In other words, the light blocking pattern SLP2 corresponds to the moat-shaped light blocking pattern SLP1 corresponding to each pixel area PA and the pixel area PA which is the same unit pixel area UNIT and which is adjacent to each other. It is a form in which patterns in one direction are combined.

As shown in FIG. 8 , the light blocking pattern SLP2 is formed on the substrate 101 to correspond between two or more pixel areas PA included in each unit pixel area UNIT.

Accordingly, a portion of the light blocking pattern SLP2 overlaps the data line DL, and the other portion overlaps the edges of the color filter CF and the organic light emitting device ED, which are components corresponding to each pixel area PA. do.

As described above, according to the second exemplary embodiment, since the light blocking pattern SLP2 is formed to correspond to each unit pixel area UNIT, the number of light blocking patterns SLP2 is reduced compared to that of the first exemplary embodiment. Accordingly, since the interval region between the light-shielding patterns SLP2, which should be greater than or equal to the process error during the mask process, is also reduced by the reduced number of the light-shielding patterns SLP2, higher resolution than the light-shielding pattern SLP1 of the first embodiment can be advantageous. .

Meanwhile, the light blocking patterns SLP1 and SLP2 according to the first and second embodiments are formed in a shape corresponding to the outer portion of the pixel area PA, and the color filter CF corresponding to the pixel area PA; The organic light emitting diode (ED) overlaps each edge.

Due to the light blocking patterns SLP1 and SLP2 , light emitted from the organic light emitting diode ED is somewhat blocked, and thus the luminance of each pixel area PA may be reduced.

Accordingly, the organic light emitting display device according to the third and fourth embodiments of the present application includes a light blocking pattern corresponding to only a part of the outer portion of each pixel area PA. That is, the light blocking pattern does not have a shape corresponding to the outside of each pixel area PA, but a shape corresponding to only a part of the outside of each pixel area PA except for another part.

First, an organic light emitting diode display 100c according to a third exemplary embodiment of the present application will be described with reference to FIGS. 9 to 12 .

9 is an equivalent circuit diagram illustrating an organic light emitting display device according to a third exemplary embodiment of the present application. 10 is a plan view illustrating an organic light emitting diode display according to a third exemplary embodiment of the present application, FIG. 11 is a plan view illustrating a gate line and a light blocking pattern of FIG. 10 , and FIG. 12 is a cross-sectional view taken along III-III′ of FIG. 10 . .

10 to 12 , in the organic light emitting diode display 100c according to the third embodiment, the light blocking pattern SLP3 does not surround the outer edge of each pixel area PA, but each pixel area ( Since it is the same as the first and second embodiments except that it is formed in a shape corresponding to only a part of the outer portion of the PA), the overlapping description will be omitted hereinafter.

As shown in FIG. 9 , the organic light emitting diode display 100c according to the third exemplary embodiment further includes a third thin film transistor T3 corresponding to each pixel area PA.

When the third thin film transistor T3 is turned on based on the sense signal Sense, each of the storage capacitor Cst and the organic light emitting device ED and the reference line RL are connected to each other, thereby forming the storage capacitor Cst and the organic light emitting diode. Each element ED is initialized.

As shown in FIG. 10 , in the organic light emitting display device 100c according to the third exemplary embodiment, a reference is formed in the display area in one direction (“vertical direction” in FIG. 10 ) parallel to the data line DL. It further includes a line RL.

In addition, according to the third exemplary embodiment, two data lines DL are disposed between two pixel areas PA that are arranged side by side in one direction (“horizontal direction” in FIG. 10 ).

That is, the first thin film transistor T1 of the first and second pixel areas PA1 and PA2 arranged parallel to one another in one direction is two pixels arranged in parallel between the first and second pixel areas PA1 and PA2. It is connected to the data line DL.

In addition, the reference line RL is spaced apart from the data line DL, is disposed between the two pixel areas PA, and is shared by both pixel areas PA.

That is, the third thin film transistor T3 of the second and third pixel areas PA2 and PA3 arranged in parallel in one direction is one reference line disposed between the second and third pixel areas PA2 and PA3. (RL) linked together.

In other words, on both sides of the second pixel area PA2 , the data line DL connected to the first thin film transistor T1 of the second pixel area PA2 and the third thin film of the second pixel area PA2 are A reference line RL connected to the transistor T3 is formed.

As shown in FIG. 11 , the light blocking pattern SLP3 according to the third exemplary embodiment moves in at least one side corresponding to the data line DL among the outer edges of each pixel area PA in the other direction (“vertical direction”). formed in an elongated form. In addition, the light blocking pattern SLP3 is formed to extend in one direction (“vertical direction”) on the other side corresponding to the reference line RL among the outer edges of each pixel area PA.

That is, the light blocking pattern SLP3 is formed in the form of a line extending in another direction on both sides of the outer edge of each pixel area PA.

In addition, the light blocking pattern SLP3 is formed on the same layer as the gate line GL and the gate electrode GE branched therefrom.

That is, as shown in FIG. 12 , the light blocking pattern SLP3 is formed on the substrate 101 like the gate line GL and the gate electrode GE and covered with at least one insulating layer 102 and 103 . all.

The data line DL and the reference line RL, like the source electrode SE and the drain electrode DE, are formed on the interlayer insulating film 103 and covered with the passivation film 104 .

In addition, each of the data line DL and the reference line RL overlaps the light blocking pattern SLP3 at the outer edge of each pixel area PA.

In addition, a portion adjacent to the data line DL and the reference line RL among the edges of the color filter CF and the organic light emitting device EL corresponding to each pixel area PA overlaps the light blocking pattern SLP3 . .

Meanwhile, according to the third exemplary embodiment, the light blocking pattern SLP3 is formed to overlap the two data lines DL disposed between the two pixel areas PA, and any signal line including the gate line GL It is an island pattern in a floating (FLOATING) state that is not overly connected.

Therefore, when any one of the two neighboring data lines DL is disconnected, the disconnected one data line DL is removed using the light blocking pattern SLP3 overlapping the lower portion of the two neighboring data lines DL. It can be repaired.

That is, as shown in FIGS. 10 and 12 , the organic light emitting diode display 100c according to the third exemplary embodiment is configured to repair a disconnected data line DL among two adjacent data lines DL. Contact welding (CW) may be further included.

Specifically, when any one of the two adjacent data lines DL is disconnected, a contact welding CW is formed to interconnect each of the two adjacent data lines DL and the light blocking pattern SLP3 below them. do. Due to the contact welding CW, the disconnected data line is connected to another data line adjacent thereto, so that the disconnected data line is repaired.

In this case, the contact welding CW may be formed by diffusing a portion of the light blocking pattern SLP3 toward the data line DL using a laser positioned outside the substrate 101 .

As described above, according to the third exemplary embodiment, the light blocking pattern SLP3 is a metal pattern on the interlayer insulating layer 103 that is a major factor causing light leakage at the outside of each pixel area PA, that is, the data line DL and the reference. It is formed in the form of a line in another direction corresponding to the line RL. Accordingly, the data line DL and the reference line RL reflect light or external light in the neighboring pixel area to prevent light leakage outside the pixel area, while minimizing the decrease in luminance due to the light blocking pattern SLP3. can be

In addition, the light blocking pattern SLP3 has a different shape so that it overlaps each of the data line DL and the reference line RL at both edges of the outer edge of the pixel area PA, rather than surrounding the outer portion of each pixel area PA. It is formed in the form of a line extending in one direction.

Therefore, when two data lines DL are arranged in parallel between the two pixel areas PA and one of the two adjacent data lines DL is disconnected, the two adjacent data lines DL The disconnected data line DL may be easily repaired by using the light blocking pattern SLP3 which is an island pattern in a floating state disposed below. Accordingly, the yield of the organic light emitting display device may be increased.

Meanwhile, the light blocking patterns SLP1, SLP2, and SLP3 according to the first to third embodiments are not connected to signal lines such as the gate line GL, the data line DL, and the reference line RL. is the state However, the light blocking pattern may be connected to the reference line RL.

Hereinafter, an organic light emitting diode display according to a fourth exemplary embodiment of the present application will be described with reference to FIGS. 13 to 15 .

13 is a plan view illustrating an organic light emitting diode display according to a fourth exemplary embodiment of the present application, FIG. 14 is a plan view illustrating a gate line and a light blocking pattern of FIG. 13 , and FIG. 15 is a cross-sectional view taken along ‡W-IV' of FIG. 13 . am.

13 , according to the fourth exemplary embodiment, the light blocking pattern SLP4 corresponds to each unit pixel area UNIT and is connected to the reference line RL through the contact hole CT. Except for this point, the organic light emitting diode display 100d according to the fourth embodiment is the same as the third embodiment shown in FIGS. 9 to 12 , and thus the overlapping description will be omitted hereinafter.

As shown in FIG. 14 , the light blocking pattern SLP4 according to the fourth exemplary embodiment has a different direction (“ The first extension SLP4a extending in the "vertical direction") and the two extending in one direction ("horizontal direction") on one side of the outer edge of each unit pixel area UNIT and included in each unit pixel area UNIT It is formed in a shape including the second extension part SLP4b connecting the above first extension parts SLP4a.

That is, the light blocking pattern SLP4 includes a second extension portion SLP4b extending in one direction to one side of the outer edge of each unit pixel area UNIT, and two or more pixel areas PA1 included in each unit pixel area UNIT. , PA2, PA3, PA4) is formed in the form of a fork including two or more first extension portions SLP4a extending in another direction from the second extension portion SLP4b corresponding to a portion of the outer edges of each.

As shown in FIG. 15 , in the organic light emitting diode display 100d according to the fourth embodiment, the gate insulating layer 102 and the interlayer insulating layer 103 are overlapped with the light blocking pattern SLP4 and the reference line RL. ) and further includes a contact hole CT exposing a portion of the light blocking pattern SLP4.

The light blocking pattern SLP4 corresponding to each unit pixel area UNIT is connected to the reference line RL by the contact hole CT.

In addition, although not shown separately, the third thin film transistor T3 of each pixel area PA is connected to the reference line RL through the light blocking pattern SLP4 . In this way, the number of reference lines RL may be reduced to a number corresponding to the unit pixel area UNIT, which may be more advantageous for high resolution.

Also, since the light blocking pattern SLP4 has the same voltage level as the reference line RL, a parasitic capacitance between the light blocking pattern SLP4 and the data line DL may be minimized. Accordingly, power consumption may be reduced, the circuit may be more stabilized, and the reliability of the organic light emitting diode display may be further improved.

Next, a method of manufacturing an organic light emitting display device according to each exemplary embodiment of the present application will be described with reference to FIGS. 16 , 17A to 17G and 18A to 18E .

16 is a flowchart illustrating a method of manufacturing an organic light emitting display device according to an exemplary embodiment of the present application, and FIGS. 17A to 17G and 18A to 18E are process diagrams illustrating each step of FIG. 16 .

As shown in FIG. 16 , in the method of manufacturing an organic light emitting display device according to each embodiment of the present application, a gate line GL in one direction on a substrate 101 and at least a portion of an outer portion of each pixel area PA Forming the light blocking patterns SLP1, SLP2, SLP3, SLP4 corresponding to and spaced apart from the gate line GL (S10), the gate line GL and the light blocking patterns SLP1, SLP2, Forming a gate insulating film 102 covering SLP3 and SLP4 (S20), forming an active layer ACT on the gate insulating film 102 (S30), and forming an active layer on the entire surface of the gate insulating film 102 (S20) ACT) forming an interlayer insulating layer 103 (S40), forming a data line DL in another direction crossing the gate line GL on the interlayer insulating layer 103 (S50); Forming a passivation film 104 covering the data line DL on the entire surface of the insulating film 103 ( S60 ), forming a color filter CF in each pixel area PA on the passivation film 104 ( S60 ) S70), and flatly forming an overcoat film 105 covering the color filter CF on the entire surface of the passivation film 104 (S80), and on the overcoat film 105 corresponding to each pixel area PA and forming an organic light emitting device (ED).

17A and 18A , a gate line GL, a gate electrode GE connected thereto, and a light blocking pattern SLP1 spaced apart from the gate line GL are formed on the substrate 101 . do. (S10)

The gate line GL is formed in one direction in the display area.

The gate electrode GE is formed to correspond to each pixel area PA and branched from the gate line GL.

The light blocking pattern SLP1 is formed on at least a portion of the outer portion of each pixel area PA.

At this time, as shown in FIG. 4 , the light blocking pattern SLP1 according to the first embodiment corresponds to the outer edge of each pixel area PA, surrounds each pixel area PA, and opens each pixel area PA. formed in the form

Alternatively, as shown in FIG. 7 , the light blocking pattern SLP2 according to the second exemplary embodiment surrounds the periphery of each unit pixel area UNIT, and two or more pixel areas PA1 included in each unit pixel area UNIT. , PA2, PA3, PA4) are formed in the form of opening each.

Alternatively, as shown in FIG. 11 , the light blocking pattern SLP3 according to the third embodiment is formed to extend in the other direction on one side corresponding to the data line DL among the outer edges of each pixel area PA. do. In addition, the light blocking pattern SLP3 may be further formed to extend in another direction to the other side corresponding to the reference line RL facing the data line DL among the outer edges of each pixel area PA.

Alternatively, as shown in FIG. 14 , the light blocking pattern SLP4 according to the fourth exemplary embodiment has a different direction on both sides corresponding to the data line DL and the reference line RL among the outer edges of each pixel area PA. The first extension SLP4a extending in the (“vertical direction”), and extending in one direction (“horizontal direction”) on one side of the outer edge of each unit pixel area UNIT are included in each unit pixel area UNIT It is formed in a shape including the second extension portion SLP4b connecting the two or more first extension portions SLP4a.

Next, a gate insulating layer 102 covering the gate line GL, the gate electrode GE, and the light blocking pattern SLP1 is formed on the entire surface of the substrate 101 . (S20)

Next, as shown in FIG. 17B , an active layer ACT is formed on the gate insulating layer 102 . (S30)

In this case, at least a portion of the active layer ACT overlaps the gate electrode GE.

In addition, the active layer ACT includes a channel region CA and a source region SA and a drain region DA on both sides thereof.

The active layer ACT may be formed of any one of oxide semiconductor, polysilicon (crystalline silicon), and amorphous silicon (a-Si: amorphous silicon).

As shown in FIG. 17C , an interlayer insulating layer 103 covering the active layer ACT is formed on the entire surface of the gate insulating layer 102 . (S40)

Then, a hole passing through the interlayer insulating layer 103 is formed to expose a portion of each of the source region SA and the drain region DA.

17D and 18B , a data line DL, a source electrode SE, and a drain electrode DE are formed on the interlayer insulating layer 103 . (S50)

The data line DL is formed in another direction crossing the gate line GL in the display area. A plurality of pixel areas PA is defined by the gate line GL and the data line DL crossing each other as described above.

In addition, the data line DL overlaps the light blocking pattern SLP1 at the periphery of each pixel area PA.

The source electrode SE is connected to the source region SA of the active layer ACT through a hole penetrating the interlayer insulating film 103 , and the drain electrode DE is active through a hole penetrating the interlayer insulating film 103 . It is connected to the drain area DA of the layer ACT.

At this time, one of the source electrode SE and the drain electrode DE (eg, the drain electrode DE) is connected to the data line DL.

In addition, as shown in FIG. 9 , when the organic light emitting diode display 100c further includes the reference line RL, the reference line RL is further formed in the forming of the data line DL ( S50 ). do. In this case, the reference line RL overlaps the light blocking pattern SLP3 at the outer edge of each pixel area PA.

In addition, although not shown separately, as shown in FIG. 15 , when a contact hole CT for interconnecting the light blocking pattern SLP4 and the reference line RL is further included, the data line DL is formed. Before step S50 , a contact hole CT passing through the gate insulating layer 102 and the interlayer insulating layer 103 is formed to expose a portion of the light blocking pattern SLP4 .

As shown in FIGS. 17E and 18C , a passivation layer 104 covering the data line DL, the source electrode SE, and the drain electrode DE is formed on the entire surface of the interlayer insulating layer 103 . (S60)

As shown in FIG. 18D , a color filter CF is formed in each pixel area PA of the passivation film 104 . (S70)

By the color filter CF, each pixel area PA may emit any one of red, green, and blue, or red, green, and blue. Either one of (BLUE) and white (WHITE) may be emitted.

As shown in FIG. 18E , an overcoat film 105 covering the color filter CF is formed flat on the entire surface of the passivation film 104 . (S80)

As shown in FIG. 17F , the other one (for example, the source electrode SE) not connected to the data line DL among the source electrode SE and the drain electrode DE of the second thin film transistor T2. ) to form a hole passing through the passivation film 104 and the overcoat film 105 to expose at least a portion of the.

As shown in FIG. 17G , an organic light emitting device ED corresponding to each pixel area PA is formed on the overcoat layer 105 . (S90)

Exemplarily, the forming of the organic light emitting device ED may include, in each pixel area PA on the overcoat layer 105 , a second thin film through a hole passing through the passivation layer 104 and the overcoat layer 105 . Forming the first electrode EX1 connected to the transistor T2, forming the bank 106 overlapping the edge of the first electrode EX1 outside each pixel area PA on the overcoat layer 105 and forming an organic light emitting layer EL and a second electrode EX2 on the entire surface of the first electrode EX1.

Meanwhile, although not shown separately, after the step of forming the organic light emitting device ED ( S90 ), a sealing layer ( 107 in FIGS. 3 and 5 ) is formed on the organic light emitting device ED. Then, it is inspected whether the organic light emitting display device is defective.

At this time, as shown in FIGS. 10 and 12 , the light blocking pattern SLP3 is formed to overlap the two data lines DL disposed between the two pixel areas PA, and is an island in a floating state. pattern, and when any one of the two neighboring data lines DL is disconnected, each of the two neighboring data lines DL and the light blocking pattern SLP3 below them is used to repair the disconnected data line DL ) may further include forming a contact welding (CW) connecting them.

In this case, the contact welding may be formed in a form in which the light blocking pattern SLP3 is diffused toward the data line DL by irradiating a laser from the substrate 101 to the light blocking pattern SLP3 side.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is conventional in the art to which the present invention pertains that various substitutions, modifications and changes are possible within the scope without departing from the technical spirit of the present invention. It will be clear to those who have the knowledge of

100a, 100b, 100c, 100d: organic light emitting display device
GL: gate line DL: data line
T1, T2, T3: first, second and third thin film transistors
ED: organic light emitting device
PA: Pixel area Vcom: Common power
SLP1, SLP2, SLP3, SLP4: Light blocking pattern
GE: gate electrode ACT: active layer
CA: Channel area SA: Source area
DA: drain area
101: substrate 102: gate insulating film
103: interlayer insulating film 104: passivation film
105: overcoat film 106: bank
CF: color filters EX1, EX2: first and second electrodes
EL: organic light emitting layer 107: sealing layer
ED: organic light emitting device
UNIT: unit pixel area RL: reference line
CW: Contact welding CT: Contact hole

Claims (17)

In the organic light emitting display device in which a plurality of pixel regions are defined in the display region,
a gate line formed in one direction in the display area on a substrate;
a light blocking pattern formed to correspond to at least a portion of an outer portion of each pixel area on the substrate and spaced apart from the gate line;
at least one insulating layer formed on the entire surface of the substrate and covering the gate line and the light blocking pattern;
a data line formed in the display area on the insulating layer in another direction crossing the gate line to define the plurality of pixel areas;
a passivation layer formed over the at least one insulating layer and covering the data line;
a color filter formed in each pixel area on the passivation film;
an overcoat film formed flat on the entire surface of the passivation film and covering the color filter; and
It is formed on the overcoat film and includes an organic light emitting device corresponding to each pixel area,
The data lines are arranged two by two between the two pixel areas arranged in parallel in the one direction;
The light blocking pattern is formed on one side corresponding to the data line among the outer edges of each pixel area, extending in the other direction, and overlaps the two adjacent data lines between the two pixel areas;
and contact welding for interconnecting each of the two adjacent data lines and a light blocking pattern overlapping the lower ones to repair a disconnected one of the two adjacent data lines.
delete The method of claim 1,
The light-shielding pattern corresponds to an outer portion of each pixel area, surrounds a portion of the outer portion of each pixel area, and opens each pixel area. In the organic light emitting display device in which a plurality of pixel regions are defined in the display region,
a gate line formed in one direction in the display area on a substrate;
a light blocking pattern formed to correspond to at least a portion of an outer portion of each pixel area on the substrate and spaced apart from the gate line;
at least one insulating layer formed on the entire surface of the substrate and covering the gate line and the light blocking pattern;
a data line formed in the display area on the insulating layer in another direction crossing the gate line to define the plurality of pixel areas;
a passivation layer formed over the at least one insulating layer and covering the data line;
a color filter formed in each pixel area on the passivation film;
an overcoat film formed flat on the entire surface of the passivation film and covering the color filter; and
It is formed on the overcoat film and includes an organic light emitting device corresponding to each pixel area,
the light blocking pattern overlaps the data line at the periphery of each pixel area;
Among the plurality of pixel areas, two or more pixel areas arranged side by side in the one direction and emitting different colors are defined as any one unit pixel area,
The light blocking pattern corresponds to each of the unit pixel areas, surrounds an outer periphery of each of the unit pixel areas, and is formed to open the at least two pixel areas included in each of the unit pixel areas. delete delete The method of claim 1,
a reference line formed in the display area on the insulating layer in the other direction and spaced apart from the data line;
The light blocking pattern further overlaps the reference line at the outer edge of each pixel area. In the organic light emitting display device in which a plurality of pixel regions are defined in the display region,
a gate line formed in one direction in the display area on a substrate;
a light blocking pattern formed to correspond to at least a portion of an outer portion of each pixel area on the substrate and spaced apart from the gate line;
at least one insulating layer formed on the entire surface of the substrate and covering the gate line and the light blocking pattern;
a data line formed in the display area on the insulating layer in another direction crossing the gate line to define the plurality of pixel areas;
a passivation layer formed over the at least one insulating layer and covering the data line;
a color filter formed in each pixel area on the passivation film;
an overcoat film formed flat on the entire surface of the passivation film and covering the color filter;
an organic light emitting device formed on the overcoat layer and corresponding to each pixel area; and
a reference line formed in the other direction in the display area on the insulating layer and spaced apart from the data line;
the light blocking pattern overlaps the data line at the periphery of each pixel area;
Among the plurality of pixel areas, two or more pixel areas arranged side by side in the one direction and emitting different colors are defined as any one unit pixel area,
The light blocking pattern is
a first extension portion extending in the other direction on one side of the outer edge of each pixel area;
It is formed in a form including a second extension portion extending in the one direction on one side of each unit pixel area and connecting the first extension portions of the two or more pixel areas included in each unit pixel area,
The light blocking pattern is connected to the reference line. 9. The method of claim 8,
The first extension portion of the light blocking pattern overlaps the data line and the reference line at the outer edge of each pixel area. delete A method of manufacturing an organic light emitting display device in which a plurality of pixel regions are defined in a display region, the method comprising:
forming a gate line in one direction and a light blocking pattern corresponding to at least a portion of an outer portion of each pixel region and spaced apart from the gate line on a substrate;
forming at least one insulating layer covering the gate line and the light blocking pattern on the entire surface of the substrate;
forming a data line in another direction crossing the gate line on the insulating layer to define the plurality of pixel regions;
forming a passivation layer covering the data line on the entire surface of the at least one insulating layer;
forming a color filter in each pixel area on the passivation film;
forming a flat overcoat film covering the color filter on the passivation film; and
Forming an organic light emitting device corresponding to each pixel area on the overcoat layer,
In the forming of the data line, the data line overlaps the light blocking pattern at the outer edge of each pixel area;
Among the plurality of pixel areas, two or more pixel areas arranged side by side in the one direction and emitting different colors are defined as any one unit pixel area,
In the step of forming the gate line and the light blocking pattern, the light blocking pattern corresponds to each unit pixel area, surrounds the periphery of each unit pixel area, and covers the two or more pixel areas included in each unit pixel area. A method of manufacturing an organic light emitting display device formed in an opening shape.
12. The method of claim 11,
In the forming of the gate line and the light blocking pattern, the light blocking pattern corresponds to the outer portion of each pixel area, surrounds the outer edge of each pixel area and opens each pixel area. manufacturing method. delete A method of manufacturing an organic light emitting display device in which a plurality of pixel regions are defined in a display region, the method comprising:
forming a gate line in one direction and a light blocking pattern corresponding to at least a portion of an outer portion of each pixel region and spaced apart from the gate line on a substrate;
forming at least one insulating layer covering the gate line and the light blocking pattern on the entire surface of the substrate;
forming a data line in another direction crossing the gate line on the insulating layer to define the plurality of pixel regions;
forming a passivation layer covering the data line on the entire surface of the at least one insulating layer;
forming a color filter in each pixel area on the passivation film;
forming a flat overcoat film covering the color filter on the passivation film; and
Forming an organic light emitting device corresponding to each pixel area on the overcoat layer,
In the forming of the data line, the data line overlaps the light blocking pattern at the outer edge of each pixel area;
In the forming of the gate line and the light blocking pattern, the light blocking pattern is formed on one side corresponding to the data line among the outer edges of each pixel area, extending in the other direction, and between the two pixel areas. overlaps two adjacent data lines in
and contact welding for interconnecting each of the two adjacent data lines and a light blocking pattern overlapping thereunder in order to repair a disconnected one of the two adjacent data lines. manufacturing method. A method of manufacturing an organic light emitting display device in which a plurality of pixel regions are defined in a display region, the method comprising:
forming a gate line in one direction and a light blocking pattern corresponding to at least a portion of an outer portion of each pixel region and spaced apart from the gate line on a substrate;
forming at least one insulating layer covering the gate line and the light blocking pattern on the entire surface of the substrate;
forming a data line in another direction crossing the gate line on the insulating layer to define the plurality of pixel regions;
forming a passivation layer covering the data line on the entire surface of the at least one insulating layer;
forming a color filter in each pixel area on the passivation film;
forming a flat overcoat film covering the color filter on the passivation film; and
Forming an organic light emitting device corresponding to each pixel area on the overcoat layer,
In the forming of the data line, the data line overlaps the light blocking pattern at the outer edge of each pixel area;
Among the plurality of pixel areas, two or more pixel areas arranged side by side in the one direction and emitting different colors are defined as any one unit pixel area,
In the step of forming the gate line and the light blocking pattern,
The light blocking pattern is
a first extension portion extending in the other direction on one side of the outer edge of each pixel area;
It is formed in a form including a second extension portion extending in the one direction on one side of each unit pixel area and connecting the first extension portions of the two or more pixel areas included in each unit pixel area,
In the forming of the data line, a reference line spaced apart from the data line is further formed on the insulating layer,
The light blocking pattern is connected to the reference line. 15. The method of claim 14,
In the forming of the data line, a reference line spaced apart from the data line is further formed on the insulating layer,
In the forming of the gate line and the light blocking pattern, the light blocking pattern further overlaps the reference line at the outer edge of each pixel area. 16. The method of claim 15,
In the forming of the gate line and the light blocking pattern, the light blocking pattern further overlaps the reference line at the outer edge of each pixel area.

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