KR102363526B1 - 복수의 엑세스 모드를 지원하는 불휘발성 메모리를 포함하는 시스템 및 그것의 엑세스 방법 - Google Patents

복수의 엑세스 모드를 지원하는 불휘발성 메모리를 포함하는 시스템 및 그것의 엑세스 방법 Download PDF

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KR102363526B1
KR102363526B1 KR1020160042453A KR20160042453A KR102363526B1 KR 102363526 B1 KR102363526 B1 KR 102363526B1 KR 1020160042453 A KR1020160042453 A KR 1020160042453A KR 20160042453 A KR20160042453 A KR 20160042453A KR 102363526 B1 KR102363526 B1 KR 102363526B1
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KR20170008141A (ko
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홍종 정
디민 니우
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삼성전자주식회사
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • G06F3/0605Improving or facilitating administration, e.g. storage management by facilitating the interaction with a user or administrator
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0634Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30101Special purpose registers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/06Address interface arrangements, e.g. address buffers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Storage Device Security (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020160042453A 2015-07-13 2016-04-06 복수의 엑세스 모드를 지원하는 불휘발성 메모리를 포함하는 시스템 및 그것의 엑세스 방법 Active KR102363526B1 (ko)

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US201562192028P 2015-07-13 2015-07-13
US62/192,028 2015-07-13
US14/957,568 2015-12-02
US14/957,568 US9886194B2 (en) 2015-07-13 2015-12-02 NVDIMM adaptive access mode and smart partition mechanism

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KR102363526B1 true KR102363526B1 (ko) 2022-02-16

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JP (1) JP6744768B2 (enExample)
KR (1) KR102363526B1 (enExample)
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TW (1) TWI691838B (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018057039A1 (en) * 2016-09-26 2018-03-29 Hewlett-Packard Development Company, L. Update memory management information to boot an electronic device from a reduced power mode
US10025714B2 (en) * 2016-09-30 2018-07-17 Super Micro Computer, Inc. Memory type range register with write-back cache strategy for NVDIMM memory locations
KR102760721B1 (ko) * 2016-11-30 2025-02-03 삼성전자주식회사 바이트 액세서블 인터페이스 및 블록 액세서블 인터페이스를 지원하는 스토리지 장치 및 이를 포함하는 전자 시스템
KR102400102B1 (ko) * 2017-05-11 2022-05-23 삼성전자주식회사 데이터 버퍼의 내부 데이터(dq) 터미네이션을 지원하는 메모리 시스템
TWI645295B (zh) 2017-06-20 2018-12-21 慧榮科技股份有限公司 資料儲存裝置與資料儲存方法
CN110720126B (zh) * 2017-06-30 2021-08-13 华为技术有限公司 传输数据掩码的方法、内存控制器、内存芯片和计算机系统
CN109791589B (zh) * 2017-08-31 2021-07-16 华为技术有限公司 一种计算机内存数据加解密的方法及装置
US11194524B2 (en) 2017-09-15 2021-12-07 Qualcomm Incorporated Apparatus and method for performing persistent write operations using a persistent write command
US10782994B2 (en) * 2017-12-19 2020-09-22 Dell Products L.P. Systems and methods for adaptive access of memory namespaces
CN108255428B (zh) * 2018-01-10 2020-07-24 联想(北京)有限公司 一种数据处理方法、装置及电子设备
US11042374B2 (en) 2019-05-02 2021-06-22 International Business Machines Corporation Non-volatile dual in-line memory module storage
US11113188B2 (en) 2019-08-21 2021-09-07 Microsoft Technology Licensing, Llc Data preservation using memory aperture flush order
US11003376B2 (en) * 2019-09-13 2021-05-11 Toshiba Memory Corporation Reconfigurable SSD storage pool
US11314460B2 (en) * 2019-09-13 2022-04-26 Kioxia Corporation Solid state drive supporting both byte addressable protocol and block addressable protocol
CN111753337B (zh) * 2020-07-02 2023-02-21 上海电器科学研究所(集团)有限公司 一种储能电池管理系统意外断电soc处理方法
TWI818732B (zh) * 2022-09-16 2023-10-11 新唐科技股份有限公司 記憶體裝置及其操作方法
KR20240063607A (ko) * 2022-11-03 2024-05-10 삼성전자주식회사 데이터 및 데이터 블록을 제공하는 스왑 메모리 장치, 이의 동작하는 방법, 및 이를 포함하는 전자 장치의 동작하는 방법

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005258804A (ja) * 2004-03-11 2005-09-22 Toshiba Corp メモリカード装置およびメモリカード制御方法
US20060143396A1 (en) 2004-12-29 2006-06-29 Mason Cabot Method for programmer-controlled cache line eviction policy
JP2008204257A (ja) * 2007-02-21 2008-09-04 Seiko Epson Corp メモリを制御するメモリコントローラ、メモリの制御方法。
US20110060887A1 (en) 2009-09-09 2011-03-10 Fusion-io, Inc Apparatus, system, and method for allocating storage
US20120185640A1 (en) 2011-01-19 2012-07-19 Mstar Semiconductor, Inc. Controller and method for controlling memory and memory system
US20130275661A1 (en) 2011-09-30 2013-10-17 Vincent J. Zimmer Platform storage hierarchy with non-volatile random access memory with configurable partitions
US20140208016A1 (en) 2013-01-18 2014-07-24 Yasir Malik System and Method for Filtering Addresses
JP2014170360A (ja) * 2013-03-04 2014-09-18 Hitachi Ltd 計算機及びメモリ管理方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5513337A (en) * 1994-05-25 1996-04-30 Intel Corporation System for protecting unauthorized memory accesses by comparing base memory address with mask bits and having attribute bits for identifying access operational mode and type
KR19980033054A (ko) * 1996-10-23 1998-07-25 윌리엄비.켐플러 프로그램 가능 메모리 액세스
US6496916B1 (en) * 1998-04-17 2002-12-17 Agere Systems Inc. System for flexible memory paging in partitioning memory
US6854043B2 (en) * 2002-07-05 2005-02-08 Hewlett-Packard Development Company, L.P. System and method for multi-modal memory controller system operation
US20050251617A1 (en) 2004-05-07 2005-11-10 Sinclair Alan W Hybrid non-volatile memory system
US20060069849A1 (en) * 2004-09-30 2006-03-30 Rudelic John C Methods and apparatus to update information in a memory
TWI446171B (zh) * 2006-09-28 2014-07-21 Virident Systems Inc 用於異質性主記憶體具有可程式化記憶體控制的系統,方法及裝置
US20080250220A1 (en) * 2007-04-06 2008-10-09 Takafumi Ito Memory system
US8832408B2 (en) 2007-10-30 2014-09-09 Spansion Llc Non-volatile memory array partitioning architecture and method to utilize single level cells and multi-level cells within the same memory
US8261047B2 (en) * 2008-03-17 2012-09-04 Freescale Semiconductor, Inc. Qualification of conditional debug instructions based on address
KR101573047B1 (ko) * 2009-01-23 2015-12-02 삼성전자주식회사 복합 메모리 장치 및 이를 이용한 i/o 처리 방법
US8239619B2 (en) * 2010-07-09 2012-08-07 Macronix International Co., Ltd. Method and apparatus for high-speed byte-access in block-based flash memory
US20130117632A1 (en) * 2011-11-08 2013-05-09 Sony Corporation Storage control apparatus
CN103514095B (zh) * 2012-06-18 2016-08-03 记忆科技(深圳)有限公司 一种数据库写入ssd 的方法和系统
CN102779096B (zh) * 2012-07-11 2015-02-04 山东华芯半导体有限公司 一种基于页块面三维的闪存地址映射方法
US9098402B2 (en) * 2012-12-21 2015-08-04 Intel Corporation Techniques to configure a solid state drive to operate in a storage mode or a memory mode
US8949486B1 (en) * 2013-07-17 2015-02-03 Mellanox Technologies Ltd. Direct memory access to storage devices
CN106933775B (zh) * 2013-10-29 2021-08-20 华为技术有限公司 数据处理系统和数据处理的方法
WO2015112126A1 (en) * 2014-01-22 2015-07-30 Hewlett Packard Development Company, L.P. Byte-addressable non-volatile read-write main memory partitioned into regions including metadata region
US20160253123A1 (en) * 2014-03-19 2016-09-01 Bruce Ledley Jacob NVMM: An Extremely Large, Logically Unified, Sequentially Consistent Main-Memory System
CN110187832B (zh) * 2014-05-21 2023-08-22 华为技术有限公司 一种数据操作的方法、设备和系统
US9396769B1 (en) * 2015-02-11 2016-07-19 Macronix International Co., Ltd. Memory device and operating method of same
US9645939B2 (en) * 2015-06-26 2017-05-09 Intel Corporation Hardware apparatuses and methods for distributed durable and atomic transactions in non-volatile memory

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005258804A (ja) * 2004-03-11 2005-09-22 Toshiba Corp メモリカード装置およびメモリカード制御方法
US20060143396A1 (en) 2004-12-29 2006-06-29 Mason Cabot Method for programmer-controlled cache line eviction policy
JP2008204257A (ja) * 2007-02-21 2008-09-04 Seiko Epson Corp メモリを制御するメモリコントローラ、メモリの制御方法。
US20110060887A1 (en) 2009-09-09 2011-03-10 Fusion-io, Inc Apparatus, system, and method for allocating storage
US20120185640A1 (en) 2011-01-19 2012-07-19 Mstar Semiconductor, Inc. Controller and method for controlling memory and memory system
US20130275661A1 (en) 2011-09-30 2013-10-17 Vincent J. Zimmer Platform storage hierarchy with non-volatile random access memory with configurable partitions
US20140208016A1 (en) 2013-01-18 2014-07-24 Yasir Malik System and Method for Filtering Addresses
JP2014170360A (ja) * 2013-03-04 2014-09-18 Hitachi Ltd 計算機及びメモリ管理方法

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US9886194B2 (en) 2018-02-06
US20170017402A1 (en) 2017-01-19
CN106354656B (zh) 2021-05-11
TWI691838B (zh) 2020-04-21
TW201706850A (zh) 2017-02-16
JP6744768B2 (ja) 2020-08-19
CN106354656A (zh) 2017-01-25
JP2017021789A (ja) 2017-01-26
KR20170008141A (ko) 2017-01-23

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