KR102350938B1 - Phase locking device of uninterruptible power supply - Google Patents

Abstract

The present invention relates to a phase synchronizing device for an uninterruptible power supplier, which comprises a comparator, a phase shifter, a difference wave generator, and an average filter to generate an analogue signal for a bypass AC voltage and an output AC voltage of an inverter. Then, the generated analogue signal is converted into a digital signal by using an analogue-digital converter and a phase difference between the bypass AC voltage and the output AC voltage of the inverter can be determined through a phase difference determination algorithm. A phase of the output AC voltage of the inverter can be controlled, based on the determined phase difference to synchronize the phases of the bypass AC voltage and the output AC voltage of the inverter. Therefore, a simpler circuit is used to allow the phases of the bypass AC voltage and the output AC voltage of the inverter to be synchronized fast and accurately.

Description

PHASE LOCKING DEVICE OF UNINTERRUPTIBLE POWER SUPPLY

It relates to a phase synchronization device for an uninterruptible power supply capable of synchronizing the phases of a bypass voltage and an output voltage of an inverter.

Recently, due to the development of the IT industry, loads sensitive to the power environment, such as computers and communication equipment, are increasing. However, there is a possibility that the power supply is temporarily limited due to an unexpected accident in the general power system, and the interruption of the computer and information system due to an accident in the power system may cause enormous social loss and confusion. Therefore, the importance of supplying power through an uninterruptible power supply (UPS) that prevents the influence of power abnormalities caused by voltage fluctuations, frequency fluctuations, momentary power failures, transient power failures, etc., and supplies stable power at all times It's getting bigger.

On the other hand, recently, the demand for an uninterruptible power supply with high reliability of power supply in the event of a power outage has increased in finance, broadcasting, and other industries, and the introduction of an uninterruptible power supply for parallel operation is also spreading.

These uninterruptible power supply devices supply AC power converted by the inverter to the load in the bypass supply mode, in which commercial power is directly supplied to the load connected to the UPS without going through the inverter during initial startup and maintenance of the device. When switching to the inverter supply mode, the phase of the bypass voltage and the inverter output voltage is required to be synchronized. A large circulating current may occur in the pass line and the inverter line. Since such a circulating current may lead to stopping the start of the uninterruptible power supply device or damage to the uninterruptible power supply device, a technique for quickly and accurately synchronizing the phases of the bypass voltage and the inverter output voltage is required.

As an example of the prior art for synchronizing the phases of the bypass voltage and the inverter output voltage in the uninterruptible power supply, there is the Republic of Korea Patent Publication No. 10-1617346 "Uninterruptible power supply device and control method thereof". Patent Registration No. 10-1617346 uses the voltage of the commercial power measured in the bypass circuit as the reference voltage so that the phase of the inverter output voltage follows the phase of the reference voltage, and when the commercial power fails, the output voltage supplied to the load Disclosed is an uninterruptible power supply device capable of stably supplying power even if a commercial power failure occurs by making the phase of the output voltage of the inverter follow the phase of the output voltage supplied to the load by using as a reference voltage. However, Patent Registration No. 10-1617346 only discloses the phase synchronization operation of the inverter voltage when a commercial power failure occurs, and the phase of the bypass voltage and the inverter output voltage when the bypass supply mode is switched from the bypass supply mode to the inverter supply mode could not be synchronized faster and more accurately.

In synchronizing the bypass AC voltage and the inverter output AC voltage in the uninterruptible power supply, the structure and implementation are simpler, the manufacturing cost is reduced, and the phase difference between the bypass AC voltage and the inverter output AC voltage is determined quickly and accurately. An object of the present invention is to provide a phase synchronization device capable of synchronizing the phases of the bypass AC voltage and the inverter output AC voltage. It is not limited to the technical problems as described above, and another technical problem may be derived from the following description.

In accordance with one aspect of the present invention, there is provided a phase-locking device for an uninterruptible power supply, comprising: a first comparator for converting a waveform of a bypass AC voltage from an external AC power supply for supplying power to the uninterruptible power supply into a square wave (V _{C1 );} a second comparator for converting the output AC voltage waveform of the first inverter of the uninterruptible power supply into a square wave (V _{C2 );} a phase shifter for shifting the phase of the square wave converted by the first comparator (V _{C1 );} a first difference wave generator for generating a _{difference wave (D 1} ) representing a difference between the square wave converted by the first comparator (V _C1 ) and the square wave converted by the second comparator (V _{C2 );} a second differential wave generator that generates a _{differential wave D 2} representing a difference between the phase shifted square wave V _S by the phase shifter and the square wave V _{C2 converted by the second comparator;} The first difference is derived a difference file generated by the group (D ₁₎ and the second difference is derived on the basis of the difference wave (D ₂₎ produced by the group the bypass AC voltage to the first output AC voltage of the inverter. a first phase difference determining module for determining a phase difference between the and a first inverter controller for controlling the phase of the output AC voltage of the first inverter according to the phase difference determined by the first phase difference determining module.

_{The square wave V C1} converted by the first comparator has a high value in a time section in which the waveform of the bypass AC voltage is greater than the zero potential, and a low value in a time section smaller than the zero potential. and the square wave V _C2 converted by the second comparator has the high value in a time interval in which the waveform of the output AC voltage of the first inverter is greater than the zero potential, and the zero potential In a smaller time interval, it may be a spherical file having the above low value.

The square wave V _S shifted by the phase shifter may have a phase shifted by 90° of the _{square wave V C1} converted by the first comparator.

_{The differential wave D 1} generated by the first differential wave generator is a time interval in which the square wave V _C1 converted by the first comparator and the square wave V _{C2 converted by the second comparator have the same value.} has a value of 0, and is a square wave having a value of 1 in a time interval in which the values of the square _{wave (V C1} ) converted by the first comparator and the square wave (V _{C2 ) converted by the second comparator are different, and The differential wave D 2} generated by the second differential wave generator is 0 in the time interval in which the square wave V _C2 converted by the second comparator and the square wave V _{S shifted by the phase shifter have the same value.} It may have a value of and may have a value of 1 in a time interval in which the values of _{the square wave V C2} converted by the second comparator and the square wave V _{S shifted by the phase shifter are different.}

The first phase difference determination module of the first differential derivative produced by the group difference wave (D ₁₎ and the second difference derives the resulting difference by the group wave (D ₂₎ to the bypass flow based on the respective average values A phase difference between the voltage and the output AC voltage of the first inverter may be determined.

The first phase determination module includes: a first average filter for converting the _{differential wave (D 1} ) generated by the first differential wave generator into a DC wave (A ₁ ) representing an average value of the differential wave (D _{1 );} and a second average filter for converting _{the differential wave D 2} generated by the second differential wave generator into a DC wave A ₂ representing an average value of the differential wave D _{2 .}

The first phase determination module converts each of the DC wave (A _{1 ) converted by the first average filter and the DC wave (A 2} ) converted by the second average filter into a digital signal (C ₁ , C ₂ ) A first analog-to-digital converter for converting is further included, wherein the digital signal (C _{1 ) represents an average value of the DC wave (A 1} ) converted by the first average filter, and the digital signal (C ₂ ) is the It may represent an average value of _{the DC wave (A 2} ) converted by the second average filter.

The first phase determination module includes the bypass AC voltage and the output AC voltage of the first inverter based on the magnitude of the average value represented by each _{of the digital signals C 1} , C ₂ converted by the first analog-to-digital converter a first phase difference discriminator for determining a phase difference between the two; and by shifting the phase of the output AC voltage of the first inverter based on the phase difference between the bypass AC voltage determined by the first phase difference separator and the output AC voltage of the first inverter, the output AC voltage of the first inverter It may further include a first inverter controller for synchronizing by following the bypass AC voltage.

a third comparator for converting the output AC voltage waveform of the second inverter of the uninterruptible power supply into a square wave (V _{C3 );} a third differential wave generator that generates a _{differential wave D 3} representing a difference between the _{square wave V C1} converted by the first comparator and the square wave V _{C3 converted by the third comparator; a fourth} differential wave generator for generating a differential wave D 4 representing a difference between the phase shifted square wave V _S by the phase shifter and the square wave V _{C3 converted by the third comparator;} The bypass AC voltage and the output AC voltage of the second inverter based _{on the differential wave D 3} generated by the third differential wave _{generator and the differential wave D 4} generated by the fourth differential wave generator a second phase difference determining module for determining a phase difference between the two; It may further include a second inverter controller for controlling the phase of the output AC voltage of the second inverter according to the phase difference determined by the second phase difference determining module.

Further comprising a power failure discrimination circuit for determining whether an external AC power source for supplying power to the uninterruptible power supply device is out of power, the bypass AC voltage, the A waveform of any one of the output AC voltage of the first inverter and the output AC voltage of the second inverter may be converted by the first comparator.

When it is determined that the external AC power is not blackout by the power failure determination circuit, the waveform of the bypass AC voltage is converted by the first comparator, and when it is determined that the external AC power is blackout, the output of the first inverter A waveform of any one preset among the AC voltage and the output AC voltage of the second inverter may be converted by the first comparator.

A transformed analog signal is generated from the bypass AC voltage and the inverter output AC voltage, the generated analog signal is converted into a digital signal using an analog-to-digital converter, and the bypass AC voltage and inverter output AC voltage are used through a phase difference discrimination algorithm By determining the phase difference between the two and controlling the phase of the inverter output AC voltage based on the determined phase difference to synchronize the phases of the bypass AC voltage and the inverter output AC voltage, the bypass AC voltage and inverter output are quickly and accurately using a simpler circuit. The phase of AC voltage can be synchronized.

1 is a diagram illustrating an uninterruptible power supply including a phase-locked device according to an embodiment of the present invention.
FIG. 2 is a block diagram of the phase-locking device shown in FIG. 1 .
3 to 8 are diagrams illustrating output signals of each component of the phase-locking device shown in FIG. 2 .
9 is a table showing the operation of the inverter controller according to an embodiment of the present invention.
10 is a diagram illustrating an uninterruptible power supply including a phase-locked device according to another embodiment of the present invention.
11 is a block diagram of the phase-locking device shown in FIG. 10 .

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The embodiment of the present invention described below relates to a phase synchronization device of an uninterruptible power supply device capable of synchronizing the phases of a bypass voltage and an output voltage of an inverter in the uninterruptible power supply device, and briefly 'phase synchronization device' can be called as

1 is a diagram illustrating an uninterruptible power supply including a phase-locked device according to an embodiment of the present invention. Referring to FIG. 1 , the uninterruptible power supply device typically includes a rectifier 110 , an inverter 120 , and a battery 130 . In addition to these representative components, the uninterruptible power supply may further include other components such as a rectifier 110 , a controller for controlling the operation of the inverter 120 , and various switches.

The rectifier 110 converts AC power from an external commercial power source that supplies power to the uninterruptible power supply device into DC power, and the inverter 120 converts DC power converted by the rectifier 110 or the battery 130 supplied from the It converts DC power into AC power and supplies it to the AC load. On the other hand, to supply AC power to the AC load during initial startup or maintenance of the uninterruptible power supply, an AC input port through which commercial AC power from an external power source is received and an AC output port through which AC power to be supplied to the AC load is output. a bypass line (L _B) for connection is formed. Through a by-pass line (L _B) and had a respective switch is provided the output terminal of the inverter 120, the uninterruptible power supply unit, the AC power from the external power source by-pass line (L _B) in accordance with the on and off of the switches It operates in the bypass supply mode supplied to the AC load or the inverter supply mode in which the AC power converted by the inverter 120 is supplied to the AC load. When operating in the inverter supply mode, some of the DC power converted by the rectifier 110 is input to the inverter 120 and converted into AC power, and the rest is input to the battery 130 to charge the battery. The DC power charged in the battery 130 is discharged and supplied to the AC load when power supply from an external commercial power source is stopped, such as a power outage.

Hereinafter, for convenience of explanation, the AC power from the external power supply is passed through the bypass line (L _B) to by-pass the AC power, the AC power from the external power supply is passed through the bypass line (L _B) The AC voltage of may be referred to as a bypass AC voltage (V _{B ).} In addition, the AC power converted by the inverter 120 and outputted is referred to as the inverter output AC power, and the AC voltage of the AC power converted and output by the inverter 120 _{is referred to as the inverter output AC voltage (V I ).} .

The phase synchronization device 100 according to an embodiment of the present invention _{senses the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ), and the sensed bypass AC voltage (V _B ) and the inverter output AC based on a voltage (V _I) by-pass the AC voltage (V _B) and the inverter output AC voltage (V _I) output of the inverter upon by controlling the phase, the operation of the uninterruptible power supply switch to the inverter supply mode in the by-pass feed mode of The phase of the AC voltage V _I and the phase of the bypass AC voltage V _B are synchronized.

Hereinafter, an embodiment of a phase-locked device according to an embodiment of the present invention will be described with reference to FIGS. 2 to 11 .

2 is a block diagram of a phase-locking device according to an embodiment of the present invention. Referring to FIG. 2 , a phase synchronization device according to an embodiment of the present invention includes a first comparator 210 , a second comparator 220 , a phase shifter 230 , a first differential wave generator 240 , and a second It is composed of a second difference wave generator 250 , a phase difference determination module 260 , and an inverter controller 270 .

_{The first comparator 210 converts the waveform of the bypass AC voltage (V B} ) from the external commercial power supply supplying power to the uninterruptible power supply device into a square wave (V _C1 ). The first comparator 210 may convert the bypass AC voltage (V _B ) waveform into a square wave _{by comparing the bypass AC voltage (V B ) waveform with a zero potential.} In one embodiment of the present invention, the first comparator 210 may be implemented as a zero-crossing detector using an operational amplifier (OP AMP). The first comparator 210 implemented as a zero-crossing detector has a positive input terminal, a negative input terminal, and an output terminal.

The first comparator 210 has a high value (high) having a size preset through the output terminal when the magnitude of the bypass AC voltage V _B applied to the positive input terminal is greater than the voltage applied to the negative input terminal, that is, 0V. For example, by outputting 5V) and outputting a low value (eg, 0V) having a preset size when the magnitude _{of the bypass AC voltage V B applied to the positive input terminal is smaller than 0V, the bypass AC voltage is output.} A voltage (V _B ) waveform can be converted to a square wave (V _{C1 ).}

Referring to 3, the first comparator 210, waveform (V _C1), the by-pass AC voltage (V _B), the by-pass AC voltage to a high value, (V _B) is greater than 0V converted by the When it is less than 0V, it can be seen that a square wave having a low value is generated.

The second comparator 220 converts the waveform of the output AC voltage V _I of the inverter 120 into a square wave V _C2 . The second comparator 220 may convert the output AC voltage (V _I), the waveform of inverter 120 by comparing the output AC voltage (V _I) waveform and zero potential of the inverter 120 to the square wave. The second comparator 220 may also be implemented as a zero-crossing detector using an operational amplifier. The second comparator 220 implemented as a zero-crossing detector has a positive input terminal, a negative input terminal, and an output terminal.

The second comparator 220 has a high value (eg, 5V) having a preset size through the output terminal when the magnitude of the inverter output AC voltage (V _I ) applied to the positive input terminal is greater than the voltage applied to the negative input terminal, that is, 0V. ) and outputting a low value (eg, 0V) having a preset magnitude when the magnitude of the inverter output AC voltage (V _{I ) applied to the positive input terminal is smaller than 0V, thereby the inverter output AC voltage (V I} ) waveform can be converted to a square wave (V _{C2 ).} In this case, the first comparator 210 and the second comparator 220 have the same high value and low value.

Referring to 3, the second comparator 220, waveform (V _C2), the inverter output AC voltage (V _I) has a high value, the inverter output AC voltage (V _I) is greater than 0V converted by the When it is less than 0V, it can be seen that a square wave having a low value is generated.

The phase shifter 230 shifts the phase of _{the square wave V C1} converted by the first comparator 210 . More specifically, the phase shifter 230 shifts the phase of _{the square wave V C1 converted by the first comparator 210 by 90°.} Referring to FIG. 3 , the square wave V _C1 converted by the first comparator 210 is phase-shifted square wave V _S moves the square wave V _C1 on the time axis by 1/4 period, that is, the phase It can be seen that this is converted into a 90° shifted square wave. The phase shifter 230 may be implemented as an all-pass filter using an operational amplifier.

The first differential wave generator 240 is a difference wave representing the difference between the _{square wave V C1 converted by the first comparator 210 and the square wave V C2} converted by the second comparator 220 . (D ₁ ) is created. The differential wave D _{1 is the value of the waveform of the square wave V C1} converted by the first comparator 210 and the value of the waveform of the square wave V _{C2 converted by the second comparator 220.} It is a square wave with a value. The first differential wave generator 240 compares the square wave V _{C1 converted by the first comparator 210 with the square wave V C2} converted by the second comparator 220 to compare the square wave V _C1 and the square wave. A square wave having a value of 0 in a time interval in which the value of (V _C2 ) is the same and a value of 1 in a time interval in which the value of the square wave (V _C1 ) and the square wave (V _C2 ) is different is generated as a differential wave (D _{1 )} do. In an embodiment of the present invention, the first differential wave generator 240 may be implemented using an XOR logic gate.

Referring to FIG. 3 , in the differential wave D1 , the square wave V _C1 and the square wave V _C2 have the same value, that is, the square wave V _C1 and the square wave V _C2 have a high value, or a low value, respectively. In the time interval having a value, it has a value of 0 _{, and the square wave (V C1} ) and the square wave (V _C2 ) have different values, that is, the square wave (V _C1 ) has a high value and the square wave (V _C2 ) has a low value. Alternatively, it may be confirmed that the square wave V _C1 has a low value and the square wave V _C2 has a value of 1 in a time interval having a high value.

The second differential wave generator 250 is a differential wave D representing the difference between the _{square wave V C2} converted by the second comparator 220 _{and the square wave V S} whose phase is shifted by the phase shifter 230 . ₂ ) is created. The differential wave D _{2 is the value of the waveform of the square wave V C2} converted by the second comparator 220 and the value of the waveform of the square wave V _{S shifted by the phase shifter 230.} It is a square wave with a value. The second differential wave generator 250 compares the square wave V _{C2 converted by the second comparator 220 with the square wave V S} shifted by the phase shifter 230 to compare the square wave V _C2 and the square wave. A square wave with a value of 0 in the time interval in which the (V _S ) value is the same, and a value of 1 in the time interval in which the square wave (V _C2 ) and the square wave (V _S ) have different values, is generated as a differential wave (D _{2 ).} do. In an embodiment of the present invention, the second differential wave generator 250 may be implemented using an XOR logic gate.

3, the differential wave (D ₂₎ is a square wave (V _C2) and a square wave (V _S) with the same value, i.e., a square wave (V _C2) and a square wave (V _S) has or have a respective high value, or respectively In the time interval having a low value, it has a value of 0 _{, and the square wave (V C2} ) and the square wave (V _S ) have different values, that is, the square wave (V _C2 ) has a high value and the square wave (V _S ) has a low value. It can be seen that the interval or square wave V _C2 has a low value and the square wave V _S has a value of 1 in a time interval having a high value.

The phase difference determination module 260 bypasses AC voltage based on the differential wave D1 generated by the first differential wave generator 240 and the differential wave D _{2 generated by the second differential wave generator 250 .} A phase difference between (V _B ) and the output AC voltage (V _{I ) of the inverter 120 is determined.}

In an embodiment of the present invention, the phase difference determining module 260 may include a first average filter 261 , a second average filter 262 , an analog-to-digital converter 263 , and a phase difference determiner 264 . . Hereinafter, the “output AC voltage of the inverter 120” may be briefly referred to as “inverter output AC voltage”.

The first average filter 261 converts the differential wave D1 generated by the first differential wave generator 240 into a direct current (DC) wave A ₁ representing the average value of the differential wave D1 . The first average filter 261 may be implemented as a low-pass filter. Referring to FIG. 3 , the waveform A ₁ output by the first average filter 261 is expressed as a DC wave having a constant constant value, and the constant constant value at this time is the average _{value of the differential wave D 1 .} can be checked

The second average filter 262 converts the differential wave D _{2 generated by the second differential wave generator 250 into a DC wave A 2} representing an average value of the differential wave D ₂ . The second average filter 262 may be implemented as a low-pass filter. Referring to FIG. 3 , the waveform A ₂ output by the second average filter 262 is expressed as a DC wave having a constant constant value, and the constant constant value at this time has an average _{value of the differential wave D 2 .} can check that _{When comparing the DC wave A 1} converted by the first averaging filter 261 _{and the DC wave A 2} converted by the second averaging filter 262, relatively compared to the differential wave D ₂ . _{A differential wave (D 1} ) having many time sections having a value of _{1 is a DC wave (A 1} ) converted by the first averaging filter 261 , the value of a differential wave (D ₂ ) is a second averaging filter 262 . It can be confirmed that the DC wave (A ₂ ) has a larger constant value than the converted by .

The analog-to-digital converter 263 receives the DC wave A _{1 converted by the first average filter 261 and the DC wave A 2} converted by the second average filter 262 and receives each DC wave (A1, A2) is converted to a digital value and the constant value (C1, C2) is output. For example, if the DC wave (A ₁ ) is a DC waveform having a constant value of 0.4 and the DC wave (A ₂ ) is a DC waveform having a constant value of 0.2, the analog-to-digital converter 263 is a DC wave (A ₁ ) and DC A wave (A ₂ ) can be input and output a constant value (C ₁ ) 0.4 and a constant value (C ₂ ) 0.2 for each.

The phase difference discriminator 264 is based on the constant values C1 and C2 output by the analog-digital converter 263, and the phase difference (θ) _{between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _{I )} to determine

9 is a constant value (C ₁ ) and a constant value (C ₂ ) The phase difference (θ) _{between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) determined by the phase difference determiner 264 based on the constant value (C 2 ) ) is shown in the table. According to FIG. 9 , in one example, the phase difference discriminator 264 is a constant value C ₁ output by the analog-to-digital converter 263 is 0.4 and the constant value C2 is 0.2, the constant value C ₁ ) and the constant value (C2) are smaller than 0.5, so _{the phase difference (θ) between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) is greater than 0° and smaller than or equal to 90° . In another example, the phase difference determiner 264 is a constant value (C ₁ ) output by the analog-digital converter 263 is 0.7, and the constant value (C ₂ ) is 0.3, when the constant value (C ₁ ) is 0.5 Since it is larger and the constant value (C2) has a value smaller than 0.5 _{, the phase difference (θ) between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) is greater than 90° and less than or equal to 180°. to determine

Inverter controller 270 is in the by-pass AC voltage (V _B) and the inverter output AC voltage (V _I) to the inverter output AC voltage (V _I) based on the phase difference (θ) of the discrimination by the phase discriminator (264) control the phase. More specifically, the inverter controller 270 determines the inverter output AC voltage (V) according to the phase difference (θ) _{between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _{I ) determined by the phase difference separator 264 . The phase of I} ) is moved in the negative (-) direction or the positive (+) direction so that the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) are synchronized. Referring to FIG. 9 , the inverter controller 270 has a phase _{difference θ between the bypass AC voltage V B} and the inverter output AC voltage V _I by the phase difference detector 264 is greater than 180° and greater than 270°. When the small or identified as such, by controlling the inverter output AC voltage (V _I), the phase of the inverter output ac voltage (V _I) so as to move from the current phase in the plus (+) direction, and by-pass the AC voltage (V _B) and The phase difference θ of the inverter output AC voltage V _{I is reduced.}

The inverter controller 270 determines the phase of the inverter output AC voltage (V _I ) _{according to the phase difference (θ) between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) determined by the phase difference detector (264). is moved by a preset angle in the minus (-) or plus (+) direction. In an embodiment of the present invention, the inverter controller 270 may shift the phase of the _{inverter output AC voltage V I by 3°.}

_{The waveform of the inverter output AC voltage (V I} ) whose phase is shifted by the inverter controller 270 _{is again converted into a square wave (V C2} ) by the second comparator 220 by the phase difference discriminator 264 . The phase difference θ with the bypass AC voltage V _B is determined, and the inverter controller 270 determines the bypass AC voltage V _B and the inverter output AC voltage V _I ), the phase of the inverter output AC voltage (V _I ) is shifted by a preset angle (eg, 3°) in the negative (-) direction or the positive (+) direction according to the phase difference θ. To do this, the phase difference discriminator by-pass AC voltage according to (264) (V _B) and the inverter output AC voltage (V _I) a phase difference (θ) is determined and the inverter output AC voltage by the inverter controller (270) (V _I) of the The phase shift is performed until the phase difference θ between the bypass AC voltage V _B and the inverter output AC voltage V _I becomes less than or equal to a preset threshold value (eg, 5°). The interruption of the phase shift of the inverter output ac voltage (V _I), not when the phase difference (θ) of the by-pass AC voltage (V _B) and the inverter output AC voltage (V _I) is that a 0 °, a preset threshold value ( _{For example, when the phase of the inverter output AC voltage (V I} ) is controlled until the phase difference (θ) becomes 0°, an excessive load is applied to the phase-locking device to achieve synchronization efficiency This is because it can be lowered.

3 to 8 are diagrams illustrating output signals of each component of the phase-locking device shown in FIG. 2 . Hereinafter, the operation of the phase-locked device according to an embodiment of the present invention will be described with reference to FIGS. 3 to 8 showing output signals of each component of the phase-locked device 100 in a situation of different phase differences θ. .

3 is an output signal of each component of the phase synchronization device 100 when the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _{I ) is greater than 0° and less than or equal to 90°} is a diagram showing

The first comparator 210 in the by-pass AC voltage (V _B) by detecting the large time period than the waveform in the potential of zero (0) in the by-pass AC voltage (V _B) has a high value (e.g., 5V), Spirit In a time interval smaller than (0) potential, it is converted _{into a square wave (V C1 ) having a low value (eg, 0V).} The second comparator 220 is in by the waveform is larger window size than the zero potential by detecting the inverter output AC voltage (V _I), the inverter output AC voltage (V _I) has a high value (e.g., 5V), In a time interval smaller than the zero (0) potential, it is converted _{into a square wave (V C2 ) having a low value (eg, 0V).} The phase shifter 230 converts the square wave V _C1 converted by the first comparator 210 by 90° phase shift to convert it into a square wave V _{S .}

The first differential wave generator 240 receives the square wave V _{C1 converted by the first comparator 210 and the square wave V C2} converted by the second comparator 220 , and receives the square wave V _C1 and the square wave Comparing (V _C2 ), the square wave (V _C1 ) and the square wave (V _C2 ) have a value of 0 in the same time interval, and in the time interval where the square wave (V _C1 ) and the square wave (V _C2 ) have different values. A differential wave D ₁ having a value of 1 is generated. The second differential wave generator 250 receives the square wave V _{C2 converted by the second comparator 220 and the square wave V S} whose phase is shifted by the phase shifter 230 as input, and the square wave V _C2 ) and square wave (V _S ), the square wave (V _C2 ) and the square wave (V _S ) have a value of 0 in the same time interval, and the value of the square wave (V _C2 ) and the square wave (V _S ) is different. In the section, a differential wave D ₂ having a value of 1 is generated.

The first average filter 261 converts the differential wave D _{1 generated by the first differential wave generator 240 into a DC wave A 1} representing the average value of the differential wave D ₁ , and the second average The filter 262 converts the differential wave D _{2 generated by the second differential wave generator 250 into a DC wave A 2} representing an average value of the differential wave D ₂ .

The analog-to-digital converter 263 receives the DC wave A _{1 converted by the first average filter 261 and the DC wave A 2} converted by the second average filter 262 and receives each DC wave The constant values (C1 and C2) obtained by converting (A1 and A2) into digital values are output. As can be seen in FIG. 3 , it can be seen that both the DC wave (A ₁ ) and the DC wave (A ₂ ) have a converted constant value (C ₁ ) and a constant value (C ₂ ) of less than 0.5. The phase difference discriminator 264 has a constant value (C ₁ ) and a constant value (C ₂ ) output by the analog-digital converter 263 both have a value less than 0.5, according to the phase difference discrimination algorithm shown in FIG. It is determined that the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) is greater than 0° and less than or equal to 90°.

The inverter controller 270 moves the phase of the inverter output AC voltage V _I in the negative (-) direction by a preset angle (eg, 3°) according to the phase difference discrimination result of the phase difference detector 264 . _{The inverter output AC voltage (V I} ) whose phase is shifted by the inverter controller (270) is the bypass AC voltage (V _B ) while repeating the phase shift according to the phase difference discrimination and the determination result from the bypass AC voltage (V _B ) and phase are synchronized.

The first comparator 210 , the second comparator 220 , the phase shifter 230 , the first differential wave generator 240 , and the first comparator 210 , the second comparator 220 , The description of the second differential wave generator 250, the first average filter 261, the second average filter 262, and the analog-to-digital converter 263 is not different from that shown in FIG. 3, and thus the description is prevented from being redundant. In order to do so, the description of FIGS. 4 to 8 will be substituted for that described in FIG. 3 .

4 is an output signal of each component of the phase synchronization device 100 when the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _{I ) is greater than 90° and less than or equal to 180°} is a diagram showing

Since the phase difference discriminator 264 has a constant value C ₁ output by the analog-digital converter 263 is greater than 0.5, and the constant value C ₂ has a value smaller than 0.5, the phase difference shown in FIG. According to the discrimination algorithm, the _{phase difference (θ) between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) is determined to be greater than 90° and less than or equal to 180°.

The inverter controller 270 moves the phase of the inverter output AC voltage V _I in the negative (-) direction by a preset angle (eg, 3°) according to the phase difference discrimination result of the phase difference detector 264 .

5 is a diagram illustrating output signals of each configuration of the phase-locking device 100 when the phase difference θ between the bypass AC voltage V _B and the inverter output AC voltage V _{I is 180°.}

The phase difference discriminator 264 has a constant value (C ₁ ) output by the analog-digital converter 263 is 1, and the constant value (C ₂ ) has 0.5, so according to the phase difference discrimination algorithm shown in FIG. It is determined that the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _{I ) is 180°.}

The inverter controller 270 adjusts the phase of the inverter output AC voltage (V _I ) in the negative (-) direction or the positive (+) direction according to the phase difference determination result of the phase difference detector 264 at a preset angle (eg, 3°) move When the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) is determined to be 180° by the phase difference determiner 264 , the inverter controller 270 controls the inverter output AC voltage (V) _{Whether to move I} ) in the minus (-) direction or the plus (+) direction may be preset by the user.

6 is an output signal of each component of the phase synchronization device 100 when the phase difference (θ) of the bypass AC voltage (V _B ) and the inverter output AC voltage (V _{I ) is greater than 180° and less than or equal to 270°} is a diagram showing

Since the phase difference discriminator 264 has a constant value (C ₁ ) and a constant value (C ₂ ) output by the analog-digital converter 263 both have a value greater than 0.5, in the phase difference discrimination algorithm shown in FIG. Accordingly, it is determined that the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) is greater than 180° and less than or equal to 270°.

The inverter controller 270 moves the phase of the inverter output AC voltage V _I by a preset angle (eg, 3°) in the positive (+) direction according to the phase difference discrimination result of the phase difference detector 264 .

7 is an output signal of each component of the phase synchronization device 100 when the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _{I ) is greater than 180° and less than or equal to 270°} is a diagram showing

Since the phase difference separator 264 has a constant value C ₁ output by the analog-digital converter 263 has a value less than 0.5, and the constant value C ₂ has a value greater than 0.5, in FIG. According to the phase difference determination algorithm _{shown, the phase difference (θ) between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ) is determined to be greater than 270° and less than or equal to 360°.

The inverter controller 270 moves the phase of the inverter output AC voltage V _I by a preset angle (eg, 3°) in the positive (+) direction according to the phase difference discrimination result of the phase difference detector 264 .

8 is a diagram illustrating output signals of each configuration of the phase-locking device 100 when the phase difference θ between the bypass AC voltage V _B and the inverter output AC voltage V _{I is 0°.}

The phase difference discriminator 264 has a constant value (C ₁ ) output by the analog-digital converter 263 has a value of 0, and a constant value (C ₂ ) has a value of 0.5, so the phase difference discrimination shown in FIG. 9 According to the algorithm, the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) is 0°, that is, it is determined that synchronization is achieved.

The inverter controller 270 does not shift the phase _{of the inverter output AC voltage V I} according to the phase difference determination result of the phase difference determiner 264 .

On the other hand, when the phase difference (θ) between the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I ) is 0° and 180°, the constant value (C ₂ ) is the same as 0.5 for both. This is because the phase synchronization determination method of the phase synchronization device 100 according to the embodiment of the present invention is symmetric with respect to 180°. The phase synchronization device 100 according to the embodiment of the present invention _{determines the phase difference by considering not only the constant value C 2} , but also the constant value C ₁ , when the phase difference θ is 0° and 180°. can be distinguished.

According to the phase synchronization device 100 according to the embodiment of the present invention, it is possible to quickly _{determine and control the phase difference between the bypass AC voltage (V B} ) and the inverter output AC voltage (V _I ), and can be implemented with a simpler circuit Therefore, there is an advantage in terms of cost.

On the other hand, in recent years, in order to increase the reliability or capacity of the uninterruptible power supply, the demand for an uninterruptible power supply device operated in parallel as shown in FIG. 10 is increasing. Referring to FIG. 10 , an uninterruptible power supply device operated in parallel is typically composed of a first rectifier 1010 , a second rectifier 1020 , a first inverter 1030 , a second inverter 1040 , and a battery 130 . do. In addition to these representative components, the uninterruptible power supply device that operates in parallel includes a controller for controlling the operation of the first rectifier 1010 , the second rectifier 1020 , the first inverter 1030 , and the second inverter 1040 , various switches, etc. It may further include a component.

The first rectifier 1010 and the second rectifier 1020 convert AC power from an external power supply for supplying power to the uninterruptible power supply device into DC power, and the first inverter 1030 and the second inverter 1040 are The DC power converted by the first rectifier 1010 and the second rectifier 1020 or the DC power supplied from the battery 130 is converted into AC power and supplied to the AC load. Hereinafter, the AC power converted by the first inverter 1030 is converted into the first inverter output AC power, and the AC voltage of the AC power converted and output by the first inverter 1030 is converted to the first inverter output AC voltage. (V _I1 ), the AC power converted and output by the second inverter 1040 is converted to the second inverter output AC power, and the AC voltage of the AC power converted and output by the second inverter 1040 is subtracted 2 It can be referred to as the inverter output AC voltage (V _{I2 ).}

When the uninterruptible power supply unit operated in parallel is also switched from the bypass supply mode to the inverter supply mode, _{the phase of the bypass AC voltage (V B} ), the first inverter output AC voltage and the second inverter output AC voltage (V _I2 ) are synchronized should be

The phase-locking device 100 according to another embodiment of the present invention has a bypass AC voltage (V _B ), a first inverter output AC voltage (V _I1 ) and a second inverter output AC voltage (V) of an uninterruptible power supply device operating in parallel. _I2 ) is sensed, and the sensed bypass AC voltage (V _B ), the first inverter output AC voltage (V _I1 ), and the second inverter output AC voltage (V _I2 ) are bypassed based on the AC voltage (V _B ), By controlling the phases of the first inverter output AC voltage (V _I1 ) and the second inverter output AC voltage (V _I2 ), the operation of the uninterruptible power supply unit operated in parallel is bypassed AC when the operation is switched from the bypass supply mode to the inverter supply mode The phase of the first inverter output AC voltage V _I1 and the second inverter output AC voltage V _I2 is synchronized by following the voltage V _{B .}

11 is a block diagram of a phase-locked device in an uninterruptible power supply operating in parallel. Referring to FIG. 11 , the phase-lock device in the uninterruptible power supply device operated in parallel includes a power failure discrimination circuit 1160 , a first comparator 210 , a second comparator 220 , a third comparator 1110 , and a phase shifter. (230), first differential wave generator 240, second differential wave generator 250, third differential wave generator 1120, fourth differential wave generator 1130, first phase difference determining module 260, first It is composed of two phase difference determining module 1140 , a first inverter controller 270 and a second inverter controller 1150 . Here, the first phase difference determining module 260 and the first inverter controller 270 correspond to the phase difference determining module 260 and the inverter controller 270 of the single operation uninterruptible power supply.

Hereinafter, in order to prevent the description from being verbose, only the different parts will be described compared to the phase-locked device in the uninterruptible power supply that operates in a single operation.

The power failure determination circuit 1160 determines whether a power outage occurs in which power is not supplied from an external commercial power supply that supplies power to the uninterruptible power supply device, and determines the voltage input to the first comparator 210 according to the determination result do. More specifically, when the external commercial power is applied to the uninterruptible power supply device (that is, when there is no power outage), the power failure determination circuit 1160 bypasses the AC voltage V _{B by the first comparator 210 .} to be converted On the other hand, when it is determined that the external commercial power is not applied due to the power failure, the power failure discrimination circuit 1160 determines the first inverter output AC voltage V _I1 or the second inverter output AC voltage V by the first comparator 210 . The waveform of one preset voltage among _{I2 ) is converted.}

The third differential wave generator 1120 compares the square wave V _{C1 converted by the first comparator 210 with the square wave V C3} converted by the third comparator 1110 to compare the square wave V _C1 and the square wave. (V _C3 ) has a value of 0 in the same time interval, and in the time interval where the square wave (V _C1 ) and the square wave (V _C3 ) have different values, a square wave having a value of 1 is generated _{as a differential wave (D 3 )} do.

_{The fourth differential wave generator 1130 compares the square wave V S} shifted by the phase shifter 230 with the square _{wave V C3} transformed by the third comparator 1110 to compare the square wave V _S and the square wave. (V _C3 ) has a value of 0 in the same time interval, and a square wave having a value of 1 in a time interval in _{which the square wave (V S} ) and the square wave (V _C3 ) have different values is generated _{as a differential wave (D 4 )} do.

The second phase difference determining module 1140 is based on the differential wave D ₃ generated by the third differential wave generator 1120 and the differential wave D _{4 generated by the fourth differential wave generator 1130 .} A phase difference between the pass AC voltage (V _B ) and the output AC voltage (V _{I2 ) of the second inverter is determined.}

In an embodiment of the present invention, the second phase difference determining module 1140 includes a third average filter 1141 , a fourth average filter 1142 , a second analog-to-digital converter 1143 , and a second phase difference separator 1144 . ) can be composed of

The third average filter 1141 converts the differential wave D _{3 generated by the third differential wave generator 1120 into a DC wave A 3} representing the average value of the differential wave D ₃ , and the fourth average The filter 1142 converts the differential wave D _{4 generated by the fourth differential wave generator 1130 into a DC wave A 4} representing the average value of the differential wave D ₄ .

The second analog-to-digital converter 1143 receives the DC wave A _{3 converted by the third averaging filter 1141 and the DC wave A 4} converted by the fourth averaging filter 1142 and receives each DC waves (A ₃ and A ₄ ) are converted to digital values and constant values (C ₃ and C ₄ ) are output.

The second phase difference discriminator 1144 bypasses the phase difference discriminator 264 based on the constant values C3 and C4 output by the second analog-to-digital converter 1143 according to the algorithm of the table shown in FIG. 9 . A phase difference (θ) between the AC voltage (V _B ) and the inverter output AC voltage (V _{I2 ) is determined.}

The second inverter controller 1150 is shown in FIG. 9 based on the phase difference θ _{between the bypass AC voltage V B} and the second inverter output AC voltage V _{I2 determined by the second phase difference separator 1144} The phase of the second inverter output AC voltage (V _{I2 ) is controlled according to the algorithm of the table shown.}

According to the phase synchronous device 100 of the uninterruptible power supply device operating in parallel according to the present embodiment, the bypass AC voltage (V _B ) and the first inverter output AC voltage (V _I1 ) by the first inverter controller 270 are Synchronized, and the bypass AC voltage (V _B ) and the inverter output AC voltage (V _I2 ) are synchronized by the second inverter controller 1150, so that the bypass AC voltage (V _B ), the first inverter output AC voltage ( V _I1 ) and the second inverter output AC voltage (V _I2 ) are synchronized.

On the other hand, it is determined that the power failure situation does not receive power from an external power source for supplying power to an uninterruptible power supply by the power failure determination circuit 1160 is generated, whereby a first in place of the by-pass AC voltage (V _B) in accordance with When any one of the inverter output AC voltage (V _I1 ) or the second inverter output AC voltage (V _I2 ) is converted by the first comparator 210 in advance, the phase of any one preset inverter output voltage is Since the phases of the output voltages of the other inverter are synchronized by following, the phases of the output voltages of the two inverters of the uninterruptible power supply operating in parallel can be operated in synchronization with each other.

According to the phase synchronization device 100 of the uninterruptible power supply device operating in parallel according to the present embodiment, even in the uninterruptible power supply device operating in parallel, a circulating current is not generated between the first inverter 1030 and the second inverter 1040. It is possible to stably switch from bypass operation mode to inverter operation mode, and even in the event of a power outage, one of the two inverters uses one of the two inverters as a reference voltage to follow the phase of the voltage of the other inverter. can supply

So far, preferred embodiments of the present invention have been mainly looked at. Those of ordinary skill in the art to which the present invention pertains will understand that the present invention can be implemented in a modified form without departing from the essential characteristics of the present invention. Therefore, the disclosed embodiments are to be considered in an illustrative rather than a restrictive sense. The scope of the present invention is indicated in the claims rather than the above description, and all differences within the scope equivalent thereto should be construed as being included in the present invention.

100: phase-locked device
110: rectifier
120: inverter
210, 220: first comparator, second comparator
230: phase shifter
240, 250: a first differential waveform generator, a second differential waveform generator
261, 262: first average filter, second average filter
263: analog-to-digital converter
264: phase difference detector
270: inverter controller

Claims (11)

A phase synchronization device for an uninterruptible power supply, comprising:
a first comparator for converting a waveform of a bypass AC voltage from an external AC power supply for supplying power to the uninterruptible power supply device into a square wave (V _{C1 );}
a second comparator for converting the output AC voltage waveform of the first inverter of the uninterruptible power supply into a square wave (V _{C2 );}
a phase shifter for shifting the phase of the square wave converted by the first comparator (V _{C1 );}
a first difference wave generator for generating a _{difference wave (D 1} ) representing a difference between the square wave converted by the first comparator (V _C1 ) and the square wave converted by the second comparator (V _{C2 );}
a second differential wave generator that generates a _{differential wave D 2} representing a difference between the phase shifted square wave V _S by the phase shifter and the square wave V _{C2 converted by the second comparator;}
The first difference is derived a difference file generated by the group (D ₁₎ and the second difference is derived on the basis of the difference wave (D ₂₎ produced by the group the bypass AC voltage to the first output AC voltage of the inverter. a first phase difference determining module for determining a phase difference between the
and a first inverter controller controlling the phase of the output AC voltage of the first inverter according to the phase difference determined by the first phase difference determining module. The method of claim 1,
_{The square wave V C1} converted by the first comparator has a high value in a time section in which the waveform of the bypass AC voltage is greater than the zero potential, and a low value in a time section smaller than the zero potential. has a spherical wave,
_{The square wave V C2} converted by the second comparator has the high value in a time section in which the waveform of the output AC voltage of the first inverter is greater than the zero potential, and in a time section smaller than the zero potential. A phase-locked device, characterized in that the square wave having the low value. The method of claim 1,
The phase shifted square wave (V _S ) by the phase shifter is a phase-locked device, characterized in that the phase of the square wave (V _{C1 ) converted by the first comparator is shifted by 90°.} The method of claim 1,
_{The differential wave D 1} generated by the first differential wave generator is a time interval in which the square wave V _C1 converted by the first comparator and the square wave V _{C2 converted by the second comparator have the same value.} has a value of 0, and is a square wave having a value of 1 in a time interval in which the values of the square _{wave (V C1} ) converted by the first comparator and the square wave (V _{C2 ) converted by the second comparator are different,
The differential wave D 2} generated by the second differential wave generator _{has the same value of the square wave V C2} converted by the second comparator and the square wave V _S shifted by the phase shifter in the same time interval. It has a value of 0 and is a square wave having a value of 1 in a time interval in which the values of the square _{wave V C2} converted by the second comparator and the square wave V _{S shifted by the phase shifter are different.} phase-locked device. The method of claim 1,
The first phase difference determination module of the first differential derivative produced by the group difference wave (D ₁₎ and the second difference derives the resulting difference by the group wave (D ₂₎ to the bypass flow based on the respective average values A phase-locking device, characterized in that the phase difference between the voltage and the output AC voltage of the first inverter is determined. 6. The method of claim 5,
The first phase difference determining module is
a first average filter for converting _{the differential wave D 1} generated by the first differential wave generator into a DC wave A ₁ representing an average value of the differential wave D _{1 ;} and
and a second average filter for converting _{the differential wave D 2} generated by the second differential wave generator into a DC wave A ₂ representing the average value of the differential wave D _{2 .} device. 7. The method of claim 6,
The first phase difference determining module is
First analog-digital converting _{each of the DC wave (A 1} ) converted by the first average filter and the DC wave (A ₂ ) converted by the second average filter into digital signals (C ₁ , C _{2 )} further comprising a converter;
The digital signal C ₁ represents an average value of _{the DC wave A 1} converted by the first average filter, _{and the digital signal C 2 is the DC wave A 2} converted by the second average filter. ) A phase-locked device, characterized in that it represents the average value of. 8. The method of claim 7,
The first phase difference determining module is
A first for determining a phase difference between the bypass AC voltage and the output AC voltage of the first inverter based on the magnitude of the average value represented by each _{of the digital signals C 1} , C ₂ converted by the first analog-to-digital converter phase difference detector; and
The output AC voltage of the first inverter is obtained by shifting the phase of the output AC voltage of the first inverter based on the phase difference between the bypass AC voltage determined by the first phase difference separator and the output AC voltage of the first inverter. Phase-locking device, characterized in that it further comprises a first inverter controller for synchronizing by following the bypass AC voltage. The method of claim 1,
a third comparator for converting the output AC voltage waveform of the second inverter of the uninterruptible power supply into a square wave (V _{C3 );}
a third differential wave generator that generates a _{differential wave D 3} representing a difference between the _{square wave V C1} converted by the first comparator and the square wave V _{C3 converted by the third comparator;
a fourth} differential wave generator for generating a differential wave D 4 representing a difference between the phase shifted square wave V _S by the phase shifter and the square wave V _{C3 converted by the third comparator;}
The bypass AC voltage and the output AC voltage of the second inverter based _{on the differential wave D 3} generated by the third differential wave _{generator and the differential wave D 4} generated by the fourth differential wave generator a second phase difference determination module for determining a phase difference between the two;
and a second inverter controller for controlling the phase of the output AC voltage of the second inverter according to the phase difference determined by the second phase difference determining module. 10. The method of claim 9,
Further comprising a power failure determination circuit for determining whether the power outage of the external AC power supply to the uninterruptible power supply device,
The waveform of any one of the bypass AC voltage, the output AC voltage of the first inverter, and the output AC voltage of the second inverter is displayed on the basis of whether the external AC power is outage determined by the power failure discrimination circuit. A phase-locked device, characterized in that it is converted by a first comparator. 11. The method of claim 10,
by the electrostatic discrimination circuit
When it is determined that the external AC power is not a power failure, the waveform of the bypass AC voltage is converted by the first comparator,
When it is determined that the external AC power is blackout, the waveform of any one preset voltage among the output AC voltage of the first inverter or the output AC voltage of the second inverter is converted by the first comparator phase-locked device.

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