KR102254524B1 - Organic light emitting diode display device - Google Patents

Abstract

The present invention discloses an organic light emitting display device. In the disclosed organic light emitting display device of the present invention, a gate electrode is formed on a substrate, and a gate insulating film is formed on the substrate on which the gate electrode is formed. In addition, a semiconductor layer is formed on the gate insulating layer, and an etch stop layer is formed on the semiconductor layer.
A source electrode and a drain electrode formed on the etch stop layer, overlapped with the semiconductor layer, and formed of a transparent conductive layer, a first metal layer, and a second metal layer are formed. Through this, there is an effect of improving the device characteristics of the thin film transistor.

Description

Organic light emitting diode display device

The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device capable of improving the device characteristics of the organic light emitting display device.

Recently, various display devices capable of reducing the weight and volume, which are disadvantages of a cathode ray tube, have been developed. Such display devices include a liquid crystal display (Liquid Crystal Display: hereinafter referred to as "LCD"), a field emission display (FED), a plasma display panel (hereinafter referred to as "PDP"), and electroluminescence. Device (Electroluminescence Device).

Electroluminescent devices are roughly classified into inorganic light emitting diode displays and organic light emitting diode displays according to the material of the light emitting layer. As a self-luminous device that emits light, it has a fast response speed and great luminous efficiency, luminance, and viewing angle.

An organic electroluminescent device, one of the electroluminescent devices, has high luminance and low operating voltage characteristics. In addition, since it is a self-luminous type that emits light by itself, it has a large contrast ratio, can implement an ultra-thin display, and it is easy to implement moving images with a response time of several microseconds (µs), and there is no limit on the viewing angle, and is stable even at low temperatures. There is an advantage.

The organic light emitting device is largely composed of an array device and an organic light emitting diode. The array device includes a switching thin film transistor connected to a gate and a data line, and a driving thin film transistor connected to an organic light emitting device. In addition, the organic light emitting device includes a first electrode connected to the driving thin film transistor, an organic light emitting layer, and a second electrode.

The thin film transistor includes a gate electrode, a gate insulating layer, a semiconductor layer, an etch stop layer, a source electrode, and a drain electrode. Here, the semiconductor layer and the source electrode are formed in contact with each other, and the semiconductor layer and the drain electrode are formed in contact with each other.

However, as the thin film transistor is driven, an interface reactant is formed at the interface between the semiconductor layer and the source electrode and the interface between the semiconductor layer and the drain electrode. Accordingly, there is a problem in that the interface resistance between the semiconductor layer and the source electrode and the drain electrode increases. In addition, the source electrode and drain electrode materials diffuse into the semiconductor layer, thereby reducing device reliability.

An object of the present invention is to improve device characteristics of an organic light emitting display device by forming a source electrode and a drain electrode into a triple layer including a transparent conductive layer, a first metal layer, and a second metal layer.

In the organic light emitting display device according to the present invention for solving the problems of the prior art as described above, a gate electrode is formed on a substrate, and a gate insulating film is formed on the substrate on which the gate electrode is formed. In addition, a semiconductor layer is formed on the gate insulating layer, and an etch stop layer is formed on the semiconductor layer.

A source electrode and a drain electrode formed on the etch stop layer, overlapped with the semiconductor layer, and formed of a transparent conductive layer, a first metal layer, and a second metal layer are formed. Through this, it is characterized by improving the device characteristics of the thin film transistor.

The organic light emitting display device according to the present invention is effective in improving the device characteristics of the organic light emitting display device by forming the source electrode and the drain electrode as a triple layer including a transparent conductive layer, a first metal layer, and a second metal layer. have.

1 is a cross-sectional view illustrating a conventional organic light emitting display device.
2 is a plan view illustrating an organic light emitting display device according to an exemplary embodiment of the present invention.
3 is a diagram illustrating a cross-sectional view taken along line II′ of an organic light emitting display device according to an exemplary embodiment of the present invention.
4 is a cross-sectional view illustrating an organic light emitting display device according to an exemplary embodiment of the present invention.
5 is a diagram showing a characteristic of a positive bias deterioration (PBTS) according to a comparative example.
6 is a diagram showing a positive bias deterioration characteristic according to an exemplary embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are provided as examples in order to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In addition, in the drawings, the size and thickness of the device may be exaggerated for convenience. The same reference numbers throughout the specification indicate the same elements.

1 is a cross-sectional view illustrating a conventional organic light emitting display device. Referring to FIG. 1, a conventional organic light emitting display device includes a thin film transistor formed on a substrate 100. In this case, the thin film transistor includes a gate electrode 101, a gate insulating layer 102, a semiconductor layer 103, an etch stop layer 104, a source electrode 18, and a drain electrode 12. In addition, a protective layer 113 may be further formed on the source electrode 18 and the drain electrode 12.

Here, the source electrode 18 and the drain electrode 12 may be formed of a double layer. In this case, the source electrode 18 and the drain electrode 12 may include a first layer 16 and 10 and a second layer 17 and 11 formed on the first layer 16 and 10. . The first layers 16 and 10 and the second layers 17 and 11 may be made of metal.

Here, due to a reaction at the interface between the semiconductor layer 103 and the source electrode 18 or the interface between the semiconductor layer 103 and the drain electrode 12, between the semiconductor layer 103 and the source electrode 18 Alternatively, an interfacial reactant may be formed between the semiconductor layer 103 and the drain electrode 12. The interfacial reactant may be a metal oxide. For example, it may be _{TiO x.} For this reason, the interface resistance can increase.

In addition, due to thermal energy during the process of forming the protective layer formed on the source electrode 18 and the drain electrode 12, the material of the source electrode 18 and the drain electrode 12 is transferred to the semiconductor layer 103. It can spread and enter. For this reason, the reliability of the device can be lowered.

Therefore, in order to maintain the device specificity of the organic light emitting display device, the reaction at the interface between the source electrode 18 and the semiconductor layer 103 or the interface between the drain electrode 12 and the semiconductor layer 103 must be suppressed. do. Next, an organic light emitting display device for suppressing an interface reaction between a semiconductor layer and a source electrode and a drain electrode according to the present invention will be described with reference to FIG. 2.

2 is a plan view illustrating an organic light emitting display device according to an exemplary embodiment of the present invention. Referring to FIG. 2, the organic light emitting display device of the present invention includes a plurality of pixel areas defined to display an image, and each pixel area includes a driver and a pixel portion.

The pixel region is defined by crossing the gate wiring 20 and the data wiring 10 on the substrate 100. In addition, a driver including a thin film transistor Tr is formed in the crossing region. A pixel portion including an organic light-emitting device including a first electrode 115, an organic light-emitting layer, and a second electrode is formed above the driving unit.

The thin film transistor Tr includes a gate electrode 101, a semiconductor layer 103, a source electrode 108, and a drain electrode 112. In detail, the gate electrode 101 is formed on the substrate 100. A gate insulating film is formed on a substrate including the gate electrode 101, and a semiconductor layer 103 is formed on the gate insulating film.

Here, the semiconductor layer 103 may be formed of an oxide semiconductor. For example, the oxide semiconductor may be a material formed from Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Gallium Oxide (IGO), In ₂ O _{3 or a combination thereof.} Preferably, the oxide semiconductor may be formed of IGZO. The oxide semiconductor has high transmittance and high electron mobility.

In addition, an etch stop layer may be formed on the semiconductor layer 103. The source electrode 108 and the drain electrode 112 overlapping the etch stop layer and the semiconductor layer 103 may be disposed to be spaced apart from each other.

The source electrode 108 and the drain electrode 112 may be formed of various materials. For example, it may be an alloy formed from Cu, Ag, Al, Cr, Ti, Ta, or a combination thereof.

Further, a protective layer and a planarization layer may be further formed on the substrate including the thin film transistor Tr to cover the thin film transistor Tr. A contact hole exposing the drain electrode 112 is formed on the passivation layer and the planarization layer. The drain electrode 112 and the first electrode 115 may be electrically connected through the contact hole.

Although not shown in the drawing, a second electrode disposed to face the first electrode 115 may be formed. In addition, by disposing an organic light emitting layer between the first electrode 115 and the second electrode, an organic light emitting device including the first electrode 115, the second electrode, and the organic light emitting layer may be formed.

In order to solve the conventional problem, the organic light emitting display device according to the present invention includes the source electrode 108 and the drain electrode 112 formed in three layers. In detail, the source electrode 108 and the drain electrode 112 may have an interface reaction inhibiting layer and a first metal layer formed on the interface reaction inhibiting layer, and a second metal layer formed on the first metal layer.

In this case, the interfacial reaction inhibiting layer may be indium tin oxide (ITO). The interfacial reaction inhibiting layer has an effect of suppressing the formation of an interfacial reactant between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112.

The thickness of the interfacial reaction inhibiting layer may be 100 Å to 200 Å. When the thickness of the interfacial reaction inhibiting layer is less than 100 Å, it is difficult to uniformly form the thickness of the interfacial reaction inhibiting layer. In addition, when the thickness of the interfacial reaction inhibiting layer exceeds 200 Å, residue may occur in the etching process of the interfacial reaction inhibiting layer.

In addition, the first metal layer may be formed of an alloy of Mo and Ti. In addition, the second metal layer may be formed of Cu. In this case, the first metal layer may serve to prevent diffusion of the second metal layer material. That is, by forming MoTi under the Cu layer, diffusion of Cu is prevented. In addition, when the second metal layer is formed of Cu, high device characteristics may be secured due to the low resistance of Cu.

Although not shown in the drawing, a protective layer may be formed on the substrate 100 on which the source electrode 108 and the drain electrode 112 are formed. The protective layer may serve to protect the source electrode 108 and the drain electrode 112.

In the organic light emitting display device according to the present invention, the source electrode 108 and the drain electrode 112 formed by overlapping the semiconductor layer 103 are formed as a triple layer consisting of an interfacial reaction inhibiting layer, a first metal layer, and a second metal layer. By doing so, there is an effect of suppressing the formation of an interfacial reactant at the interface between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112. In addition, there is an effect of preventing the material of the source electrode 108 and the drain electrode 112 from being diffused into the semiconductor layer 103. This will be described with reference to FIG. 3, which is a cross-sectional view taken along line II′.

3 is a diagram illustrating a cross-sectional view taken along line II′ of an organic light emitting display device according to an exemplary embodiment of the present invention. Referring to FIG. 3, a gate electrode 101 is formed on a substrate 100. The gate electrode 101 may be an alloy formed from Cu, Mo, Al, Ag, Ti, or a combination thereof. In addition, although it is formed as a single metal layer in the drawing, it may be formed by stacking at least two or more metal layers in some cases. The alloy formed from Cu, Mo, Al, Ag, Ti, or a combination thereof has a low resistance effect.

A gate insulating layer 102 is formed on the gate electrode 101. The gate insulating layer 102 may serve to protect the gate electrode 101. A semiconductor layer 103 is formed on the gate insulating layer 102.

The semiconductor layer 103 may be formed of an oxide semiconductor. The oxide semiconductor may be a material formed from Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Gallium Oxide (IGO), In ₂ O _{3 or a combination thereof.} Preferably, the oxide semiconductor may be formed of IGZO.

An etch stop layer 104 is formed on the semiconductor layer 103. The etch stop layer 104 may be formed of an inorganic insulating material such as _{SiO 2} or SiN _x. Through this, it is possible to prevent the semiconductor layer 103 from being etched in the process of etching the source electrode 108 and the drain electrode 112.

The etch stop layer 104 and the semiconductor layer 103 may be overlapped so that the source electrode 108 and the drain electrode 112 may be formed to be spaced apart from each other. The source electrode 108 and the drain electrode 112 may be formed of the same material on the same layer.

In this case, the source electrode 108 and the drain electrode 112 may be formed in a triple layer. In detail, the interfacial reaction inhibiting layers 105 and 109, the first metal layers 106 and 110 formed on the interfacial reaction inhibiting layers 105 and 109, and the second metal layers 107 and 111 formed on the first metal layers 106 and 110 may be formed. have.

Here, the interfacial reaction inhibiting layers 105 and 109 may be indium tin oxide (ITO). The interfacial reaction inhibiting layer has an effect of suppressing formation of an interfacial reactant between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112.

The interfacial reaction inhibiting layers 105 and 109 may have a thickness of 100 Å to 200 Å. When the thickness of the interfacial reaction inhibiting layers 105 and 109 is less than 100 Å, it is difficult to uniformly form the thickness of the interfacial reaction inhibiting layers 105 and 109. In addition, when the thickness of the interfacial reaction inhibiting layers 105 and 109 exceeds 200 Å, residues may be generated in the etching process of the interfacial reaction inhibiting layers 105 and 109.

In addition, the first metal layers 106 and 110 may be formed of an alloy of Mo and Ti. In addition, the second metal layers 107 and 111 may be formed of Cu. In this case, the first metal layers 106 and 110 may serve to prevent diffusion of the material of the second metal layers 107 and 111.

A protective layer 113 may be formed on the substrate 100 on which the source electrode 108 and the drain electrode 112 are formed. The protective layer 113 may serve to protect the source electrode 108 and the drain electrode 112. In addition, the passivation layer 113 may play a role of supplementing a taper phenomenon or a void generated in a process of forming the source electrode 108 and the drain electrode 112.

In the organic light emitting display device according to the present invention, the source electrode 108 and the drain electrode 112 formed by overlapping the semiconductor layer 103 are formed as a triple layer consisting of an interfacial reaction inhibiting layer, a first metal layer, and a second metal layer. By doing so, there is an effect of suppressing the formation of an interfacial reactant at the interface between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112. In addition, there is an effect of preventing diffusion of the material of the source electrode 108 and the drain electrode 112 into the semiconductor layer 103.

Next, an organic light emitting display device according to an embodiment of the present invention will be described with reference to FIG. 4. 4 is a cross-sectional view illustrating an organic light emitting display device according to an exemplary embodiment of the present invention. Referring to FIG. 4, the organic light emitting display device according to the present invention includes a thin film transistor Tr and organic light emitting devices 115, 117, and 118.

The thin film transistor Tr includes a gate electrode 101, a semiconductor layer 103, a source electrode 108, and a drain electrode 112. In addition, the organic light emitting diodes 115, 117, and 118 include a first electrode 115 formed in contact with the drain electrode 112, a second electrode 118 disposed to face the first electrode, and the first electrode. It includes an organic light emitting layer 117 disposed between the second electrodes.

In detail, the gate electrode 101 is formed on the substrate 100. The gate electrode 101 may be an alloy formed from Cu, Mo, Al, Ag, Ti, or a combination thereof. In addition, although it is formed as a single metal layer in the drawing, it may be formed by stacking at least two or more metal layers in some cases. The alloy formed from Cu, Mo, Al, Ag, Ti, or a combination thereof has a low resistance effect.

A gate insulating layer 102 is formed on the gate electrode 101. A semiconductor layer 103 is formed on the gate insulating layer 102. Here, the semiconductor layer 103 may be formed of an oxide semiconductor.

The oxide semiconductor may be a material formed from Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Gallium Oxide (IGO), In ₂ O _{3 or a combination thereof.} Preferably, the oxide semiconductor may be formed of IGZO.

An etch stop layer 104 is formed on the semiconductor layer 103 layer. The etch stop layer 104 may be formed of an inorganic insulating material such as _{SiO 2} or SiN _x.

The etch stop layer 104 and the semiconductor layer 103 may be overlapped so that the source electrode 108 and the drain electrode 112 may be formed to be spaced apart from each other. The source electrode 108 and the drain electrode 112 may be formed of the same material on the same layer.

In this case, the source electrode 108 and the drain electrode 112 may be formed in a triple layer. In detail, the interfacial reaction inhibiting layers 105 and 109, the first metal layers 106 and 110 formed on the interfacial reaction inhibiting layers 105 and 109, and the second metal layers 107 and 111 formed on the first metal layer may be formed.

Here, the interfacial reaction inhibiting layers 105 and 109 may be indium tin oxide (ITO). The interfacial reaction inhibiting layer has an effect of suppressing formation of an interfacial reactant between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112.

The interfacial reaction inhibiting layers 105 and 109 may have a thickness of 100 Å to 200 Å. When the thickness of the interfacial reaction inhibiting layers 105 and 109 is less than 100 Å, it is difficult to uniformly form the thickness of the interfacial reaction inhibiting layers 105 and 109. In addition, when the thickness of the interfacial reaction inhibiting layers 105 and 109 exceeds 200 Å, residues may be generated in the etching process of the interfacial reaction inhibiting layers 105 and 109.

In addition, the first metal layers 106 and 110 may be formed of an alloy of Mo and Ti. In addition, the second metal layers 107 and 111 may be formed of Cu. In addition, it is possible to prevent the material forming the source electrode 108 and the drain electrode 112 from being diffused into the semiconductor layer 103. The first metal layer may prevent diffusion of the second metal layer material. With this configuration, the thin film transistor Tr including the gate electrode 101, the semiconductor layer 103, the source electrode 108, and the drain electrode 112 may be formed.

A protective film 113 is formed on the substrate 100 on which the source electrode 108 and the drain electrode 112 are formed. A planarization layer 114 for flattening the substrate 100 is formed on the passivation layer 113. A contact hole exposing the drain electrode 112 is formed on the planarization layer 114 and the protective layer 113.

The first electrode 115 of the organic light emitting device connected to the drain electrode 112 through the contact hole is formed on a part of the top surface of the planarization layer 114. Here, the first electrode 115 may be an anode electrode. However, the first electrode 115 is not limited thereto, and the first electrode 115 may be a cathode. Hereinafter, an embodiment in which the first electrode 115 is an anode will be described.

The first electrode 115 may be formed of a single layer made of a transparent conductive material having a relatively high work function value. Accordingly, a bottom emission type organic light emitting display device emitting light from the second electrode to the first electrode 115 may be implemented.

In addition, a reflective layer may be further included under the first electrode 115. Accordingly, a top emission type organic light emitting display device may be implemented in which light emitted from the second electrode to the first electrode 115 is reflected to emit light upward.

The shape of the first electrode 115 is not limited to the drawings, and the first electrode 115 may be formed in multiple layers. For example, it may be formed in a triple-layer structure in which a second layer is formed on the first layer and a third layer is formed on the second layer.

Here, the first layer and the third layer may be a transparent conductive material. For example, the transparent conductive material may be ITO or IZO. The second layer may be a reflective layer. In this case, the second layer may be a metal or metal alloy layer. For example, it may be a metal alloy layer containing Ag or Ag. Through this, the organic light-emitting device may reflect light emitted from the second electrode to the first electrode 115 to implement a top emission type organic light-emitting display device.

A bank pattern 116 may be formed on the planarization layer 114 on which the first electrode 115 is formed. In this case, the bank pattern 116 may define an emission area and a non-emission area. In addition, it may serve to isolate the organic emission layer emitting a specific color for each pixel. The bank pattern 116 may be formed by exposing a part of the upper surface of the first electrode 115 in the emission area.

An organic light emitting layer 117 is formed on the first electrode 115 where a part of the upper surface is exposed. The organic light emitting layer 117 may be formed of a single layer made of a light emitting material.

In addition, the organic light emitting layer 117 is a hole injection layer (HIL), a hole transporting layer (HTL), an emitting layer (Emitting Material Layer (EML)), an electron transporting layer (electron transporting layer) in order to increase the luminous efficiency. ) And an electron injection layer.

A second electrode 118 may be formed on the substrate 100 on which the organic emission layer 117 and the bank pattern 116 are formed to face the first electrode 115. In this case, the second electrode 118 may be a cathode electrode. With this configuration, an organic light emitting device including the first electrode 115, the second electrode 118, and the organic light emitting layer 117 may be formed.

In the organic light emitting display device according to the present invention, the source electrode 108 and the drain electrode 112 formed by overlapping the semiconductor layer 103 are formed as a triple layer consisting of an interfacial reaction inhibiting layer, a first metal layer, and a second metal layer. By doing so, the formation of an interfacial reactant at the interface between the semiconductor layer 103 and the source electrode 108 and the drain electrode 112 is suppressed, and the material of the source electrode 108 and the drain electrode 112 is applied to the semiconductor layer 103 ), it has the effect of preventing it from spreading.

Next, an interface reaction between a semiconductor layer and a source electrode or a drain electrode according to Comparative Examples and Examples will be described in detail with reference to FIGS. 5 to 6. 5 is a diagram showing positive bias temperature stress (PBTS) characteristics according to a comparative example. 6 is a diagram showing a positive bias deterioration characteristic according to an exemplary embodiment of the present invention.

The PBTS test is a measurement method in which the threshold voltage shift (Vth shift) of the oxide thin film transistor is induced depending on the bias temperature illumination stress (BTIS) environment. The PBTS test can measure the reliability of the specimen by applying harsh energy to the specimen.

5 is a comparative example, showing the voltage versus current characteristics of the specimen before and after the PBTS test. Here, as the specimen corresponding to the comparative example, a specimen in which a double-layered source electrode or a drain electrode was formed on a semiconductor layer was used.

In addition, Figure 6 shows the voltage versus current characteristics of the specimen before and after the PBTS test as an embodiment of the present invention. Here, as the specimen corresponding to the example, a specimen in which a triple layer source electrode or drain electrode was formed on a semiconductor layer was used.

In this case, the semiconductor layer of the specimen according to the comparative example is IGZO, and the source electrode or the drain electrode is formed of Cu on MoTi. In addition, the semiconductor layer of the specimen according to the embodiment is IGZO, the source electrode or the drain electrode is formed of MoTi on ITO having a thickness of 100 Å to 200 Å, and Cu is formed on the MoTi. A voltage of 30 V is applied to the specimens according to the Comparative Examples and Examples for ^{3600 seconds at a process temperature of 60 o C.}

Referring to FIG. 5, it can be observed that the threshold voltage between the semiconductor layer and the electrode before the PBTS test is about 0 V through the blue graph, and that the threshold voltage is about 5.51 V after the PBTS test through the red graph. In addition, referring to FIG. 6, it can be observed that the threshold voltage between the semiconductor layer and the electrode before the PBTS test is about 0 V through the blue graph, and that the threshold voltage is about 1.67 V after the PBTS test through the red graph.

That is, after the PBTS test, the graph of the specimen according to the comparative example has a larger width shifted to the right than the graph of the specimen according to the example. Therefore, it can be seen that the test piece according to the example has higher reliability than the test piece according to the comparative example. Accordingly, when the three-layered source electrode and the drain electrode according to the present invention are formed on an oxide semiconductor, there is an effect of increasing the reliability of the thin film transistor.

It will be appreciated by those skilled in the art through the above description that various changes and modifications can be made without departing from the technical idea of the present invention. Therefore, the technical scope of the present invention should not be limited to the content described in the detailed description of the specification, but should be determined by the claims.

100: substrate 10: data line
20: gate line 101: gate electrode
103: semiconductor layer 108: source electrode
112: drain electrode 115: first electrode

Claims (5)

Board;
A gate electrode on the substrate;
A gate insulating film on a substrate including the gate electrode;
A semiconductor layer on the gate insulating layer;
An etch stop layer on a portion of the semiconductor layer; And
A source electrode and a drain electrode disposed on both sides of the etch stop layer and in contact with both sides of the semiconductor layer,
The semiconductor layer is made of an oxide semiconductor of IGZO,
Each of the source electrode and the drain electrode includes an interfacial reaction inhibiting layer in contact with the semiconductor layer, a first metal layer on the interfacial reaction inhibiting layer, and a second metal layer on the first metal layer,
The interfacial reaction inhibiting layer is made of indium tin oxide (ITO) having a thickness of 100 Å to 200 Å,
The first metal layer is made of MoTi,
The second metal layer is an organic light emitting display device made of Cu. delete delete delete delete

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