KR102200973B1 - Liquid crystal display device and mother substrate for liquid crystal display device - Google Patents

Abstract

The present invention is divided into a display area and a pad area on the mother substrate in order to provide a mother substrate for a liquid crystal display device capable of eliminating shorting defects between circuits by allowing static electricity collected in a step compensation pattern to escape to the outside. A plurality of first substrates to be formed, a plurality of gate ICs formed in the pad region to supply a gate signal to a gate line, and a plurality of data ICs formed in the pad region to supply a data signal to a data line, and the gate A first step compensation pattern formed between a plurality of gate link wirings connecting a wiring and the gate IC, a plurality of data link wirings connecting the data wiring and the data IC, and the plurality of data link wirings, and an edge of the mother substrate It provides a mother substrate for a liquid crystal display device including a guide ring formed on the surface and a first barrier ring connected to the guide ring and surrounding the first step compensation pattern.

Description

Liquid crystal display device and mother substrate for liquid crystal display device

The present invention relates to a liquid crystal display device, and more specifically, to a mother substrate for a liquid crystal display device, in particular, a liquid crystal capable of preventing damage to the rubbing cloth due to a step difference in a pattern during rubbing, and reducing static electricity. It relates to a display device and a mother substrate for a liquid crystal display device.

As the information society develops, demands for display devices are increasing in various forms. In response to this, in recent years, various flat panel display devices including liquid crystal display devices (LCDs), plasma display panels (PDPs), and electroluminescent devices (ELDs) have been studied, and some Is already widely used as a display device.

Among them, a liquid crystal display device currently has advantages such as excellent image quality, light weight, thinness, and low power consumption, and accordingly, is rapidly replacing a CRT.

In addition, liquid crystal display devices have been developed in various ways such as monitors for notebook computers and display panels for televisions.

In addition, the liquid crystal display device includes a liquid crystal panel that displays an image and a driver that drives the liquid crystal panel. The liquid crystal panel includes an array substrate having a plurality of thin film transistors, a color filter substrate facing the array substrate and having a plurality of color filters corresponding to each thin film transistor, and a liquid crystal layer interposed between the substrates.

The liquid crystal panel includes an array substrate manufacturing process, a color filter manufacturing process, and bonding and liquid crystal injection processes.

A plurality of array substrates are manufactured from the first mother substrate divided into a plurality of array substrate regions and dummy regions by the array substrate manufacturing process. The array substrate manufacturing process includes a gate wiring, a gate electrode and a gate pad forming process, a gate insulating layer forming process, a semiconductor layer forming process, a data wiring, a source/drain electrode and a data pad forming process, a protective layer forming process, and a pixel electrode forming process. I can.

A plurality of color filter substrates are manufactured from the second mother substrate divided into a plurality of color filter substrate regions and dummy regions by the color filter substrate manufacturing process. The color filter substrate manufacturing process may include a black matrix formation process, a red, green, and blue color filter formation process, an overcoat layer formation process, and a common electrode formation process.

In the bonding and liquid crystal injection process, the first and second mother substrates are bonded so that the array substrate and the color filter substrate correspond to each other, and a panel including the array substrate and the color filter substrate is manufactured through cutting and processing processes, and liquid crystal is added to the panel. Injecting to finally manufacture a liquid crystal panel.

Although the above description is limited to a TN mode (twisted nematic mode) liquid crystal panel, the IPS mode liquid crystal panel is similar. That is, in the IPS mode liquid crystal panel, the common electrode is formed on the array substrate rather than the color filter substrate.

As described above, the array substrate or the color filter substrate requires a number of processes. In this case, static electricity may be generated by external or internal factors during each process.

However, conventionally, there is a problem in that such static electricity cannot be discharged to the outside. Accordingly, there is a problem in that the gate wiring or the data wiring is opened due to static electricity, causing pixel defects, and irregularities during driving due to such pixel defects.

In addition, in the related art, there is a problem that process contamination occurs due to such charge due to static electricity, resulting in a pattern defect.

The present invention has been devised to solve the above-described conventional problems, and an object of the present invention is to provide a mother substrate for a liquid crystal display device capable of preventing static electricity generated during a manufacturing process.

In order to achieve the above object, a plurality of first substrates formed by being divided into a display region and a pad region on the mother substrate, and a plurality of gate ICs formed in the pad region to supply gate signals to the gate wiring; A plurality of data ICs formed in the pad area to supply data signals to a data line, a plurality of gate link lines connecting the gate line and the gate IC, and a plurality of data links connecting the data line and the data IC A first step compensation pattern formed between a wiring and the plurality of data link wirings, a guide ring formed at an edge of the mother substrate, and

It provides a mother substrate for a liquid crystal display device including a first barrier ring surrounding the first step compensation pattern and connected to the guide ring.

In addition, a plurality of first substrates formed by being divided into a display region and a pad region on the mother substrate, a plurality of gate ICs formed in the pad region to supply gate signals to the gate wiring, and a plurality of gate ICs formed in the pad region to provide data Between a plurality of data ICs supplying data signals to a wiring, a plurality of gate link wirings connecting the gate wiring and the gate IC, and a plurality of data link wirings connecting the data wiring and the data IC and the plurality of gate link wirings It provides a mother substrate for a liquid crystal display device comprising a second step compensation pattern formed on the substrate, a guide ring formed at an edge of the mother substrate, and a second barrier ring surrounding the second step compensation pattern and connected to the guide ring. .

In addition, the first step compensation pattern is formed to be electrically floating on the same plane as the data link wiring.

In addition, the second step compensation pattern is formed to be electrically floating on the same plane as the gate link wiring.

In addition, a plurality of gate wirings arranged in a first direction in the display area;

A plurality of data lines arranged in a second direction perpendicular to the plurality of gate lines in the display area to define a plurality of pixels together with the plurality of gate lines, and a cross region of the plurality of gate lines and the plurality of data lines It provides a mother substrate for a liquid crystal display device further comprising a plurality of thin film transistors that are formed to switch each pixel.

The present invention is capable of preventing pattern defects by discharging static electricity induced by the guide ring to the outside by disposing a guide ring on the edge of the mother substrate to remove process contamination by charge due to static electricity. It works.

In addition, by forming a step compensation pattern to compensate for a step difference of the first substrate during the rubbing process, there is an effect of preventing damage to the rubbing cloth.

In addition, by forming the barrier, there is an effect of eliminating shorting defects between circuits by allowing static electricity accumulated in the step compensation pattern to escape to the outside.

1 is a plan view schematically showing a mother substrate for a liquid crystal display device according to a first embodiment of the present invention.
FIG. 2 is an enlarged plan view of part A of FIG. 1.
3 is a plan view schematically showing a mother substrate for a liquid crystal display device according to a second embodiment of the present invention.
4 is an enlarged plan view of portion A of FIG. 3.

Hereinafter, a preferred embodiment of the present invention will be described with reference to the drawings.

<First Example>

1 is a plan view schematically showing a mother substrate for a liquid crystal display device according to a first embodiment of the present invention.

As shown in FIG. 1, the mother substrate 100 is divided into a plurality of array substrate regions X1 in which the array substrate 112 is manufactured and a dummy region X2 in which the array substrate 112 is not manufactured.

The dummy area X2 refers to all areas except for the array substrate area X1.

In addition, the dummy region X2 is cut into a process key margin for setting the alignment of the mother substrate 100, a pad margin on which a gate pad or data pad is formed, and an array substrate 112. It may include a cutting margin for

In addition, a guide ring 114 and a contact pad 116 are disposed in the dummy area X2. That is, the guide ring 114 may be disposed along an edge region of the mother substrate 100, branched at predetermined intervals, and extended to the array substrate region X1.

In addition, the contact pad 116 may be disposed at each branching point.

In this case, the contact pad 116 may be integrally formed with the guide ring 114.

After the guide ring 114 is disposed on the mother substrate 100, a static electricity removing means, for example, a grounded probe, is in contact with the guide ring 114, specifically, the contact pad 116, to manufacture an array substrate. Static electricity generated in the process and induced by the guide ring 114 may be discharged to the outside through a probe.

The probe may be provided in process equipment for forming the guide ring 114 or may be provided separately.

In the above description, the probe is limited to contacting the contact pad 116, but when the width of the guide ring 114 is wide, there is no need to form the contact pad 116, and the probe directly contacts the guide ring 114. So that static electricity can be discharged to the outside.

Therefore, it should be noted that the contact pad 116 is required only when the guide ring 114 has a narrow width and thus the contact of the probe is not easy.

As described above, according to the present invention, after the guide ring 114 is disposed, static electricity induced by the guide ring 114 can be discharged to the outside using a probe.

Therefore, since the present invention can discharge static electricity to the outside from time to time, it prevents spot defects caused by opening of gate wiring or data wiring due to static electricity generated in each process, and furthermore, charge due to static electricity By removing process contamination caused by the pattern defects can be prevented.

FIG. 2 is an enlarged plan view of part A of FIG. 1.

As shown in FIG. 2, the mother substrate 100 for a liquid crystal display according to the first embodiment of the present invention includes a plurality of first substrates 112 formed by being divided into a display area AA and a pad area PA. , A plurality of gate ICs 145 (Gate integrated circuits, hereinafter referred to as gate ICs) formed in the pad area PA to supply a gate signal to a gate wiring (not shown), and in the pad area PA A plurality of data ICs 125 (data integrated circuit, hereinafter referred to as data ICs) that are formed and supply data signals to a data line (not shown), and connect the gate line (not shown) and the gate IC 145 A plurality of gate link lines 133, a plurality of data link lines 123 connecting the data line (not shown) and the data IC 125, the data line (not shown) and the plurality of data links A first step compensation pattern 124 formed between the wirings 123, a second step compensation pattern 135 formed between the gate wiring (not shown) and the plurality of gate link wirings 133, and the It comprises a guide ring 114 formed on the edge of the mother substrate 100.

In addition, a data signal wiring 127 connecting the plurality of data ICs 125 may be further included.

Although not shown in the drawings, in the display area PA of the first substrate 112 of the first embodiment of the present invention, a plurality of gate wirings arranged in a first direction and a second direction perpendicular to the plurality of gate wirings Thus, a plurality of data lines defining a plurality of pixels together with the plurality of gate lines, and a thin film transistor that is formed in an intersection region between the plurality of gate lines and the plurality of data lines to switch each pixel are formed.

In addition, the first or second step compensation patterns 124 and 135 are formed in the pad area PA of the first substrate 112 according to the first embodiment of the present invention. Hereinafter, the first and second step compensation patterns I will explain (124, 135).

An alignment layer for setting the initial alignment direction of liquid crystal molecules is formed on the first substrate 112, and the alignment layer is determined in a rubbing direction in the set direction through a rubbing process using a rubbing cloth. In this case, the first substrate 112 Sometimes the rubbing cloth is damaged due to the difference in the top.

Accordingly, the first and second step compensation patterns 124 and 135 enable compensation for the step difference of the first substrate 112 during the rubbing process.

In particular, damage to the rubbing fabric is prevented by compensating for a step difference between the data link wiring and the gate link wiring 123 and 133, which is a factor that damages the rubbing cloth at the beginning of the rubbing process.

For example, when rubbing is performed in parallel with the data line (not shown), the rubbing cloth will move in parallel along the data line (not shown) with the data link line 123 as a starting point.

At this time, if the rubbing cloth is damaged due to the step difference between the data wirings (not shown), the damaged rubbing cloth will continue to cause rubbing defects as it passes through the display area AA.

However, in the first embodiment of the present invention, the first step compensation pattern 124 is provided between the data link wirings 123 to compensate for the step difference of the data link wiring 123, thereby preventing damage to the rubbing cloth due to the step difference. prevent.

In addition, the first step compensation pattern 124 is formed between the data link wirings 123 to compensate for the step difference of the data link wiring 123. In this case, the first step compensation pattern 124 is the data link wiring 125 ) And is formed to be placed in an electrically floating state on the same plane.

When the rubbing direction is parallel to the gate wiring (not shown), the rubbing fabric is rubbed starting from the gate link wiring 133, and thus the second step compensation pattern 135 between the gate link wirings 133 Can be formed.

At this time, the second step compensation pattern 135 is formed to be electrically floating on the same plane as the gate link wiring 133.

As described above, the present invention is to prevent damage to the rubbing cloth caused by a step difference at the starting point where rubbing starts, and a step compensation pattern is provided in the data link unit or the gate link unit to compensate for the step difference. Is to do.

Accordingly, in the present invention, a step compensation pattern can be formed in the gate link unit or the data link unit according to the direction in which the rubbing cloth moves, that is, the rubbing direction, and the step compensation pattern is formed at any position under the condition of not shorting the link wirings. can do.

Next, in the mother substrate 100 of the first embodiment of the present invention, a guide ring 114 is formed to surround the edge of the mother substrate 100, and the guide ring 114 will be described below.

A guide ring 114 and a contact pad (116 in FIG. 1) are disposed in the dummy area X2 of the mother substrate 100. That is, the guide ring 114 may be disposed along an edge region of the mother substrate 100, branched at predetermined intervals, and extended to the array substrate region X1.

In addition, a contact pad (116 in FIG. 1) may be disposed at each branching point.

In this case, the contact pad (116 in FIG. 1) may be integrally formed with the guide ring (114).

After the guide ring 114 is disposed on the mother substrate 100, a static electricity removing means, such as a grounded probe, comes into contact with the guide ring 114, specifically, a contact pad (116 in FIG. 1), Static electricity generated in the array substrate manufacturing process and induced by the guide ring 114 may be discharged to the outside through a probe.

The probe may be provided in process equipment for forming the guide ring 114 or may be provided separately.

In the above description, the probe is limited to contacting the contact pad (116 in FIG. 1), but only when the width of the guide ring 114 is wide, it is not necessary to form the contact pad (116 in FIG. 1), and guide the probe directly. Static electricity can be discharged to the outside by contacting the ring 114.

Therefore, it should be noted that the contact pad (116 in FIG. 1) is required only when the width of the guide ring 114 is narrow and the contact of the probe is not easy.

As described above, according to the present invention, after the guide ring 114 is disposed, static electricity induced by the guide ring 114 can be discharged to the outside using a probe.

Therefore, since the present invention can discharge static electricity to the outside from time to time, it prevents spot defects caused by opening of gate wiring or data wiring due to static electricity generated in each process, and furthermore, charge due to static electricity By removing process contamination, pattern defects can be prevented.

Thereafter, in a subsequent process, the first substrate 112 is completed by cutting the mother substrate 100, at which time the guide ring 114 is removed.

<Second Example>

3 is a plan view schematically illustrating a mother substrate for a liquid crystal display device according to a second embodiment of the present invention.

As shown in FIG. 3, the mother substrate 200 is divided into a plurality of array substrate regions X1 in which the array substrate 212 is manufactured and a dummy region X2 in which the array substrate 212 is not manufactured.

The dummy area X2 refers to all areas except for the array substrate area X1.

In addition, the dummy region X2 is cut into a process key margin for setting the alignment of the mother substrate 200, a pad margin on which a gate pad or data pad is formed, and an array substrate 212. It may include a cutting margin for

In addition, a guide ring 214 and a contact pad 216 are disposed in the dummy area X2. That is, the guide ring 214 may be disposed along an edge region of the mother substrate 200, branched at predetermined intervals, and extended to the array substrate region X1.

In addition, a contact pad 216 may be disposed at each branching point.

In this case, the contact pad 216 may be integrally formed with the guide ring 214.

After the guide ring 214 is disposed on the mother substrate 200, a static electricity removing means, for example, a grounded probe, comes into contact with the guide ring 214, specifically, the contact pad 216, to manufacture an array substrate. Static electricity generated in the process and induced by the guide ring 214 may be discharged to the outside through the probe.

The probe may be provided in process equipment for forming the guide ring 214 or may be provided separately.

In the above description, the probe is limited to contacting the contact pad 216, but when the width of the guide ring 214 is wide, it is not necessary to form the contact pad 216, and the probe directly contacts the guide ring 214. So that static electricity can be discharged to the outside.

Therefore, it should be noted that the contact pad 216 is required only when the guide ring 214 has a narrow width and thus the contact of the probe is not easy.

As described above, according to the present invention, after the guide ring 214 is disposed, static electricity induced by the guide ring 214 can be discharged to the outside using a probe.

Therefore, since the present invention can discharge static electricity to the outside from time to time, it prevents spot defects caused by opening of gate wiring or data wiring due to static electricity generated in each process, and furthermore, charge due to static electricity By removing process contamination caused by the pattern defects can be prevented.

4 is an enlarged plan view of portion A of FIG. 3.

As shown in FIG. 4, the mother substrate 200 for a liquid crystal display according to the second embodiment of the present invention is divided into a display area AA and a pad area PA on the mother substrate 200. A first substrate 212, a plurality of gate ICs 245 formed in the pad region PA to supply a gate signal to a gate wiring (not shown), and the pad region PA A plurality of data ICs 225 (data integrated circuits) formed on and supplying a data signal to a data line (not shown), and a plurality of gate link lines connecting the gate line (not shown) and the gate IC 245 233, a plurality of data link wirings 223 connecting the data wiring (not shown) and the data IC 225, and a first step compensation pattern formed between the plurality of data link wirings 223 224, a guide ring 214 formed at an edge of the mother substrate 200, and a first barrier ring 250 surrounding the first step compensation pattern 224 and connected to the guide ring 214 It is made including.

In addition, the plurality of data ICs 225 are connected to a data signal wiring 227.

Alternatively, a plurality of first substrates 212 formed on the mother substrate 200 by being divided into a display area AA and a pad area PA, and a gate wiring (not shown) are formed in the pad area PA. A plurality of gate ICs 245 supplying a gate signal to the gate IC 245 and a plurality of data ICs 225 formed in the pad area PA to supply data signals to a data line (not shown) and the gate line (not shown) ) And a plurality of gate link lines 233 connecting the gate IC 245, and a second step compensation pattern 235 formed between the data line (not shown) and the plurality of gate link lines 233, A guide ring 214 formed at an edge of the mother substrate 200 and a second barrier ring 252 surrounding the second step compensation pattern 235 and connected to the guide ring 214 are included.

In addition, the plurality of data ICs 225 may be connected to the data signal wiring 227.

Although not shown in the drawing, in the display area PA of the first substrate 212 of the second embodiment of the present invention, a plurality of gate wirings arranged in a first direction and a second direction perpendicular to the plurality of gate wirings Thus, a plurality of data lines defining a plurality of pixels together with the plurality of gate lines, and a thin film transistor that is formed in an intersection region between the plurality of gate lines and the plurality of data lines to switch each pixel are formed.

In addition, the first or second step compensation patterns 224 and 235 are formed in the pad area PA of the first substrate 212 according to the second embodiment of the present invention. Hereinafter, the first and second step compensation patterns I will explain (224, 235).

An alignment layer is formed on the first substrate 212 to set the initial alignment direction of the liquid crystal molecules, and the alignment layer determines the rubbing direction in the set direction through a rubbing process using a rubbing cloth. In this case, the first substrate 212 Sometimes the rubbing cloth is damaged due to the difference in the top.

Accordingly, the first and second step compensation patterns 224 and 235 can compensate for the step difference of the first substrate 212 during the rubbing process.

In particular, damage to the rubbing fabric is prevented by compensating for a step difference between the data link wiring and the gate link wiring 223 and 233, which is a factor that damages the rubbing cloth at the beginning of the rubbing process.

For example, when rubbing is performed in parallel with the data line (not shown), the rubbing cloth will move in parallel along the data line (not shown) with the data link line 223 as a starting point.

At this time, if the rubbing cloth is damaged due to the step difference between the data wirings (not shown), the damaged rubbing cloth will continue to cause rubbing defects as it passes through the display area AA.

However, the second embodiment of the present invention provides a first step compensation pattern 224 between the data link wires 223 to compensate for the step difference of the data link wire 223, thereby preventing damage to the rubbing cloth due to the step difference. prevent.

In addition, the first step compensation pattern 224 is formed between the data link wirings 223 to compensate for the step difference of the data link wiring 223. In this case, the first step compensation pattern 224 is the data link wiring 225 ) And is formed to be placed in an electrically floating state on the same plane.

Accordingly, even if the first step compensation pattern 224 is formed, other signals are not affected.

When the rubbing direction is parallel to the gate wiring (not shown), the rubbing cloth is rubbed starting from the gate link wiring 233, and thus the second step compensation pattern 235 between the gate link wirings 233 Can be formed.

At this time, the second step compensation pattern 235 is formed to be electrically floating on the same plane as the gate link wiring 233.

Accordingly, even if the first step compensation pattern 235 is formed, other signals are not affected.

As described above, the present invention is to prevent damage to the rubbing cloth caused by a step difference at the starting point where rubbing starts, and a step compensation pattern is provided in the data link unit or the gate link unit to compensate for the step difference. Is to do.

Accordingly, in the present invention, a step compensation pattern can be formed in the gate link unit or the data link unit depending on the direction in which the rubbing cloth moves, that is, the rubbing direction, and the step compensation pattern is formed at any position under the condition that the link wirings are not shorted. can do.

Next, in the mother substrate 200 of the second embodiment of the present invention, a guide ring 214 is formed surrounding the edge of the mother substrate 200, and the guide ring 214 will be described below.

A guide ring 214 and a contact pad (216 in FIG. 3) are disposed in the dummy area X2 of the mother substrate 200. That is, the guide ring 214 may be disposed along an edge region of the mother substrate 200, branched at predetermined intervals, and extended to the array substrate region X1.

In addition, a contact pad (216 in FIG. 3) may be disposed at each branching point.

In this case, the contact pad (216 in FIG. 3) may be integrally formed with the guide ring 214.

After the guide ring 214 is disposed on the mother substrate 200, a static electricity removing means, such as a grounded probe, comes into contact with the guide ring 214, specifically a contact pad (216 in FIG. 3), Static electricity generated in the array substrate manufacturing process and induced by the guide ring 214 may be discharged to the outside through a probe.

The probe may be provided in process equipment for forming the guide ring 214 or may be provided separately.

In the above description, the probe is limited to contacting the contact pad (216 in FIG. 3), but only when the width of the guide ring 214 is wide, it is not necessary to form the contact pad (216 in FIG. 3), and guide the probe directly. Static electricity can be discharged to the outside by contacting the ring 214.

Therefore, it should be noted that the contact pad (216 in FIG. 3) is required only when the width of the guide ring 214 is narrow and the contact of the probe is not easy.

As described above, according to the present invention, after the guide ring 214 is disposed, static electricity induced by the guide ring 214 can be discharged to the outside using a probe.

Therefore, since the present invention can discharge static electricity to the outside from time to time, it prevents spot defects caused by opening of gate wiring or data wiring due to static electricity generated in each process, and furthermore, charge due to static electricity By removing process contamination, pattern defects can be prevented.

Next, in the dummy part area X2 of the mother substrate 200 of the second embodiment of the present invention, the first step compensation pattern 224 formed between the data signal wiring 227 is surrounded and connected to the guide ring 214. A second barrier ring 252 surrounding the first barrier ring 250 or the second step compensation pattern 224 and connected to the guide ring 214 is formed. Hereinafter, the first and second barrier rings ( 250, 252) will be explained.

As the first step compensation pattern 224 is formed in the pad area PA of the first substrate 212, the second exemplary embodiment of the present invention provides a first step compensation pattern formed between the data signal lines 227 ( By forming a first barrier ring 250 that surrounds 224 and is connected to the guide ring 214, static electricity accumulated in the first step compensation pattern 224 formed between the data signal wiring 227 may escape to the outside. So that short circuit defects between circuits can be eliminated.

In other words, static electricity accumulated in the first step compensation pattern 224 is guided to the guide ring 214 connected to the first barrier ring 250 through the first barrier ring 250, and the guide ring 214 or the contact pad Contact the probe to (216) to discharge static electricity to the outside.

In addition, as the second step compensation pattern 235 is formed in the pad area PA of the first substrate 212, static electricity accumulated in the second step compensation pattern 235 formed between the gate link wirings 233 Since there is no wiring through which static electricity can escape to the outside, short circuit failure between circuits may occur due to static electricity.

Accordingly, a second barrier ring 252 surrounding the second step compensation pattern 235 formed between the gate link wiring 233 and connected to the guide ring 214 is formed, thereby By allowing static electricity accumulated in the second step compensation pattern 235 formed in to escape to the outside, shorting failure between circuits can be eliminated.

In other words, static electricity accumulated in the second step compensation pattern 235 formed between the gate link wiring 233 is guided to the guide ring 214 connected to the second barrier ring 252 through the second barrier ring 252 , Electrostatic discharge is discharged to the outside by contacting the probe with the guide ring 214 or the contact pad 216.

Thereafter, in a subsequent process, the first substrate 212 is completed by cutting the mother substrate 200. At this time, the guide ring 214 is removed, and the first and second barrier rings 250, 252 ) Is placed in an electrically floating state.

The present invention is not limited to the above-described embodiments, and various changes and modifications are possible without departing from the spirit of the present invention.

200: mosquito board
212: first substrate
223: data link wiring
233: gate link wiring
227: data signal wiring
224, 235: first and second step compensation pattern
250, 252: first and second barriering
214: guide ring

Claims (9)

A plurality of first substrates formed on the mother substrate by being divided into a display region and a pad region;
An alignment layer formed on each of the plurality of first substrates and rubbed in a setting direction;
A plurality of gate ICs formed in the pad region to supply gate signals to the gate wiring;
A plurality of data ICs formed in the pad area to supply data signals to data lines;
A plurality of gate link lines connecting the gate lines and the gate IC;
A plurality of data link wirings connecting the data line and the data IC;
A guide ring formed at an edge of the mother substrate; And
A mother substrate for a liquid crystal display device comprising a step compensation pattern disposed in any one of a region between the plurality of data link lines and a region between the plurality of gate link lines along the rubbing direction of the alignment layer.
delete The method of claim 1,
The mother substrate for a liquid crystal display device, wherein the step compensation pattern is formed to be electrically floating on the same plane as the data link wiring or the gate link wiring.
delete The method of claim 1,
A plurality of gate wirings arranged in a first direction in the display area;
A plurality of data lines arranged in a second direction perpendicular to the plurality of gate lines in the display area to define a plurality of pixels together with the plurality of gate lines; And
A plurality of thin film transistors formed in an intersection region of the plurality of gate lines and the plurality of data lines to switch each pixel;
A mother substrate for a liquid crystal display device further comprising a.
The mother substrate according to claim 1, further comprising a contact pad formed on the guide ring.
The mother substrate for a liquid crystal display device according to claim 1, further comprising a barrier ring surrounding the step compensation pattern and connected to the guide ring.
A first substrate and a second substrate including a display area and a pad area;
A liquid crystal layer disposed between the first substrate and the second substrate;
An alignment layer formed on the first substrate and rubbed in a setting direction;
A gate IC disposed in the pad region of the first substrate to supply a gate signal to a gate line;
A data IC disposed in a pad area of the first substrate to supply a data signal to a data line;
A plurality of gate link lines connecting the gate lines and the gate IC;
A plurality of data link wirings connecting the data line and the data IC; And
A liquid crystal display device including a step compensation pattern disposed in one of a region between the plurality of data link lines and a region between the plurality of gate link lines along the rubbing direction of the alignment layer.
The method of claim 8,
And the step compensation pattern is formed to be electrically floating on the same plane as the data link line or the gate link line.

Images