KR102107832B1 - Micro Display - Google Patents

Abstract

The present invention provides a pixel of a micro display device. According to one embodiment of the present invention, the pixel of a micro display device comprises: a drive transistor; a voltage control transistor maintaining a turned-on state by a bias voltage applied to a gate terminal and controlling a drain voltage of the drive transistor; a first switching transistor transmitting a data signal to the gate terminal of the driver transistor; and a second switching transistor connected between the drive transistor and a light emitting element and controlling a flow of a current of the drive transistor. The micro display device may be driven with a low drive voltage.

Description

Micro display device

The present invention relates to a micro display device.

As the information society develops, demands for display devices displaying images are increasing, and liquid crystal display devices, plasma display devices, and organic light emitting display devices Various types of display devices, such as, are used. Recently, interest in a display device using a micro light emitting diode (μLED) (hereinafter referred to as a “micro display device”) is also increasing.

As excellent display device characteristics are required for VR (Virtual Reality), AR (Augmented Reality), and MR (Mixed Reality) technologies, the development of micro LED on Silicon or AMOLED on Silicon is increasing, especially pixel size for high resolution implementation. The demand for minimization is increasing.

An embodiment of the present invention provides a display device having a pixel circuit suitable for realizing high resolution.

In a micro display device including a plurality of pixels according to an embodiment of the present invention, each of the plurality of pixels, a driving transistor; A voltage control transistor maintaining a turn-on state by a bias voltage applied to the gate terminal and controlling a drain voltage of the driving transistor; A first switching transistor transferring a data signal to a gate terminal of the driving transistor; And a second switching transistor connected between the driving transistor and the light emitting element to control the current flow of the driving transistor.

The driving transistor may operate in a triode region.

The voltage control transistor may include a gate terminal connected to a bias line to which the bias voltage is applied, a first terminal connected to the second switching transistor, and a second terminal connected to a drain terminal of the driving transistor.

The voltage control transistor may be provided between the driving transistor and the second switching transistor.

The micro display may further include a bias voltage supply unit that generates and outputs the bias voltage to the gate terminal of the voltage control transistor.

The micro display device according to an exemplary embodiment of the present invention can secure uniformity with a small-sized driving transistor and can drive with a low driving voltage.

1 is a view schematically showing a manufacturing process of a display device according to an exemplary embodiment of the present invention.
2 is a view schematically showing a display device according to an exemplary embodiment of the present invention.
3 is an example of a pixel of the display device illustrated in FIG. 2.
4 is a diagram showing voltage (V _DS ) -current (I _DS ) characteristics according to a gate voltage of a transistor.
5 is a view schematically showing a configuration of a bias voltage supply unit according to an embodiment of the present invention.

The present invention can be applied to various transformations and can have various embodiments, and specific embodiments will be illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention and methods for achieving them will be clarified with reference to embodiments described below in detail with reference to the drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the same or corresponding components will be denoted by the same reference numerals when describing with reference to the drawings, and redundant description thereof will be omitted. .

In the following examples, terms such as first and second are not used in a limiting sense, but for the purpose of distinguishing one component from other components. In addition, in the following embodiments, the singular expression includes a plural expression unless the context clearly indicates otherwise.

In the following embodiments, when X and Y are connected, X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected. You can. Here, X and Y may be objects (eg, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.). Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship indicated in the drawings or detailed description, and may include other than the connection relationship indicated in the drawings or detailed description.

When X and Y are electrically connected, for example, an element (eg, a switch, transistor, capacitive element, inductor, resistance element, diode, etc.) that enables electrical connection between X and Y, It may include a case where one or more are connected between X and Y.

In the following embodiments, “ON” used in connection with the device state refers to the activated state of the device, and “OFF” refers to the deactivated state of the device. “On” used in connection with a signal received by the device may refer to a signal that activates the device, and “off” may refer to a signal that deactivates the device. The device can be activated by a high voltage or a low voltage. For example, a P-channel transistor is activated by a low voltage, and an N-channel transistor is activated by a high voltage. Therefore, it should be understood that the “on” voltages for the P-channel transistor and the N-channel transistor are opposite (low to high) voltage levels.

In the examples below, terms such as include or have are meant to mean the presence of features or components described in the specification, and do not preclude the possibility of adding one or more other features or components in advance.

1 is a view schematically showing a manufacturing process of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the display device 30 according to an exemplary embodiment may include a light emitting device array 10 and a driving circuit board 20. The light emitting element array 10 may be combined with the driving circuit board 20. The display device 30 may be a micro display device.

The light emitting device array 10 may include a plurality of light emitting devices. The light emitting device may be a light emitting diode (LED). The light emitting device may be a light emitting diode (LED) having a size of micro to nano units. At least one light emitting device array 10 can be manufactured by growing a plurality of light emitting diodes on a semiconductor wafer. Therefore, the display device 30 can be manufactured by combining the light emitting element array 10 with the driving circuit board 20 without having to separately transfer the light emitting diodes to the driving circuit board 20.

A pixel circuit corresponding to each of the light emitting diodes on the light emitting element array 10 may be arranged on the driving circuit board 20. The light emitting diode on the light emitting element array 10 and the pixel circuit on the driving circuit board 20 may be electrically connected to form a pixel.

2 is a view schematically showing a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 2, the display device 30 according to an exemplary embodiment may include a pixel unit 110 and a driving unit.

The pixel unit 110 may be disposed in a display area displaying an image. The pixel unit 110 may include a plurality of pixels PXs arranged in various patterns such as a predetermined pattern, for example, a matrix type or a zigzag type. The pixel PX emits one color, and for example, one of red, blue, green, and white colors. The pixel PX may emit colors other than red, blue, green, and white.

The pixel PX may include a light emitting device. The light emitting device may be a self light emitting device. For example, the light emitting device may be a light emitting diode (LED). The light emitting device may emit a single peak wavelength or emit a plurality of peak wavelengths.

The pixel PX may further include a pixel circuit connected to the light emitting element. The pixel circuit may include at least one thin film transistor and at least one capacitor. The pixel circuit can be implemented by a semiconductor stacked structure on a substrate.

Scan lines SL1-SLn for applying a scan signal to the pixels PX and data lines DL1-DLm for applying a data signal to the pixels PX may be disposed in the pixel unit 110. Each of the scanning lines SL1-SLn is connected to the pixels PX arranged in the same row, and each of the data lines DL1-DLm is connected to the pixels PX arranged in the same column.

Light emission control lines EL1-ELn for applying a light emission control signal to the pixels PX may be further disposed on the pixel unit 110. Each of the emission control lines EL1-ELn may be connected to the pixels PX arranged in the same row and may be spaced apart from the scan lines SL1-SLn.

Bias lines BL1-BLn for applying a bias voltage to the pixels PX may be further disposed on the pixel unit 110. Each of the bias lines BL1-BLn may be connected to the pixels PX arranged in the same row, and may be spaced apart from the scan lines SL1-SLn.

The driving unit is provided in a non-display area around the pixel unit 110 and may drive and control the pixel unit 110. The driving unit 120 may include a control unit 121, a scanning driving unit 122, a data driving unit 123, and a bias voltage supply unit 124.

Under the control of the controller 121, the scan driver 122 sequentially applies scan signals to the scan lines SL1-SLn, and the data driver 123 can apply a data signal to each pixel PX. . The pixels PX emit light with a brightness corresponding to a voltage level or a current level of the data signal received through the data lines DL1-DLm in response to the scan signal received through the scan lines SL1-SLn.

The bias voltage supply unit 124 may supply bias voltages for turning on the bias transistors controlling the drain voltage of the driving transistors of each pixel PX to the bias lines BL1-BLn. The bias lines BL1-BLn may be connected to the gate terminal of the bias transistor.

The control unit 121, the scan driving unit 122, the data driving unit 123, and the bias voltage supply unit 124 are each formed in the form of a separate integrated circuit chip or a single integrated circuit chip on a substrate on which the pixel unit 110 is formed. It may be directly mounted, mounted on a flexible printed circuit film, attached to a substrate in the form of a tape carrier package (TCP), or directly formed on the substrate.

3 is an example of a pixel of the display device illustrated in FIG. 2.

In the embodiment of FIG. 3, pixels PX in the n-th row and the m-th column will be described as an example for convenience of description. The pixel PX is one of a plurality of pixels included in the n-th row, and is connected to the scan line SLn corresponding to the n-th row and the data line DLm corresponding to the m-th column.

The pixel PX may be connected to a scan line SLn that transmits a scan signal, a data line DLm that crosses the scan line SLn, and transmits a data signal, and a power line that transmits a first power voltage VDD.

The pixel PX may include a light emitting diode ED and a pixel circuit connected to the light emitting diode ED. The pixel circuit may include first to third transistors T1 to T3, a bias transistor BT, and a capacitor C. The first terminal of each of the first to third transistors T1 to T3 and the bias transistor BT may be a drain terminal, and the second terminal may be a source terminal.

The first transistor T1 includes a gate terminal connected to the first terminal of the capacitor C, a first terminal connected to the light emitting diode ED through the third transistor T3, and a second terminal connected to the second power voltage VSS. It may include a terminal. The second power voltage VSS may be a ground voltage GND. The first transistor T1 serves as a driving transistor, and receives a data signal according to the switching operation of the second transistor T2 to supply current to the light emitting diode ED. The first transistor T1 may operate in a low voltage region. For example, the first transistor T1 may operate in the triode region.

The second transistor T2 may include a gate terminal connected to the scan line SLn, a first terminal connected to the data line DLm, and a second terminal connected to the gate terminal of the first transistor T1. The second transistor T2 serves as a switching transistor that is turned on according to the scan signal received through the scan line SLn and transfers the data signal transferred to the data line DLm to the gate terminal of the first transistor T1. can do. The second transistor T2 may operate in the low voltage region together with the first transistor T1. The second transistor T1 may operate in a triode region. In this case, the data signal may be converted into a voltage range corresponding to the low voltage operation of the first transistor T1 and the second transistor T2.

The third transistor T3 includes a gate terminal connected to the light emission control line ELn, a first terminal connected to the second electrode of the light emitting diode ED, and a second terminal connected to the first terminal of the bias transistor BT. You can. The third transistor T3 is turned on according to the light emission control signal received through the light emission control line ELn, and serves as a switching transistor that allows the driving current of the first transistor T1 to flow through the light emitting diode ED. can do. In the embodiment of FIG. 2, the emission control line ELn is connected to the scan driving unit 122 and receives a light emission control signal from the scan driving unit 122. In another embodiment, the light emission control line ELn may be connected to the light emission control driver (not shown) separate from the scan driver 122 to receive a light emission control signal. The third transistor T3 may be omitted.

The bias transistor BT includes a gate terminal connected to the bias line BLn, a first terminal connected to the second terminal of the third transistor T3, and a second terminal connected to the first terminal of the first transistor T1. You can. The bias transistor BT maintains a turn-on state by a bias voltage applied to the gate terminal, and may be a voltage control transistor that controls the drain voltage of the first transistor T1. The drain voltage of the first transistor T1 is controlled by the bias transistor BT, so that the first transistor T1 and the second transistor T2 may function as low voltage transistors. In one embodiment, the bias transistor BT may control the drain voltage of the first transistor T1 so that the first transistor T1 operates in the triode region.

The bias transistor BT may be turned on by a bias voltage applied through the bias line BLn. The bias voltage may be a DC voltage of a predetermined level to keep the bias transistor BT always turned on. The node voltage Vx between the first transistor T1 and the bias transistor BT, that is, the drain voltage of the first transistor T1 may be controlled according to the turn-on state of the bias transistor BT. The channel resistance of the bias transistor BT may vary according to the bias voltage. That is, the bias transistor BT can operate as a variable linear resistor.

The node voltage Vx, that is, the drain voltage of the first transistor T1 may be determined according to the channel resistance of the bias transistor BT. Therefore, by controlling the bias voltage, the drain voltage of the first transistor T1 can be controlled to a voltage that satisfies the condition in which the first transistor T1 operates in the triode region.

The capacitor C may include a first terminal connected to the gate terminal of the first transistor T1, and a second terminal connected to the second power voltage VSS.

The first electrode of the light emitting diode ED may be supplied with a first power voltage VDD. The second electrode of the light emitting diode ED may be connected to the first electrode of the third transistor T3. The light emitting diode ED can display an image by emitting light with luminance corresponding to a data signal.

4 is a diagram showing voltage (V _DS ) -current (I _DS ) characteristics according to a gate voltage of a transistor.

4, the transistors Tri to at odd zone formula 1 and the voltage (V _DS), such as - the current (I _DS) has a characteristic, the voltage (V _DS) as described below in a saturation region expression 2-to-current (I _DS ) Has characteristics.

... (1)

... (One)

... (2)

... (2)

Here, I _DS is the drain-source current of the transistor, K is the process transconductance parameter (Process Transconductance Parameter), K is the mobility of the channel carrier electrons (Electron) (Mobility), the capacitance of the gate region (Cox) , It may be a parameter such as the size of the channel. The size of the channel may be defined as a ratio of width to length (Width / Length). V _GS is the gate-source voltage of the transistor, V _T is the threshold voltage, and V _DS is the drain-source voltage.

The operating condition for the first transistor T1 as the driving transistor to operate in the triode region is V _GS -V _T > V _DS . Since V _DS is determined by the node voltage Vx, and the node voltage Vx is controlled by the bias voltage, the first transistor T1 can be controlled to operate in the triode region by the bias voltage. The first transistor T1 may operate in a triode region and have a linear characteristic such as resistance. Accordingly, the first transistor T1 may output an input voltage, that is, an output current linearized with respect to V _GS , that is, I _DS .

Since the first transistor T1 operates in the triode region, the influence of the drain-source current variation on the threshold voltage variation is eliminated, and a wide input voltage range can be used due to the low transconductance (Gm).

When the drain terminal of the first transistor T1 is connected to the second electrode (cathode electrode) of the light emitting element ED, a high voltage transistor that requires high breakdown voltage must be used, which adversely affects the threshold voltage mismatch characteristic. Can give.

According to an embodiment of the present invention, the range of the drain-source voltage (operating voltage) may be limited by controlling the drain voltage of the first transistor T1 to limit the operating region to the triode region. Accordingly, a transistor having a low breakdown voltage can be used as a driving transistor.

5 is a view schematically showing a configuration of a bias voltage supply unit according to an embodiment of the present invention.

Referring to FIG. 5, the bias voltage supply unit 124 may include an operational amplifier 131 and a reference voltage generator 133.

The first input terminal (+) of the operational amplifier 131 is connected to the reference voltage generator 133, which is a source of the reference voltage Vref, and the second input terminal (-) is connected to the output terminal. The output terminal of the operational amplifier 131 is connected to the bias line BLn.

In one embodiment, the bias voltage supply unit 124 is composed of one operational amplifier 131, and an output terminal of the operational amplifier 131 may be connected to a plurality of bias lines BL1-BLn. In another embodiment, the bias voltage supply unit 124 is composed of a plurality of first to nth operational amplifiers 131, and an output terminal of each of the plurality of first to nth operational amplifiers 131 includes a plurality of bias lines It may be connected to a corresponding bias line among (BL1-BLn).

The bias voltage supply unit 124 generates a bias voltage V _BIAS to determine the channel resistance of the bias transistor BT to control the drain voltage of the first transistor T1 so that the first transistor T1 operates in a low voltage region. Thus, it can be applied to the bias line BLn. The bias voltage supply unit 124 generates a bias voltage V _BIAS for determining the channel resistance of the bias transistor BT for the first transistor T1 to satisfy the operating condition of V _GS -V _T > V _DS and bias It can be applied with a line (BLn).

When the operating region of the driving transistor is used in the saturation region, due to the high transconductance (Gm) value, a driving transistor having a long channel length may be used to secure a sufficient input voltage region or a large resistor may be added. In addition, in order to reduce the influence of threshold voltage mismatch, a large size driving transistor may be used. In this case, it is difficult to implement a high-resolution micro display device.

An embodiment of the present invention controls the drain voltage of the driving transistor to limit the operating region of the driving transistor to the triode region and optimizes the transconductance (Gm) value, so that even a driving transistor having a small channel length has a threshold voltage mismatch The influence can be eliminated and a wide input voltage range can be secured.

In addition, according to the embodiment of the present invention, an external bias is applied to limit the operating voltage of the driving transistor and the driving unit to a low voltage, so that it is not necessary to use a high voltage transistor in the micro display device, thereby realizing a high resolution pixel circuit.

The present invention has been described with reference to one embodiment shown in the accompanying drawings, but this is only exemplary, and those skilled in the art can recognize that various modifications and other equivalent embodiments are possible therefrom. You will understand. Therefore, the true protection scope of the present invention should be defined only by the appended claims.

Claims (5)

In the micro display device comprising a plurality of pixels,
Each of the plurality of pixels,
Driving transistor;
A voltage control transistor maintaining a turn-on state by a bias voltage applied to the gate terminal and controlling a drain voltage of the driving transistor;
A first switching transistor transferring a data signal to a gate terminal of the driving transistor;
A second switching transistor connected between the driving transistor and the light emitting element to control the current flow of the driving transistor; And
It includes; a bias voltage supply unit for generating the bias voltage so that the channel resistance of the voltage control transistor is less than a predetermined value and outputting it to the gate terminal of the voltage control transistor.
The preset value is the drain voltage of the driving transistor

Is set to satisfy
The V _GS is a gate-source voltage of the driving transistor, V _T is a threshold voltage of the driving transistor, and V _DS is a drain-source voltage of the driving transistor. According to claim 1,
The driving transistor operates in a triode region, a micro display device. The method of claim 1, wherein the voltage control transistor,
And a gate terminal connected to a bias line to which the bias voltage is applied, a first terminal connected to the second switching transistor, and a second terminal connected to a drain terminal of the driving transistor. According to claim 1,
The voltage control transistor is provided between the driving transistor and the second switching transistor, a micro display device. delete

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