KR102048120B1 - Switching device, non-volatile memory device, and method of fabricating the same - Google Patents

Abstract

The present invention relates to a switching device, a nonvolatile memory device and a manufacturing method thereof. According to one embodiment of the invention, the first electrode including a storage source of oxygen ions; A second electrode in which at least one of electrical and magnetic switching occurs in response to an oxidation or reduction reaction with the oxygen ions; And an oxygen of Brown Miller rite structure disposed between the first electrode and the second electrode and having a reversible conducting filament that provides a transfer path of the oxygen ions between the first electrode and the second electrode. There is provided a switching device comprising an ion transport layer.

Description

Switching device, non-volatile memory device and manufacturing method thereof {Switching device, non-volatile memory device, and method of fabricating the same}

TECHNICAL FIELD The present invention relates to semiconductor technology, and more particularly, to a switching device, a nonvolatile memory device, and a manufacturing method thereof.

Recently, as the demand for portable digital application devices such as digital cameras, tablet computers, and smart phones increases, the market for nonvolatile memory devices is expanding rapidly. A typical programmable nonvolatile memory device is a NAND flash memory device.

The NAND flash memory device improves storage capacity through a multilevel implementation and / or a three-dimensional array structure, but due to the difficulty of the manufacturing process and the long limitation of the long driving time due to the block access architecture, There is a lot of research into next-generation memory devices that can be replaced. In addition, it is desirable to develop new switching devices that can improve the degree of integration and simplify driving.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a switching device capable of expanding its application as various devices by using a new nonvolatile memory operation.

Another object of the present invention is to provide a nonvolatile memory device capable of nonvolatile storage and high integration of data using the switching device.

Another object of the present invention is to provide a method of manufacturing a nonvolatile memory device having the aforementioned advantages.

According to one embodiment of the invention, by using an oxygen ion transport layer of a brownmillerite structure disposed between a first electrode and a second electrode and having a reversible conducting filament that provides a transport path for oxygen ions In combination with changes in various physical properties, a variable switching device that can be applied to various devices can be provided.

Further, according to another embodiment of the present invention, a nonvolatile memory device capable of driving nonvolatile storage of data and low power using the variable switching device may be provided.

In addition, according to another embodiment of the present invention, a method of manufacturing a memory device having the above-described advantages can be provided.

Figure 1a is a cross-sectional view showing a switching element according to an embodiment of the present invention, Figure 1b is a cross-sectional view showing a switching element according to another embodiment of the present invention, Figure 1c is a ratio according to an embodiment of the present invention A perspective view of a volatile memory device.
FIG. 2A illustrates an initial state of a nonvolatile memory device formed in accordance with an embodiment of the present invention, FIG. 2B illustrates a reversible conducting filament formed in the nonvolatile memory device by an electrical forming process, and FIG. 2C illustrates FIG. 2B It is a schematic diagram for explaining the reversible conducting filament of, Figure 2d is a cross-sectional view showing a state in which the formed reversible conducting filament collapsed.
3 is a flowchart illustrating a method of manufacturing a nonvolatile memory device according to various embodiments of the present disclosure.
4 is a graph illustrating the current-voltage behavior of a memory cell with an oxygen ion transport layer of an SFO according to one embodiment of the invention.
FIG. 5A illustrates an initial state of a nonvolatile memory device formed in accordance with another embodiment of the present invention, FIG. 5B illustrates a reversible conducting filament formed in a nonvolatile memory device in a set state, and FIG. 5C illustrates a reversible conducting formed. It is sectional drawing which shows the state which a filament collapsed.
FIG. 6 is a graph illustrating the current-voltage behavior of a memory cell with an oxygen ion transport layer of SFO crystallized in the Miller index 111 direction in accordance with one embodiment of the present invention.
7 is a block diagram illustrating a memory system according to an embodiment of the present invention.
8 is a block diagram illustrating a storage device including a solid state disk (hereinafter, SSD) according to an embodiment of the present invention.
9 is a block diagram illustrating a memory system according to another exemplary embodiment of the present invention.
10 is a block diagram illustrating a data storage device according to another embodiment of the present invention.
11 is a block diagram illustrating a nonvolatile memory device and a computing system including the same according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art, and the following examples can be modified in various other forms, and the scope of the present invention is It is not limited to an Example. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art.

In the drawings like reference numerals refer to like elements. In addition, as used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the scope of the invention. In addition, although described in the singular in this specification, a plural form may be included unless the singular is clearly indicated in the context. Also, as used herein, the terms "comprise" and / or "comprising" specify the shapes, numbers, steps, actions, members, elements and / or presence of these groups mentioned. It does not exclude the presence or addition of other shapes, numbers, operations, members, elements and / or groups.

Reference herein to a layer formed “on” a substrate or other layer refers to a layer formed directly on or above the substrate or other layer, or formed on an intermediate layer or intermediate layers formed on the substrate or other layer. It may also refer to a layer. In addition, for those skilled in the art, a structure or shape disposed "adjacent" to another shape may have a portion that overlaps or is disposed below the adjacent shape.

As used herein, "below", "above", "upper", "lower", "horizontal" or "vertical" Relative terms such as may be used to describe the relationship that one component member, layer or region has with another component member, layer or region, as shown in the figures. It is to be understood that these terms encompass not only the directions indicated in the drawings, but also other directions of the device.

In the following, embodiments of the present invention will be described with reference to cross-sectional views schematically showing ideal embodiments (and intermediate structures) of the present invention. In these figures, for example, the size and shape of the members may be exaggerated for convenience and clarity of description, and in actual implementation, variations of the illustrated shape may be expected. Accordingly, embodiments of the present invention should not be construed as limited to the specific shapes of the regions shown herein. Also, reference numerals of members in the drawings refer to the same members throughout the drawings.

FIG. 1A is a cross-sectional view showing a switching device SD ′ according to an embodiment of the present invention, FIG. 1B is a cross-sectional view showing a switching device SD ″ according to another embodiment of the present invention, and FIG. A perspective view of a nonvolatile memory device 100 according to an embodiment of the invention.

Referring to FIG. 1A, the switching element SD ′ includes a first electrode E1, a second electrode E2, and a brown millerite between the first electrode E1 and the second electrode E2. It may include an oxygen ion transport layer (BM) of the structure. In an embodiment, the first electrode E1 may be a lower electrode, and the second electrode E2 may be an upper electrode. It is to be noted that the terms lower electrode and upper electrode are not to be construed as limiting any particular spatial orientation, but are used only for distinction. Therefore, the first electrode E1 may be the upper electrode, and the second electrode E2 may be the lower electrode.

The first electrode E1 and the second electrode E2 may be two-dimensional planar bodies facing each other as shown in FIG. 1A, but the present invention is not limited thereto. For example, at least one of the first electrode E1 and the second electrode E2 may have a one-dimensional shape, such as a wire, or include, but is not limited to, cylindrical, protruding, concave, or a combination thereof. It may have a dimensional shape, and the other electrode may have a one-dimensional shape or have a three-dimensional shape that crosses or surrounds it.

In one embodiment, at least one of the first electrode E1 and the second electrode E2 comprises a precious metal layer such as gold or platinum having low reactivity, and the other is related to the reversible generation and disappearance of the conductive filaments. It may comprise a reactive conductive compound layer. For example, the reactive conductive compound layer may include a conductive oxide layer, such as a ruthenium oxide layer or a strontium ruthenium oxide layer, which is an oxygen ion reservoir (OL) capable of producing conductive filaments, such as the conductive oxide described above. Can be. In FIG. 1A, an embodiment is shown in which the first electrode E1 has an oxygen ion storage source OL.

The oxygen ion storage source OL itself may constitute the first electrode E1, or may further include an additional conductive electrode CL coupled to the oxygen ion storage source OL. The conductive electrode CL may be a semiconductor such as doped silicon or germanium, tungsten (W), cobalt (Co), nickel (Ni), palladium (Pd), platinum (Pt), titanium (Ti), or tantalum (Ta). ), Metals such as molybdenum (Mo), ruthenium (Ru), or erbium (Er), conductive siliconides thereof (e.g. tungsten siliconide (WSi), titanium siliconide (TiSi ₂ ), cobalt siliconide) (CoSi ₂ ), nickel siliconide (NiSi), platinum siliconide (PtSi ₂ ), erbium siliconide (ErSi ₂ ) or molybdenum siliconide (MoSi ₂ )), conductive nitride (e.g., titanium nitride (TiN ) Or tantalum nitride (TaN)), and conductive oxides thereof, and these materials are exemplary, but the present invention is not limited thereto.

In an embodiment, an epitaxial base layer (not shown) may be further formed on the bottom of the first electrode E1. The epitaxial base layer is a layer for improving the crystallinity of the oxygen ion transport layer (BM) or controlling the orientation direction of crystal growth. The epitaxial base layer is formed before the deposition of the oxygen ion transport layer (BM), i.e., under the oxygen ion transport layer (BM), or after the deposition of the oxygen ion transport layer (BM), i.e., the oxygen ion transport layer It may be formed as part of the first electrode E2 on the upper portion of the BM. When the epitaxial base layer is formed on the base of the oxygen ion transfer layer (BM), the oxygen ion transfer layer (BM) may be epitaxially grown in situ, on the contrary, the epitaxial base layer may be formed on the oxygen ion transfer layer (BM). When formed on top, the oxygen ion transport layer BM may be crystallized through an additional process such as heat treatment after the formation of the oxygen ion transport layer BM.

When the epitaxial base layer is a conductive layer, the epitaxial base layer may form part of the first electrode E1 or the second electrode E2. For example, the epitaxial base layer may be a single crystal or polycrystalline conductive perovskite material oriented at Miller Index (100) or (111), for example a strontium ruthenium oxide (SRO) thin film or substrate. As described above, the SRO thin film is an oxygen-containing conductive metal oxide capable of supplying oxygen atoms to the oxygen ion transport layer (BM) of the Brown Millerite structure according to the applied bias polarity. In this case, the oxygen-containing conductive metal oxide may have a perovskite crystal structure. For example, the epitaxial base layer can include a strontium ruthenium oxide (SRO) layer oriented in the Miller Index (111) direction. An oxygen ion transport layer (BM) may be directly formed on the SRO layer.

In contrast, when the epitaxial base layer is an electrical insulating layer, the above-described first electrode E1 is formed on the epitaxial base layer, and the first electrode E1 is epitaxially grown by the epitaxial base layer. The subsequently formed oxygen ion transport layer (BM) may be epitaxially grown. For example, the epitaxial base layer may be a single crystal or polycrystalline non-conductive perovskite material in the Miller index (100) or (111) direction, for example, a strontium titanium oxide (STO) thin film or a substrate. Epitaxial growth is possible on the epitaxial base layer in the Miller index (100) or (111) direction as the first electrode (E1), and a conductive thin film such as a strontium ruthenium oxide (SRO) layer is used as the oxygen ion storage source (OL). Can be formed. Thereafter, the oxygen ion transport layer BM may be formed on the first electrode E1 to enable the oxygen ion transport layer BM to epitaxially grow in the direction of the Miller index 111.

The oxygen ion transport layer (BM) may have a crystalline structure having a brownmillerite structure as a pristine structure before the electrical forming process. The blownmilolite structure may be polycrystalline or monocrystalline. The Brown Millerite structure has a structure in which a layer having an octahedral structure and a layer having a tetrahedral structure alternate with each other by modifying the b axis of a central metal atom located between eight coordinating lattice. In one embodiment, the oxygen ion transport layer (BM) having the Brown Millerite structure, as a non-limiting example (Ba, Sr, Ca) ₂ (Fe, Co) ₂ O ₅ , Ca ₂ Al ₂ O ₅ or Ca ₂ SiO ₄ may be included. Preferably, the Brown Millerite structure may be a material capable of reversible topotactic phase transition into the perovskite crystal structure.

The perovskite structure is formed while oxygen is doped into the tetrahedral structure in the Brown Millerite structure, for example, (Ba, Sr, Ca) (Fe, Co) O _{2.5 + x} 0 <x ≤ 0.5 In the ideal perovskite structure, x is where x satisfies x = 0.5, but x can be between 0 and 0.5, such as 0.25, or 0.375, depending on the doped oxygen content and these phases It has a smaller resistance value in comparison with the conductivity.

If in one embodiment, Brown, Miller, oxygen is doped in the oxygen ion transport layer (BM) of SrFeO _{2 .5} of the initial structure with a light structure, SrFeO can be a metal oxide of the _{2 + .5 x} formation. The SrFeO _{2.5 + x} may exhibit various oxygen depletion perovskite crystal structures in SrFeO _x (x = 0 to 0.5) depending on the stoichiometry of oxygen. SrFeO _{3 with} X = 0.5 is an oxide of a cubic perovskite structure (hereinafter may be referred to as P SFO) with a lattice constant of 3.851 mA and exhibits metallic electrical conductivity. In addition, the Neil temperature T _N of the SrFeO ₃ is an antiferromagnetic magnetic body of 130 K. On the other hand, have the X = oxygen atoms lack is SrFeO _{2 .5} 0 (may be referred to below, BM SFO) FeO in the tetrahedron layers ₆ octahedral layer of FeO and ₄ are alternately laminated to each other by light brown mirror structure Can be. The BM SFO has a distorted orthorhombic unit cell (size a ₀ = 5.672 Å, b ₀ = 1559 Å and c ₀ = 5.527 Å). Such tetragonal unit cells may also be described by quasi-square notation (ie, a / √2 = 4.0107 ms, b / 4 = 3.8975 ms and c / √2 = 3.9081 ms). The BM SFO is similar to the P SFO in that it is semi-rigid, but is completely distinct from the P SFO in that it is an electrical insulator.

The BM SFO can perform a reversible structural phase shift between P SFO and BM SFO, such as SrCoO _x , which is another example of Brown Millerite structure. However, since the BM SFO can be grown uniformly in a layer by layer mode, unlike SrCoO _x , which does not grow flat at the atomic layer level (published in the 2002 journal Appl. Phys. Lett.) Yamada, H. et al., Published in the paper entitled "Epitaxial Growth and Valence Control of Strained Perovskite SrFeO ₃ Films", have a flat surface and uniform thickness at the atomic layer level.

In one embodiment, the thickness of the oxygen ion transport layer (BM) may be in the range of 1 nm to 500 nm to obtain stable and low power resistive switching. When the thickness of the oxygen ion transport layer BM is less than 1 nm, it is difficult to obtain a uniform layer. When the oxygen ion transport layer BM exceeds 500 nm, power consumption for electrical forming, set, or reset operations may increase.

Referring to FIG. 1B, the oxygen ion storage source OL may be formed to have a finite volume such as a dot or a pattern, unlike the layered structure illustrated in FIG. 1A. The oxygen ion storage source OL may be a conductive oxide layer such as a ruthenium oxide layer or a strontium ruthenium oxide layer, such as the oxygen ion storage source OL of FIG. 1A described above. Reference may be made to the features of the nonvolatile memory device MD of FIG. 1A described above in connection with the nonvolatile memory device MD including an oxygen storage source OL having a finite volume.

If the oxygen ion storage source OL has a finite volume, a reversible conducting filament can be formed locally from where a finite volume of oxygen ion storage source OL is present. The finite volume of oxygen ion storage source (OL) is capable of delivering oxygen ions to the oxygen ion transport layer (BM) by a controlled amount, and thus, the size of the reversible conducting filament or the cell and / or reset operation described below. Ensure durability.

Referring to FIG. 1C, a nonvolatile memory device 100 using a switching device SD is disclosed. The second electrode of the switching element SD (see E2 in FIGS. 1A and 1B) is doped by oxygen ions transferred from the oxygen ion storage source OL through the oxygen ion transport layer BM or chemically reacted with the oxygen ions. Reaction (for example, oxidation) causes switching of electrical or magnetic properties of the second electrode E2, and detects the switching thereof, thereby matching the information to be written to the distinct states of the nonvolatile memory device 100. ) May be provided.

The electrical property may be, for example, an electrical property such as conductance, pyroelectriity, piezoelectricity or superconductivity (eg, high temperature superconductor (HTSC)), depending on the type of the second electrode E2. The magnetic property may be any property detectable by a change in magnetic properties such as magnetic or a phase change between paramagnetic and ferromagnetic materials.

The nonvolatile memory device 100 may include an array of memory cells MC arranged in a plurality of rows and columns. A set of conductive electrodes (herein referred to as wordlines; WL1-WL4) extend onto one end of the array of memory cells MC. Each word line may be electrically connected to the memory cells MC of a corresponding row. Another set of conductive electrodes (herein referred to as bitlines; BL1-BL5) may extend onto the other end of the array of memory cells MC. Each bit line may be electrically or magnetically connected to the memory cells MC in a corresponding column.

In the nonvolatile memory device 100, each memory cell MC may be disposed at an intersection of one word line and one bit line. This architecture is an example of a cell structure implemented in a two-terminal manner, and is generally referred to as a cross point structure. However, this is merely an example and the present invention is not limited thereto. For example, the nonvolatile memory device 100 may further have a third wiring for programming or reading each memory cell MC. In this case, the nonvolatile memory device 100 may have a memory cell structure of three terminals or four terminals or more. .

The above-described read and write operations of the memory cells of the two terminals (called the selected memory cells) may be performed by activating word lines and bit lines associated with the selected memory cells. The nonvolatile memory device 100 may further include a word line control circuit (not shown) coupled to the memory cells MC through each word line and activating the selected word line for reading or writing the selected memory cell. have. In one embodiment, the word line control circuit may further include a multiplexer (not shown) for selecting a specific word line among the word lines.

The nonvolatile memory device 100 may further include a bit line control circuit (not shown) coupled to the memory cells MC through respective bit lines BL1 to BL5. In one embodiment, the bit line control circuit may include a demultiplexer, a sense circuit, and an input / output (I / O) pad. The demultiplexer can be configured to selectively couple to the sense circuitry of the bit line of a selected memory cell.

When the oxygen ion transport layer BM of the switching elements SD ', SD "does not have a reversible conducting filament therein, the oxygen ion transport layer BM is electrically insulator since it has a high resistance value in the initial state. Accordingly, an electroforming process for forming a reversible conducting filament may be required to be used as a nonvolatile memory device, when each memory cell undergoes the electrical forming process, an oxygen ion transport layer of each memory cell The reversible conducting filament is formed in BM which provides a transfer path of oxygen ions between the first electrode E1 and the second electrode E2 while at the same time electrically connecting them. As it forms, a transport path for oxygen ions is established, thus recording through switching of electrical or magnetic properties to the memory cell. The erase operation can be carried out reversibly.

The word line control circuit and the bit line control circuit may access the memory cells individually by activating the corresponding word line and the bit line coupled to the selected memory cell. During the write operation, the word line control circuit writes information to the selected memory cell by applying a predetermined voltage to the selected word line. The demultiplexer may activate the selected memory cell by, for example, grounding the selected memory cell. In this case, a logic value is recorded while a current flowing to the selected memory cell affects the characteristics of the memory cell.

The logic value may be stored by a change in the electrical or magnetic characteristics of the second electrode E2 of each memory cell, and the multi-bit logic value may be stored according to the number of resistance values. The logical value is detected through subsequent read operations. The read logical value may be used to represent one or more bits.

During programming or erase switching used to modify the stored data, a specific switching voltage (eg, set voltage or reset voltage) is applied to the oxygen ion transport layer (see BM in FIG. 1A) and the oxygen ion transport layer (BM). By changing the resistance state by generating a switching current through. These currents may be present in the oxygen ion transport layer BM and / or at the interface between adjacent components (eg, the interface between the oxygen ion storage source OL and the oxygen ion transport layer BM, oxygen ion storage). Heat may be generated at the interface between the circle OL and the first electrode E1 or at the interface between the oxygen ion transport layer BM and the second electrode E2. The generation and disappearance of the transfer path of oxygen ions by the reversible conducting filament of the oxygen ion transport layer (BM) will be described in more detail below with reference to FIGS. 2A-2C.

The read operation for reading out the changed data state by the above-described write and erase operations is performed by the memory cell through a small voltage signal, for example, a "READ" voltage pulse, which does not substantially affect the reversible conducting filament in the resistive switching layer. This can be done by monitoring the level of electrical or magnetic values. In some embodiments, a read operation may be performed following the electrical forming and set / reset switching of the memory cell, wherein the electrical forming and set / reset switching may be performed at a corresponding voltage or voltage until the required level of resistance for the selected memory cell is achieved. The current signal can be applied and increased.

During the read operation, the word line control circuit applies a predetermined voltage to the selected word line and the demultiplexer couples the selected bit line to the sense circuit. The logic value of the selected memory cell is detected with the magnitude of the current detected by the sensing circuit, and the resulting value can be transferred to the I / O pad.

The width and / or magnitude of the voltage pulse across the memory cell for programming or reading of the selected memory cell is adjusted, and accordingly the resistance value of the selected memory cell is adjusted so that a specific logic state can be written or read. In one embodiment, the read operation may be affected by a bypass of a signal such as a leakage path or a sneak path generated by the low resistance memory cells adjacent to the selected other memory cell. Memory cells may be added to each node or to each device with certain non-linearities connected in series to the variable resistor. In one embodiment, the non-linear elements may be coupled between a memory cell and a wordline or between a memory cell and a bitline.

The devices with non-linearity may be varistor-type devices or diodes. In FIG. 1A a reverse diode may be provided. The reverse diode may be a zener diode. The threshold voltage V _th of the reverse diode may have a value smaller than the write voltage. In this case, while writing to the selected memory cell, the reverse diode and the memory cell flow current, and the current flowing in the reverse direction is blocked by the voltage applied to the adjacent memory cells. The magnitude of the read voltage may be less than the threshold voltage V _th of the reverse diode. For example, the magnitude of the read voltage may be half of the threshold voltage Vth of the reverse diode. However, selecting the memory cell in the cross point structure may be performed by a half selection method, and the present invention is not limited to this example.

In one embodiment, the rectifying characteristic of the reverse diode may be implemented in the variable resistor itself when the variable resistor has a self-rectifying characteristic. In this case, the configuration and manufacturing of the semiconductor memory device may be further simplified by omitting the reverse diode. Can be.

In another embodiment, when a transistor is located at each node or inserted into each memory cell so that no memory cell is selected, it may be organized as an active matrix that decouples the unselected memory cells. This approach can improve crosstalk problems that occur in arrays of nonvolatile memory devices.

Although the nonvolatile memory device 100 according to the above-described embodiment has been disclosed with one layer of memory cell arrays, this is merely exemplary and the present invention is not limited thereto. For example, two or more memory cell arrays may be stacked and integrated. In addition, the memory array illustrated in FIG. 1C may have a three-dimensional memory cell array arranged to extend in a horizontal direction with respect to a substrate or to have a plurality of levels in a Miller index 100 direction with respect to the substrate.

2A illustrates an initial state of a nonvolatile memory device MD formed according to an embodiment of the present invention, and FIG. 2B illustrates a reversible conducting filament CF formed in the nonvolatile memory device MD by an electrical forming process. 2C is a schematic diagram illustrating the reversible conducting filament CF of FIG. 2B, and FIG. 2D is a cross-sectional view illustrating a collapsed state of the formed reversible conducting filament CF.

Referring to FIG. 2A, a nonvolatile memory device MD including a first electrode E1, a second electrode E2, and an oxygen ion transport layer BM is disclosed. The nonvolatile memory device MD may be applied as a member such as a sensor, a fuse, or a logic device in addition to the memory cell described above.

The oxygen ion transport layer BM between the first electrode E1 and the second electrode E2 has a brown millerite structure as an initial structure. The Brown Millerite structure has a crystal structure in which the fully oxidized octahedral structure layer L8 and the oxygen depleted tetrahedral structure layer L4 alternate. As such, the octahedral structural layers L8s connecting the first electrode E1 and the second electrode E2 are referred to herein as octahedral slab layers. From the characteristics of the Brown Millerite structure, a tetrahedral structure layer L4 exists between these adjacent octahedral layers L8, and in particular, tetrahedral structure layers L4s also exist between the octahedral slab layers L8s. Present and referred to herein as a tetrahedral slab layer. The octahedral slab layers may be at least one layer, and need not necessarily be plural. Also, in the present specification, the octahedral slab layers L8s and the tetrahedral slab layers L4s are collectively referred to as an initial slab layer Ls.

Although FIG. 2A illustrates a single crystal structure, the present invention is not limited thereto, and the oxygen ion transport layer BM may have a polycrystalline structure. The above-described strontium iron oxide (SFO) in the Brown Millerite material can grow in atomic layer units to obtain a flat layer at the atomic layer level. In one embodiment, the oxygen ion transport layer (BM) illustrated in FIG. 2A may comprise an SFO layer of Brown Millerite structure. The oxygen ion transport layer (BM) of the brown millerite structure of an initial structure is an insulator which has a structural order which has larger resistance value than the high resistance state by the reset operation mentioned later.

In one embodiment, the layers L8s of some of the octahedral structure layers L8 may be aligned between the first electrode E1 and the second electrode E2 according to their orientation direction. FIG. 2A illustrates that the octahedral structure layer L8 and the tetrahedral structure layer L4 of oxygen depletion are oriented in a direction parallel to the extending direction of the first electrode E1 and the second electrode E2.

The filament conductive path of the oxygen ion transport layer BM according to the embodiment of the present invention is an initial slab layer of a Brown Millerite structure between the first electrode E1 and the second electrode E2 of the nonvolatile memory device MD. At (Ls) at least part of the tetrahedral slab layer (L4s) is provided by oxidizing to an octahedral layer. As described above, prior to undergoing the electrical forming process, the oxygen ion transport layer (BM) having the Brown Millerite structure of FIG. 2A is electrically insulator.

Referring to FIG. 2B, in the electrical forming process, for example, when a positive forming voltage V _F is applied to the second electrode EL2 and the first electrode E1 is grounded, the first electrode E1 is grounded. Oxygen anions are drift from the oxygen ion storage source OL to the oxygen ion transport layer BM. The drift oxygen anion is doped in the oxygen ion transport layer (BM), whereby the tetrahedral slab layers (L4s) of the oxygen depletion of Figure 2a can be oxidized to become an octahedral slab layer (L8s). As a result, a reversible conducting filament CF in which the octahedron structure is continuously adjacent may be formed. In one embodiment, the reversible condensing filament CF may be formed in successive contiguous all octahedral slab layers having a layered structure.

In another embodiment, the reversible conducting filaments CF formed by the electrical forming process are tetrahedral slab layers L4s disposed between adjacent octahedral slab layers L8s, as shown in FIG. 2C. Part P8S is changed into octahedral structure by the injection of oxygen, and the region P8S changed into octahedral structure is combined with neighboring octahedral slab layers L8s to form a rod-shaped reversible conducting filament CF. It may be formed. The conductive path is formed between the first electrode E1 and the second electrode E2 by the reversible conducting filament CF.

Shapes of the conductive filaments described with reference to FIGS. 2B and 2C are exemplary only, but the present invention is not limited thereto. In addition, the conductive filaments may be plural or have any shape in which a planar shape and a bar shape are combined. For example, when Brown Millerite crystal structures of different orientations are mixed in the oxygen ion transport layer (BM), two or more planar shapes intersect, two or more bar shapes intersect each other, or a planar shape and a bar shape intersect each other. It is also possible to form a combined composite structure.

In the embodiment of the present invention, since the tetrahedral slab layers L4s of the oxygen depletion have various oxygen coordination sites, not only oxidation is easy but also stress due to deformation occurring while changing into an octahedral structure can be accommodated. Phase change occurs easily. In other words, oxygen ions are doped between fully oxidized octahedral slab layers (L8s) adjacent to each other to form a topotactic phase transition in which the tetrahedral slab layers (L4s) partially change into a perovskite crystal structure. Through the reversible conducting filament (CF) is formed. Oxygen ions may be transferred from the first electrode E1 to the second electrode E2 through the reversible conducting filament CF, thereby supplying oxygen ions to the second electrode E2. In the second electrode E2, a reaction region or a doping region (OR (hereinafter, referred to as a doping region)) may be formed that may cause a change in electrical or magnetic properties such as doping, solid solution, or oxidation of oxygen ions.

According to an embodiment of the present invention, the oxygen ions are locally transferred to the second electrode E2 through the reversible conducting filament CF, which is typically only a few nm in diameter, to doping in the second electrode E2, Strong oxygen injection can be achieved since it may be dissolved or oxidized. The doped region thus formed may change the electrical or magnetic properties of the second electrode E2. In an embodiment, an operation in which a doped region is formed in the second electrode E2 to change electrical or magnetic properties may correspond to either a program operation or an erase operation of a memory drive, for example, a program operation. The electrical or magnetic state value of the case can be assigned to a logic value '1' or '0', for example '1'.

In one embodiment, during the electrical forming process, the first electrode E1 is grounded, a bias is applied to the second electrode E2, and the forming voltage V _F applied to the second electrode E2 is 0.4 V to 2 V, and in some embodiments, 0.5 V to 1 V. However, this voltage range is only an example, and when the Brown Millerite structure of the oxygen ion transport layer (BM) is substantially single crystal, cell operation and reset operation may be reversibly performed without a separate electrical forming process. In this case, the forming voltage V _F may not be necessary and corresponds to a case in which the forming voltage V _set is 0V. As such, the reason that the forming voltage V _F is small or zero means that at least a portion of the rod-shaped transition in the tetrahedral slab layer disposed between adjacent octahedral slab layers requires little energy. This is because it is easily generated. This will be described later in detail with reference to FIGS. 5A to 6.

According to the embodiment of the present invention, between the first electrode E1 and the second electrode E2, the tetrahedral slab layer L4s between the octahedral slab layers L8s is at least partially oxidized, and is reversible. Since the ducting filament CF is formed, the forming voltage V _F required in the electrical forming process moves defects within a substantial portion between the first electrode E1 and the second electrode E2 and causes one of these defects to be removed. Conventional nickel oxides, niobium oxides, titanium oxides, hafnium oxides, aluminum oxides, tantalum oxides, zirconium oxides, yttrium oxides, scandium oxides, magnesium oxides, chromium oxides, and vanadium that must be arranged within the initial conductive paths above. It can be significantly reduced compared to the forming voltage of the resistive switching layer using a metal oxide such as oxide.

Further, in one embodiment, when the thin film constituting the oxygen ion transport layer (BM) is an SFO layer, the oxygen ion transport layer (BM) may be formed layer by layer, so that the surface is uniform and uniform at the atomic level. Since it can grow uniformly to one thickness, there is an advantage that the cascading generation of the reversible conducting filaments occurring in the Brown Millerite structure can occur more uniformly, when the switching device is applied as a memory device, the memory cell The variation in performance between them can be alleviated.

In the electrical forming process, the current level suddenly increases in the oxygen ion transfer layer (BM), which corresponds to the beginning of the electrical forming process, and the oxygen ion transfer layer (BM) is formed of a reversible conducting filament formed even when the bias is removed. CF) is left in the low resistance state (LRS). In an embodiment of the present invention, the generation and destruction of the reversible conducting filament (CF) is not carried out throughout the oxygen ion transport layer (BM) rather than partially blocking and restoring part of the reversible conducting filament (CF) Is performed through Referring to FIG. 2D, the region that is partially blocked or restored of the reversible conducting filament CF is referred to as the switching zone SZ.

The reversible conducting filament CF formed based on the slab layers L8s may be at least partially disrupted in a reset bias V _reset condition opposite to the bias V _F of the electrical forming. If the reverse bias V _RP of the same polarity is applied while the reset bias V _reset is applied or before the reset bias V _reset is applied, it is present in the doped region OR in the second electrode E2. Oxygen ions are returned to the reversible conducting filament (CF) or transferred to the first electrode (E1) through the reversible conducting filament (CF), and if the reset bias (V _reset ) is continued to the reversible conducting filament (CF) Even the filled oxygen ions are drift back to the first electrode E1. In this case, the reversible conducting filament CF partially collapses. As such, when the doped region OR due to the oxygen ions in the second electrode E2 disappears, a reaction such as reduction occurs in the second electrode E2, thereby causing an electrical or magnetic state value of the second electrode E2. Initialization of can occur. In an exemplary embodiment, an operation in which the doping region OR disappears in the second electrode E2 so that electrical or magnetic properties are changed may correspond to any one of a memory driving program operation and an erase operation, for example, an erase operation. The electrical or magnetic state value at that time may be assigned to a logic value '1' or '0', for example '0'.

The partial collapse of the reversible conducting filament CF described above is a process in which the switching zone SZ is reduced. In the switching zone SZ of the reversible conducting filament CF, which has been collapsed by cutting the reversible conducting filament CF, a tissue having a tetrahedral structure in the form of at least partially reduced clusters may be generated. In this case, the oxygen ion transport layer BM may be in a high resistance state HRS. As such, switching from the low resistance state LRS to the high resistance state HRS may be referred to as a reset operation.

In one embodiment, the first electrode E1 is grounded, and a negative voltage (hereinafter referred to as reset voltage V _RS ) to the second electrode E2, for example, a reset voltage of −1 V to −3 V Preferably, when a reset voltage of -1.5 V to -2.2 V is applied, the resistive switching layer is in a high resistance state (HRS).

Again, applying a high amount of bias to the oxygen-resisting layer (BM) in the high resistance state (HRS) results in at least a portion of the collapsed reversible conducting filament (CF '), for example, a tetrahedral structure in the form of a cluster. This can be oxidized, whereby again the reversible conducting filament CF is rebuilt as shown in FIGS. 2B and 2C and the oxygen ion transport layer BM is in a low resistance state LRS. This operation is called a set operation, and the voltage required for the set operation is called a set voltage (V _set ). In one embodiment, the set voltage (V _set ) is in the range of 0.9 V to 1.5 V. The cell voltage V _set connects the collapsed octahedral chain, which may be higher than the aforementioned electrical forming voltage V _F. However, this is merely illustrative and the present invention is not limited thereto. After the reversible conducting filament CF is reconstructed by the set operation, when the operating voltage V _dd is continuously applied, additional oxygen ions may be transferred from the first electrode E1 to the second electrode E2. As a result, the electrical or magnetic state of the second electrode E2 may be switched from the reset state to the set state. By the set voltage V _set and the reset voltage V _reset applied to the selected memory cell, the oxygen ion transport layer BM of the selected memory cell is shown in the low resistance state LRS shown in FIG. 2B and in FIG. 2D. Can be reversibly switched between the high resistance states RLS.

In another embodiment, the electrical or magnetic switching of the second electrode E2 may not necessarily involve switching of the aforementioned set operation and reset operation of the reversible conducting filament CF of the oxygen ion transport layer BM. . For example, while the reversible conducting filament CF generated by the forming process is maintained as it is, the exchange of oxygen ions may be performed between the first electrode E1 and the second electrode E2. To this end, the oxygen ions in the doped region OR of the second electrode E2 are removed through the reversible conducting filament CF while being careful not to collapse the reversible conducting filament CF. By inducing an initialization or a first state and moving the oxygen ions to the second electrode E2 through the reversible conducting filament CF to form a doped region OR of oxygen ions in the second electrode E2, The second state in which the electrical or magnetic properties are switched may be induced in the second electrode EL2 to be distinguished from the first state.

In the above embodiment, the oxidized octahedral slab layers L8s constituting the reversible conducting filament CF have a perovskite crystal structure, for example SrFeO _3.0 , and at least an electron quantum confinement) may have a number of layers within the range in which the effect does not occur, at least two or more, but the present invention is not limited thereto. However, in another embodiment, the reversible conducting filament (CF) may have a perovskite crystal structure with a higher oxygen content than SrFeO _2.5 of Brown Millerite structure, such as SrFeO _2.75 or SrFeO _2.875 .

In the nonvolatile memory device MD according to an exemplary embodiment of the present invention, a reset operation for blocking the switching zone SZ of the conductive filament CF and a part of the switching zone SZ restored are restored to restore the conductive filament CF. For the set operation for reconstructing, the direction of the current applied to the nonvolatile memory device MD may have opposite bipolar switching operation characteristics. In the application of the nonvolatile memory device MD to a memory cell, the switching zone SZ is formed of octahedral slab layers L8s having a Brown Millerite structure intersecting the first electrode E1 and the second electrode E2. At least a portion of the tetrahedral slab layer L4s therebetween, for example, the first electrode E1 or the second electrode E2 may be near or the whole thereof, but the present invention is not limited thereto.

In the above embodiment, the reversible phase change of the switching zone SZ can be performed by controlling the movement of oxygen anions, and the octahedral layer and tetrahedral layer constituting the switching zone SZ by the movement of the oxygen anions. In particular, since the oxidation / reduction reaction of the tetrahedral layer is controlled, the electrical forming process of the memory cell may be performed. In some embodiments, the location of the switching zones SZ is designed to be uniformly applied throughout the memory cells of the memory cell array such that all cells belonging to the same memory array may have the same feature. However, this is exemplary and the location of the switching zone SZ of each memory cell may be independently selected for each cell by controlling the electrical forming process. For example, the switching zone SZ of some memory cells may be formed near the first electrode E1, and the switching zone SZ of other memory cells may be formed near the second electrode E2. .

In another embodiment, the location of the switching zone SZ may be initially formed at one specified location and then changed via electrical control to move to another location. Through this, it is possible to provide a memory cell area having different operating characteristics or data storage characteristics in the memory cell. Position design and change of the switching zone SZ can be achieved by controlling the movement of oxygen anions. Movement control of the oxygen anion can be achieved by controlling the polarity, strength, and / or duration of the electrical signal used.

According to an embodiment of the present invention, a doped region having a size of several nm to several tens nm is transferred locally to the second electrode E2 through a reversible conducting filament CF having a diameter of only a few nm. Or by applying magnetic states as switching devices or memory devices, device densities of terabits per inch can be achieved. The electrical or magnetic state of the doped region can be detected through contact or contactless measurement. For example, a magnetic state can be detected while scanning the doped region in a non-destructive manner by a scanning SQUID microscopy (SSM) method or a read structure implementing the same.

3 is a flowchart illustrating a method of manufacturing a nonvolatile memory device according to various embodiments of the present disclosure.

Referring to FIG. 3, a first electrode including an oxygen ion storage source may be formed (S10). The first electrode may be formed by a conductive thin film formation process such as physical vapor deposition, chemical vapor deposition, or atomic layer deposition. An oxygen ion transport layer is formed on the first electrode (S20). Thereafter, a second electrode is formed on the oxygen ion transport layer (S30).

In an embodiment, the forming of the first electrode (S10) may include forming an epitaxial base layer. In this case, the first electrode may be formed only of an epitaxial base layer or may be provided in the form of a laminated structure by forming the epitaxial base layer on a first conductive layer such as doped crystalline silicon, titanium or tungsten. In an embodiment, the forming of the first electrode (S10) may further include forming an oxygen ion storage source on the epitaxial base layer. In this case, the epitaxial base layer and the oxygen ion storage source may constitute at least a portion of the first electrode as a conductive layer having a stacked structure. The oxygen ion storage source may be first oriented in a predetermined direction and crystallized by the epitaxial base layer.

The epitaxial base layer may be a perovskite-based conductive layer oriented in the Miller Index (100) or (111) direction. For example, the epitaxial base layer may be a strontium ruthenium oxide layer. When the conductive epitaxial base layer functions as an oxygen ion storage source, the first electrode may be provided only by the conductive epitaxial base layer. The epitaxial base layer enables heteroepitaxial growth such that an optional oxygen ion storage source subsequently formed and an oxygen ion transport layer of Brown Millerite structure are first oriented in the Miller Index (100) or (111) direction to crystallize. .

The epitaxial base layer may comprise a non-conductive perovskite-based material, for example, a strontium titanium oxide film, in which case, on the non-conductive perovskite-based material layer, a first layer such as a strontium ruthenium oxide film or a ruthenium oxide film An electrode can be formed. In this case, both the strontium ruthenium oxide film formed on the strontium titanium oxide film in the direction of the Miller index (100) or (111) and the resistive switching layer of the brown millerite structure are in the Miller index (100) or (111) direction. Each may be heteroepitaxial crystallized. The heteroepitaxial crystallization may be achieved in situ when the first electrode and the resistive switching layer are deposited, or may be achieved through subsequent heat treatment, but the present invention is not limited thereto.

The epitaxial base layer described above may be a crystalline thin film provided in bulk form such as a substrate or formed by vapor deposition such as pulsed laser fusion, sputtering, chemical vapor deposition or atomic layer deposition.

The oxygen ion transport layer formed on the first electrode is a variable resistance layer having a Brown Millerite structure. In one embodiment, the oxygen ion transport layer may be formed by a pulse laser fusion method. For example, the substrate is heated in the range of about 800 to 500 ℃ ℃, under a pressure of 0.1 mTorr to 100 mTorr, 1 J · cm ^-2 to about 10 J · cm ^{- 2} laser fluence Su 1 Hz to 10 The oxygen ion transport layer may be formed through a pulsed laser fusion method of a repetition rate of ³ Hz. A high purity ceramic target containing the constituent elements of the oxygen ion transport layer can be used as the starting material for the pulsed laser fusion method. However, the pulsed laser fusion method is exemplary, and other vapor deposition methods such as sputtering, chemical vapor deposition, atomic layer deposition, or molecular beam epitaxy may be applied. The oxygen ion transport layer has a Brown Millerite structure, and may be first oriented in the Miller index 111 direction by the underlying epitaxial base layer to crystallize.

Crystallization of the oxygen ion transport layer can be accomplished in situ with its thin film deposition or ex situ through subsequent heat treatment. Thereafter, a nonvolatile memory device may be provided by forming a second electrode on the oxygen ion transport layer (S30). After forming the nonvolatile memory device, a nonvolatile memory device in which an oxygen ion transfer path is formed by forming a reversible conducting filament in the oxygen ion transport layer through an electrical forming process may be provided.

Experimental Example

An oxygen ion transport layer according to an embodiment of the present invention was prepared and its characteristics were analyzed. For the production of the resistive switching layer, a 99.9% purity polycrystalline strontium iron oxide (SFO) target was used. The strontium iron oxide target was prepared by stoichiometrically mixing SrCo ₃ and Fe ₂ O ₃ as a starting material, calcining at 900 ° C. for 12 hours, and then sintering at about 1000 ° C. for 12 hours.

As a first electrode, a strontium ruthenium oxide (SRO) film was formed. At this time, the strontium titanium oxide (STO) having a perovskite crystal structure oriented in the Miller index Miller index (100) direction as an epitaxial base layer so that the crystal orientation of the strontium ruthenium oxide (SRO) film in the Miller index (100) direction. Substrates were used. As a result, the strontium ruthenium oxide (SRO) film is epitaxially grown on the substrate and has crystallinity oriented in the Miller index (100) direction. The first electrode was formed by a pulse laser evaporation method using a KrF excimer laser (repetition rate: 4 Hz, fluence: ˜2.5 J · cm ^{− 2} ), and the temperature of the substrate was 750 ° C. The strontium ruthenium oxide (SRO) film has an out of plane lattice constant of about 3.95 GPa.

A strontium iron oxide (SFO) film of brown millerite structure was formed on the strontium ruthenium oxide (SRO) film as a resistive switching layer. The SFO film was deposited by a pulse laser evaporation method of a KrF excimer laser (repetition rate: 4 Hz, fluence: ˜2.1 J · cm ^{− 2} ) at a temperature of about 650 ° C. under a pressure of about 10 mTorr. The thickness of the strontium ruthenium oxide (SRO) film is about 80 nm.

Thereafter, as a second electrode, a thin film of gold (Au) having a thickness of about 80 nm was formed by electron beam evaporation. As a result, an epitaxial layered structure of Au thin film (second electrode) / BM SFO thin film (oxygen ion transport layer) / SRO thin film (first electrode) / STO (epitaxial base layer) was produced, and its structural and electrical properties were evaluated. Was performed.

4 is a graph illustrating the current-voltage behavior of a memory cell with an oxygen ion transport layer (BM) of an SFO in accordance with one embodiment of the present invention.

Referring to FIG. 4, the measurement memory cell has the structure illustrated in FIG. 6 and the first electrode EL1 (for example, an SRO electrode capable of supplying oxygen ions) is a common electrode, and the second electrode ( EL2 (for example, Au electrode) was formed. The I-V sweep was performed with a variable bias applied to the second electrode EL2 and the first electrode EL1 grounded.

According to embodiments of the present invention, it has been observed that bipolar hysteresis characteristics may be implemented after electrical forming. The memory device according to the embodiment of the present invention is low as indicated by arrow 1, but requires an electrical forming process at a voltage V _F of about 0.6V. As a result, the oxygen ion transport layer BM becomes a low resistance state LRS. Reducing the applied voltage in the low resistance state LRS follows the path indicated by arrow 2.

The reset operation is then performed as indicated by arrow 3 at the negative bias. The memory cell is in a high resistance state (HRS) as indicated by arrow 4. Thereafter, when a positive bias is applied, a set operation is performed as indicated by arrow 5, and the memory cell is switched back to the low resistance state LRS. In this case, it can be seen that the electrical forming voltage V _F is lower than the set voltage V _set .

FIG. 5A illustrates an initial state of a nonvolatile memory device MD formed in accordance with another embodiment of the present invention, and FIG. 5B illustrates a reversible conducting filament CF formed in a nonvolatile memory device MD in a set state. 5C is a cross-sectional view showing a state in which the formed reversible conducting filament CF is collapsed.

Referring to FIG. 5A, a nonvolatile memory device MD including a first electrode E1, a second electrode E2, and an oxygen ion transport layer BM is disclosed. The nonvolatile memory device MD may be applied as a member such as a memory cell, a sensor, a fuse, or a logic device described above.

The oxygen ion transport layer BM between the first electrode E1 and the second electrode E2 has an initial structure and is inclinedly oriented so as to cross the first electrode E1 and the second electrode E2 and is crystallized. It has a light structure. In one embodiment, the Brown Millerite structure of the oxygen ion transport layer (BM) may first be oriented in the Miller Index (111) direction.

The oxygen ion transport layer of the Brown Millerite structure of the initial structure is an insulator having a structural order having a larger resistance value than a high resistance state by a reset operation described later. In one embodiment, the octahedral slab layers L8s of the octahedral structural layers L8 extending in the direction of the Miller index 111 are in contact with and across the first electrode E1 and the second electrode E2. The electrode E1 and the second electrode E2 may be connected. A tetrahedral slab layer is disposed between these adjacent octahedral slab layers L8s. The octahedral slab layers may be at least one layer, and need not necessarily be plural. The octahedral slab layers L8s and tetrahedral slab layers L4s collectively constitute an initial slab layer Ls.

The slab layer Ls is a crystalline region connecting across the first electrode E1 and the second electrode E2 in the oxygen ion transport layer of the initial structure, and the Brown Millerite structure is the main portion of the substrate or the electrode E1 E2. One or more slab layers Ls if they are oriented in a direction that is not parallel to the direction, for example, in the Miller index 111 direction and not in the Miller index 100 direction, and the oxygen ion transport layer BM has a suitable thickness. ) Can be secured.

The reversible conducting filament of the oxygen ion transport layer BM according to the embodiment of the present invention is the initial stage of the Brown Millerite structure across the first electrode E1 and the second electrode E2 of the nonvolatile memory device MD. At least a portion of the tetrahedral slab layer L4s in the slab layer Ls is provided by oxidizing to an octahedral layer. As described above, before undergoing the electrical forming process, the nonvolatile memory device MD having the Brown Millerite structure of FIG. 5A is electrically insulated. However, referring to FIG. 5B, when the positive forming voltage V _F is applied to the second electrode E2 and the first electrode E1 is grounded, for example, in the electrical forming process, the first electrode ( Oxygen anions are drifted from E1) (in this case, an oxygen supply layer (see OL in FIG. 1A) can be included in the first electrode E1) to the oxygen ion transport layer BM. The drift oxygen anion is doped in the oxygen ion transport layer (BM), whereby the tetrahedral slab layers (L4s) of the oxygen depletion of Figure 5a can be oxidized octahedral slab layer (L8s) through phase phase transition. have. In this case, a planar conductive filament in which three or more layered structures are combined may be formed.

The shape of the conductive filament described with reference to FIG. 5B is exemplary only, and the present invention is not limited thereto. In addition, the conductive filaments may be plural or have any shape in which a planar shape and a bar shape are combined. For example, when Brown Millerite crystal structures of different orientations are mixed in the oxygen ion transport layer (BM), two or more planar shapes intersect, two or more bar shapes intersect each other, or a planar shape and a bar shape intersect each other. It is also possible to form a combined composite structure.

In one embodiment, the electrical forming process, the first electrode (E1) is grounded, applying a bias to the second electrode (E2), wherein the forming voltage (V _F ) is applied to the second electrode (E2) 0.4 V to 2 V, and in some embodiments, 0.5 V to 1 V. However, this voltage range is only an example, and when the Brown Millerite structure of the oxygen ion transport layer (BM) is substantially single crystal, cell operation and reset operation may be reversibly performed without a separate electrical forming process. In this case, the forming voltage V _F may not be necessary and corresponds to a case in which the forming voltage V _F is 0V. The electrical forming process, the reversible conducting filament CF, and the switching zone SZ may be referred to the features of the nonvolatile memory device MD of FIGS. 2A to 2D described above.

For those skilled in the art, the above embodiment relates to the resistive layer of the Brown Millerite structure oriented first in the (111) direction, but the orientation of the slab layer to reduce the power consumption of the electrical forming process is limited to the Miller Index (111) direction. It will be appreciated that it can be understood that it can have any inclined direction that can cross the first electrode and the second electrode, which is also included in the embodiment of the present invention.

FIG. 6 is a graph illustrating the current-voltage behavior of a memory cell having an oxygen ion transport layer (BM) of SFO crystallized in the Miller index 111 direction according to an embodiment of the present invention.

Referring to FIG. 6, the measurement memory cell has a structure and a diagram inserted in FIG. 6, and the first electrode E1 (for example, an SRO electrode capable of supplying oxygen ions) is a common electrode, and the second electrode ( E2; for example, Au electrode). The I-V sweep was performed with a variable bias applied to the second electrode E2 and the first electrode E1 grounded.

In accordance with an embodiment of the present invention, it has been observed that bipolar hysteresis characteristics may be implemented without an electrical forming process. As shown by the curve NC for the variable resistor having the initial structure, when the voltage sweep is first performed in the negative direction as shown by arrow 1, the resistive switching characteristic is not expressed along the path of arrow 2 as it is. From this, it can be seen that the conductive filament according to the embodiment of the present invention is formed by oxygen ions supplied from the first electrode E1. In addition, from the selectivity with respect to the polarity, the memory cell of the present invention can have a self-rectification effect in which current flows only in the characteristic polarity, and it is possible to implement a simpler memory cell array in which the selection element is omitted.

Referring to the curve SC, when the positive bias is increased as shown by the arrow 3, the set operation occurs even though there is no separate electrical forming process, and thus the oxygen ion transport layer BM becomes a low resistance state (LRS). If a positive bias is reduced as indicated by arrow 4 and a reset operation occurs when a negative voltage is applied as shown by arrow 5, the oxygen ion transport layer (BM) is in a high resistance state (as shown by arrow 6). HRS) behavior.

The switching device or the nonvolatile memory device according to the embodiment of the present invention uses an oxygen ion transport layer (BM) having a Brown Millerite structure crystallized obliquely oriented across the first electrode and the second electrode as an initial structure. A switching element having bipolar characteristics may be provided with substantially no forming process. In addition, as a result of evaluating the I-V characteristics in the various memory cells shown in FIG. 6, it was confirmed that there is almost no characteristic variation between the memory cells according to the embodiment of the present invention. Therefore, according to the embodiment of the present invention, a high-integrated non-volatile memory device having low power consumption, alleviating performance variation between memory cells when applied to the non-volatile memory device, and having excellent reliability may be provided.

Various non-volatile memory devices disclosed with reference to the accompanying drawings herein may be implemented as a single memory device or other heterogeneous devices within one wafer chip, for example, other devices such as logic processors, image sensors, RF devices. Together with these, they may be implemented in the form of a system on chip (SOC). In addition, the wafer chip in which the nonvolatile memory device is formed and the other wafer chip in which the heterogeneous device is formed may be bonded to each other by using an adhesive, soldering, or wafer bonding technique.

7 is a block diagram illustrating a memory system 500 according to an embodiment of the present invention.

Referring to FIG. 7, the memory system 500 includes a memory controller 510 and a nonvolatile memory device 520. The memory controller 510 may perform an error correction code on the nonvolatile memory device 520. The memory controller 510 may control the nonvolatile memory device 520 by referring to an instruction and an address from the outside.

When the memory controller 510 receives a write request from the host, the memory controller 510 may perform error correction encoding on the write requested data. In addition, the memory controller 510 may control the nonvolatile memory device 520 to program the encoded data into a memory area corresponding to the provided address. In addition, the memory controller 510 may perform error correction decoding on data output from the nonvolatile memory device 520 during a read operation. The error included in the output data may be corrected by the error correction decoding. The memory controller 510 may include an error correction block 515 to detect and correct the error.

The nonvolatile memory device 520 may include a memory cell array 521 and a page buffer 523. The memory cell array 521 may include a single level memory cell or an array of two or more bits of multilevel memory cells. Upon receiving the program command, the memory controller 510 may limit the dispersion of the fringing field according to the above-described embodiments, thereby reducing or suppressing program charge accumulated in an area between memory cells of the charge trap storage layer. have.

8 is a block diagram illustrating a storage device 1000 including a solid state disk (hereinafter, SSD) according to an embodiment of the present invention.

Referring to FIG. 8, the storage device 1000 includes a host 1100 and an SSD 1200. The SSD 1200 may include an SSD controller 1210, a buffer memory 1220, and a nonvolatile memory device 1230. The SSD controller 1210 provides an electrical and physical connection between the host 1100 and the SSD 1200. In one embodiment, SSD controller 1210 provides interfacing with SSD 1200 in response to a bus format of host 1100. In addition, the SSD controller 1210 may decode an instruction provided from the host 1100 and access the nonvolatile memory device 1230 according to the decoded result. Non-limiting examples of the bus format of the host 1100 include Universal Serial Bus (USB), Small Computer System Interface (SCSI), PCI express, Advanced Technology Attachment (ATA), Parallel ATA (PATA), SATA ( Serial ATA), and Serial Attached SCSI (SAS).

Write data provided from the host 1100 or data read from the nonvolatile memory device 1230 may be temporarily stored in the buffer memory 1220. If the data existing in the nonvolatile memory device 1230 is cached at the read request of the host 1100, the buffer memory 1220 may be provided with a cache function that directly provides the cached data to the host 1100. Can be. In general, the data transfer rate by the bus format (eg, SATA or SAS) of the host 1100 may be faster than the transfer rate of the memory channel of the SSD 1200. In this case, a large buffer memory 1220 may be provided to minimize performance degradation caused by speed differences. The buffer memory 1220 for this may be a synchronous DRAM (Dynamic DRAM) to provide sufficient buffering, but is not limited thereto.

The nonvolatile memory device 1230 may be provided as a storage medium of the SSD 1200. For example, the nonvolatile memory device 1230 may include a memory cell having a resistive switching layer according to the above-described embodiment. In another example, a memory system in which a NOR flash memory, a phase change memory, a magnetic memory, a resistive memory, a ferroelectric memory, or a selected heterogeneous memory device is mixed as the nonvolatile memory device 1230 may be used.

9 is a block diagram illustrating a memory system 2000 according to another embodiment of the present invention.

Referring to FIG. 9, the memory system 2000 according to the present invention may include a memory controller 2200 and a nonvolatile memory device 2100. The nonvolatile memory device 2100 may include the variable resistor described with reference to FIGS. 1 to 6. The memory controller 2200 may be configured to control the nonvolatile memory device 2100. SRAM 2230 may be used as the operating memory of CPU 2210. The host interface 2220 may implement a data exchange protocol of a host connected to the memory system 2000. The error correction circuit 2240 included in the memory controller 2200 may detect and correct an error included in data read from the nonvolatile memory device 2100. The memory interface 2260 may interface with the memory device 2100 of the present invention. The CPU 2210 may perform various control operations for exchanging data of the memory controller 2200. The memory system 2000 according to the present invention may further include a ROM (not shown) that stores code data for interfacing with a host.

The memory controller 2100 is configured to communicate with external circuitry (eg, a host) via any one of a variety of interface protocols such as USB, MMC, PCI-E, SAS, SATA, PATA, SCSI, ESDI, or IDE. Can be. The memory system 2000 according to the present invention includes a computer, a portable computer, a UMPC (Ultra Mobile PC), a workstation, a netbook, a PDA, a portable computer, a tablet, a wireless telephone. phone, mobile phone, smart phone, digital camera, digital audio recorder, digital audio player, digital picture recorder It can be applied to various user devices such as digital video player, digital video recorder, digital video player, a device capable of transmitting and receiving information in a wireless environment, and a home network. have.

10 is a block diagram illustrating a data storage device 3000 according to another exemplary embodiment.

Referring to FIG. 10, the data storage device 3000 may include a nonvolatile memory 3100 and a memory controller 3200. The memory controller 3200 may control the nonvolatile memory 3100 based on control signals received from an external circuit of the data storage device 3000. The three-dimensional memory array structure of the nonvolatile memory 3100 may be, for example, a channel stacked structure or a vertical structure, and the structure is exemplary, but the present invention is not limited thereto.

The data storage device 3000 of the present invention may constitute a memory card device, an SSD device, a multimedia card device, an SD card, a memory stick device, a hard disk drive device, a hybrid drive device, or a general-purpose serial bus flash device. For example, the data storage device 3000 of the present invention may be a memory card that satisfies a standard or a standard for using an electronic device such as a digital, a camera, or a personal computer.

FIG. 11 is a block diagram illustrating a nonvolatile memory device 4100 and a computing system 4000 including the same, according to an exemplary embodiment.

Referring to FIG. 11, a computing system 4000 according to the present invention includes a modem 4300 such as a nonvolatile memory device 4100, a memory controller 4200, and a baseband chipset electrically connected to a bus 4400. ), A microprocessor 4500, and a user interface 4600.

The nonvolatile memory device 4100 illustrated in FIG. 11 may be the aforementioned nonvolatile memory device. The computing system 4000 according to the present invention may be a mobile device, in which case a battery 4700 for supplying an operating voltage of the computing system 4000 may be further provided. Although not shown, the computing system according to the present invention may further be provided with an application chipset, a camera image processor (CIS), or a mobile DRAM. The memory controller 4200 and the nonvolatile memory device 4100 may configure, for example, an SSD (Solid State Drive / Disk) using a nonvolatile memory device that stores data.

The nonvolatile memory device and / or memory controller according to the present invention may be mounted using various types of packages. For example, the nonvolatile memory device and / or the memory controller according to the present invention may be a package on package (PoP), ball grid arrays (BGAs), chip scale packages (CSPs), plastic leaded chip carrier (PLCC), plastic dual in Line Package (PDIP), Die in Waffle Pack, Die in Wafer Form, Chip On Board (COB), Ceramic Dual In-Line Package (CERDIP), Plastic Metric Quad Flat Pack (MQFP), Thin Quad Flatpack (TQFP), Small Outline (SOIC), Shrink Small Outline Package (SSOP), Thin Small Outline (TSOP), System In Package (SIP), Multi-Chip Package (MCP), Wafer-level Fabricated Package (WFP), or Wafer-Level Processed It can be implemented using packages such as Stack Package (WSP).

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and alterations are possible within the scope without departing from the technical spirit of the present invention, which are common in the art. It will be apparent to those who have knowledge.

Claims (16)

A first electrode comprising an oxygen ion storage source;
A second electrode in which at least one of electrical and magnetic switching occurs in response to an oxidation or reduction reaction with the oxygen ions; And
Oxygen ion transfer of Brown Millerite structure disposed between the first electrode and the second electrode and having a reversible conducting filament that provides a transfer path of the oxygen ions between the first electrode and the second electrode. Including layers,
The Brown Millerite structure first comprises an oriented Miller Index (111) plane. The method of claim 1,
The electrical property includes at least one of conductance, pyroelectriity, piezoelectric or superconducting,
The magnetic property includes any one of magnetic force or phase change between paramagnetic and ferromagnetic bodies,
The preferentially oriented Miller Index (111) plane is obliquely oriented so as to cross the first electrode and the second electrode. A first electrode comprising an oxygen ion storage source;
A second electrode including an information storage layer in which at least one of electrical and magnetic switching occurs in response to an oxidation or reduction reaction with the oxygen ions; And
Oxygen ion transfer of Brown Millerite structure disposed between the first electrode and the second electrode and having a reversible conducting filament that provides a transfer path of the oxygen ions between the first electrode and the second electrode. Including layers,
The Brown Millerite structure first comprises an oriented Miller Index (111) plane. The method of claim 3, wherein
The oxygen ion transport layer has a topotactic phase transition from at least a portion of the Brown Millerite structure to a perovskite crystal structure by application of an external power signal applied to the first electrode and the second electrode. And forming the reversible conducting filament. The method of claim 3, wherein
The oxygen ion transport layer is a non-volatile comprising SrFeO _x , SrCoO _x Ca ₂ Al ₂ O ₅ , Ca ₂ Fe ₂ O ₅ , or Ca ₂ SiO ₄ (x is a stoichiometric or non-stoichiometric real number) Memory elements. The method of claim 3, wherein
The thickness of the oxygen ion transfer layer is a nonvolatile memory device in the range of 20 nm to 500 nm. The method of claim 3, wherein
And the oxygen ion storage source comprises a conductive metal oxide. The method of claim 7, wherein
And the conductive metal oxide has a perovskite crystal structure. The method of claim 3, wherein
And wherein the preferentially oriented Miller Index (111) plane is obliquely oriented to traverse the first electrode and the second electrode. The method of claim 4, wherein
The first electrode comprises an epitaxial base layer of a perovskite crystal structure for forming the perovskite crystal structure,
And wherein said epitaxial base layer comprises an oriented Miller Index (111) plane first. The method of claim 3, wherein
A first conductive line coupled to the first electrode; And
And a second conductive line coupled to the second electrode. The method of claim 11,
By selecting the first conductive line and the second conductive line, by applying an electrical forming signal flowing through the first electrode and the second electrode, at least a portion of the Brown Millerite structure to the perovskite crystal structure And forming the reversible conducting filaments through the topotactic phase transition. Forming a first electrode comprising an oxygen ion storage source;
Forming an oxygen ion transport layer having a brown millerite structure on the first electrode;
Forming a second electrode on the oxygen ion transfer layer, the second electrode including an information storage layer on which at least one of electrical and magnetic properties occurs in response to an oxidation or reduction reaction with the oxygen ions,
The Brown Millerite structure first comprises a oriented Miller Index (111) plane. The method of claim 13,
Prior to forming the first electrode, further comprising forming a non-conductive epitaxial base layer of a perovskite crystal structure. The method of claim 14,
And wherein said non-conductive epitaxial base layer comprises a oriented Miller Index (111) plane first. The method of claim 13,
And wherein the preferentially oriented Miller Index (111) plane is obliquely oriented to intersect the first electrode and the second electrode.

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