KR102034901B1 - Method for Cleaning Process Chamber - Google Patents
Method for Cleaning Process Chamber Download PDFInfo
- Publication number
- KR102034901B1 KR102034901B1 KR1020130085957A KR20130085957A KR102034901B1 KR 102034901 B1 KR102034901 B1 KR 102034901B1 KR 1020130085957 A KR1020130085957 A KR 1020130085957A KR 20130085957 A KR20130085957 A KR 20130085957A KR 102034901 B1 KR102034901 B1 KR 102034901B1
- Authority
- KR
- South Korea
- Prior art keywords
- process chamber
- cleaning
- wafer
- temperature
- cooling fan
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
- B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
- B08B7/0064—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by temperature changes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical Vapour Deposition (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention relates to a method for cleaning epitaxial growth of a wafer in a process chamber and cleaning the process chamber, the cooling fan being provided on the upper side of the process chamber to lower the temperature of an adjacent region. Reducing the power by a predetermined value, thereby increasing the temperature of the upper lid, introducing HCL gas into the process chamber, and increasing the flow rate of hydrogen gas introduced into the chamber by a predetermined value; Performing a cleaning on the process chamber. Therefore, by adjusting only the power of the cooling fan without setting a separate condition for cleaning the process chamber, it is possible to efficiently remove the process by-products deposited around the upper cover inside the process chamber.
Description
BACKGROUND OF THE
In general, semiconductor devices are formed through a series of processes that selectively and repeatedly perform processes such as photolithography, etching, diffusion, chemical vapor deposition (CVD), ion implantation, and metal deposition on a wafer. do. The deposition process in these semiconductor device manufacturing processes is for forming a film quality required on a wafer. However, during the deposition process for forming the film, film or by-products are deposited not only in a desired region on the wafer but also in the chamber in which the deposition is performed.
The deposits deposited inside the deposition chamber are peeled off as the thickness increases, causing particle generation. The particles thus generated enter the film formed on the wafer or adhere to the film surface to act as a cause of the defect of the device, thereby increasing the defective rate of the product. Therefore, it is necessary to remove the film deposited inside the apparatus before the deposit is peeled off.
In the deposition chamber of a conventional deposition facility, deposits accumulate on the inner wall of the chamber or on the surfaces of components within the chamber during the deposition of phase change material on each wafer, and after the deposition process for a given number of wafers Or delamination of the deposits on the surfaces of the internal parts begins to appear. Therefore, the cleaning process for regularly removing the deposits from the inside of the chamber should be performed by using the deposition process time for a predetermined number of wafers as the cleaning cycle.
If the cleaning is performed without considering the temperature of the upper cover in the conventional cleaning process as described above, the etching efficiency of the silicon deposit deposited on the sidewall and the upper liner of the upper cover is reduced. As a result, silicon deposits remain in the process chamber, additional costs are required for cleaning, and process costs are increased due to purchase of consumables replaced by corrosion.
Repeating this cleaning operation every time with a predetermined number of wafer cycles not only reduces the cleaning efficiency of the process chamber but also adversely affects the quality of the wafers deposited in the incompletely cleaned process chamber, which reduces productivity. Cause.
In order to solve the above problems, the present invention is to propose a cleaning method that can maximize the cleaning efficiency for the process chamber by controlling the temperature of the upper cover when cleaning the inside of the process chamber.
The present invention relates to a method for cleaning epitaxial growth of a wafer in a process chamber and cleaning the process chamber, the cooling fan being provided on the upper side of the process chamber to lower the temperature of an adjacent region. Increasing the temperature of the top cover by reducing power by a predetermined value; Introducing HCL gas into the process chamber; And increasing the flow rate of hydrogen gas introduced into the chamber by a predetermined value to perform cleaning of the process chamber by gas phase etching.
According to the present invention, by controlling the power of the cooling fan without setting a separate condition for cleaning the process chamber, it is possible to efficiently remove the process by-products deposited around the upper cover inside the process chamber.
In addition, the time required for cleaning can be shortened to improve the operation rate of the deposition equipment and to secure stable process conditions.
And, by adjusting the amount of the carrier gas, it is possible to improve the etching effect inside the process chamber to the maximum, it is possible to reduce the defects due to the generation of particles in the process chamber.
1 is a cross-sectional view showing a wafer deposition apparatus according to an embodiment of the present invention.
2 is a graph showing a temperature change of the upper cover according to an embodiment of the present invention
Figure 3 is a graph showing the H2 flow rate in accordance with an embodiment of the present invention
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
1 is a cross-sectional view showing a wafer deposition apparatus.
Referring to FIG. 1, the process chamber is configured substantially symmetrically and includes an
A radiant heating system for heating the semiconductor wafer to a particular deposition temperature is placed above the
The process chamber furthermore comprises a cooling system for cooling the
The
The
An etching reaction performed to clean the inside of the process chamber may be efficiently performed at 1100 ° C. or more. Before the etching process for cleaning the process chamber, the temperature of the susceptor is easily increased, but the inner wall of the chamber and the area around the top cover take time to increase the temperature, which reduces the etching efficiency of the area around the top cover. Process byproducts may be deposited.
The present invention proposes a method of further improving the cleaning effect inside the process chamber by setting the power of the
2 is a graph showing a temperature change of the upper cover according to the comparative example and an embodiment of the present invention. Referring to FIG. 2, the etching of the inside of the chamber is conventionally performed without considering the temperature change of the upper cover, wherein the temperature of the upper cover starts at about 320 ° C. and rises to 440 ° C. FIG.
1 and 2, the
In the embodiment of the present invention by reducing the power of the
That is, before the etching process for cleaning the process chamber as described above, the temperature of the region around the
As a result, decomposition of HCL contained in the reaction gas for etching is activated, and silicon complex is deposited on the
3 is a graph showing the H2 flow rate according to the embodiment of the present invention.
Referring to FIG. 3, when the H 2 gas is injected into the process chamber, the graph shows the etching rate according to the flow rate of the H 2 gas. The abscissa indicates the inflow direction of the H 2 gas with respect to 0, and the − direction indicates the H 2 gas. The diffusion direction is shown. Specifically, the + direction may be the
When the carrier gas, H2 gas, is introduced into the upper and lower directions of the wafer, the H2 gas, which is a carrier gas, serves to diffuse the reaction gas, HCL gas, into the process chamber. At this time, the farther away from the point where the HCL gas is injected may increase the effect of the etching reaction inside the process chamber. In particular, in order to perform etching to the
Therefore, the graph of FIG. 3 shows the results of experimenting with H2 gas at a flow rate in three cases, and when H2 gas was injected by 8slpm in the upper direction and 8slpm in the lower direction (8/8), 30slpm in the upper direction of the wafer, The case where 20slpm is injected in the lower direction (30/20), 60slpm in the wafer upper direction and 20slpm in the lower direction (60/20) is shown.
The graph above shows that the etching slope decreases as the amount of H 2 gas flowing into the upper and lower directions of the wafer decreases. That is, when the H 2 gas is injected by 8 slps in the upper direction of the wafer and 8 slps in the lower direction (8/8), the etching slope is drastically reduced. It can be seen that the diffusion distance of the H 2 gas is diffused to a position of about −240 mm in the direction of the
However, in the case where 60slpm is injected in the upper direction of the wafer and 20slpm in the lower direction (60/20), the etching inclination is reduced than in the above case, and the diffusion distance of the H2 gas is based on the center of the wafer. It can be seen that the diffusion to the position of about -320mm in the direction of).
Therefore, as the flow rate of the H 2 gas is increased by a predetermined value, it can be confirmed that the etching reaction of the process chamber can be effectively performed farther from the center of the wafer. That is, the inside of the process chamber can be etched uniformly, and the quality of the wafer deposited in the uniformly etched process chamber can also be improved.
The present invention can prevent deposition of process by-products around the top cover inside the process chamber by adjusting only the power of the cooling fan without setting a separate condition for cleaning the process chamber. Therefore, the time required for cleaning can be shortened to improve the operation rate of the deposition equipment and to secure stable process conditions.
And, by adjusting the amount of the carrier gas, it is possible to improve the etching effect inside the process chamber as much as possible, it is possible to reduce the defects caused by the generation of particles in the process chamber.
The present invention has been described above with reference to the preferred embodiments, which are merely examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains do not depart from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not possible that are not illustrated above. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.
Claims (3)
Increasing the temperature around the upper cover by reducing the power of the first cooling fan only by a predetermined value among the first cooling fan disposed around the upper cover and the second cooling fan disposed around the lower cover; ;
Introducing HCL gas into the process chamber while the temperature around the top cover is increased; And
Cleaning the process chamber by gas phase etching by increasing a flow rate of hydrogen gas introduced into the chamber by a predetermined value;
Including,
And a flow rate of hydrogen gas introduced into the upper direction of the wafer is 1.5 to 3 times the flow rate of hydrogen gas introduced into the lower direction of the wafer.
The method of cleaning the process chamber by reducing the power of only the first cooling fan by a predetermined value, the temperature around the upper cover is increased by 30 degrees or more relative to the initial temperature.
Hydrogen gas flow rate is injected into the lower direction of the wafer is 20slpm,
The flow rate of the hydrogen gas introduced into the upper direction of the wafer is 30slpm to 60slpm cleaning method of the process chamber.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020130085957A KR102034901B1 (en) | 2013-07-22 | 2013-07-22 | Method for Cleaning Process Chamber |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020130085957A KR102034901B1 (en) | 2013-07-22 | 2013-07-22 | Method for Cleaning Process Chamber |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20150011117A KR20150011117A (en) | 2015-01-30 |
KR102034901B1 true KR102034901B1 (en) | 2019-11-08 |
Family
ID=52482577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020130085957A KR102034901B1 (en) | 2013-07-22 | 2013-07-22 | Method for Cleaning Process Chamber |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR102034901B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101701629B1 (en) | 2015-07-28 | 2017-02-01 | 주식회사 엘지실트론 | Method for Preparing Reactor For Manufacturing Epitaxial Wafer |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102009022224B4 (en) * | 2009-05-20 | 2012-09-13 | Siltronic Ag | Process for producing epitaxial silicon wafers |
DE102011083245B4 (en) * | 2011-09-22 | 2019-04-25 | Siltronic Ag | Method and device for depositing an epitaxial layer of silicon on a semiconductor wafer of monocrystalline silicon by vapor deposition in a process chamber |
-
2013
- 2013-07-22 KR KR1020130085957A patent/KR102034901B1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
KR20150011117A (en) | 2015-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101201964B1 (en) | Epitaxial deposition process and apparatus | |
KR102451617B1 (en) | Integral Process Kit Shield | |
US8512472B2 (en) | Method and apparatus to enhance process gas temperature in a CVD reactor | |
JP5992334B2 (en) | Shadow ring to correct wafer edge and bevel deposition | |
WO2019046453A1 (en) | Integrated epitaxy system high temperature contaminant removal | |
JP5661078B2 (en) | Method and apparatus for depositing a layer on a semiconductor wafer by vapor deposition in a processing chamber | |
KR20170054447A (en) | Susceptor and pre-heat ring for thermal processing of substrates | |
KR101746451B1 (en) | Susceptor and method for producing epitaxial wafer using same | |
KR20120118416A (en) | Method and apparatus for depositing a material layer originating from process gas on a substrate wafer | |
KR20140050682A (en) | Methods and apparatus for the deposition of materials on a substrate | |
US20180138031A1 (en) | Process chamber having separate process gas and purge gas regions | |
WO2016125626A1 (en) | Substrate treatment apparatus and reaction tube | |
US6738683B1 (en) | Apparatus and method for cleaning a bell jar in a barrel epitaxial reactor | |
US20160020086A1 (en) | Doping control methods and related systems | |
KR101139692B1 (en) | Chemical vapor deposition device | |
KR102034901B1 (en) | Method for Cleaning Process Chamber | |
US11670492B2 (en) | Chamber configurations and processes for particle control | |
JP5496721B2 (en) | Film forming apparatus and film forming method | |
TWI590301B (en) | Method for preparing reactor for epitaxial wafer growth | |
US20220375727A1 (en) | Method to improve wafer edge uniformity | |
JP2011171637A (en) | Method of manufacturing epitaxial wafer, and susceptor | |
US20220064785A1 (en) | Apparatus and methods for gas phase particle reduction | |
KR200298459Y1 (en) | Structure for preventing infect of wafer in chamber |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant |