KR102023425B1 - Manufactruing method of circuit board using carrier glass - Google Patents

Abstract

Disclosed are a circuit board using a carrier glass and a method of manufacturing the same, which can improve crack prevention and process handling of a glass core.
A circuit board using a carrier glass according to the present invention includes a glass core having an upper surface and a lower surface and having a first through via penetrating the upper surface and the lower surface; First circuit patterns disposed on the top, bottom, and first through vias of the glass core; An upper resin layer covering an upper surface of the glass core and having a second through via disposed at a position corresponding to the first circuit pattern; A lower resin layer covering a bottom surface of the glass core and having a third through via disposed at a position corresponding to the first circuit pattern; A second circuit pattern disposed in an upper surface of the upper resin layer and a second through via and connected to the first circuit pattern; And a third circuit pattern disposed in a lower surface of the lower resin layer and a third through via and connected to the first circuit pattern.

Description

Manufacturing method of circuit board using carrier glass {MANUFACTRUING METHOD OF CIRCUIT BOARD USING CARRIER GLASS}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board and a method for manufacturing the same, and more particularly, to a circuit board using a carrier glass and a method for manufacturing the same that can improve crack prevention and process handling of the glass core.

In addition to the growth of smartphones and tablet PCs, multi-functionality, high-speed signal transmission, and light and small features of PCB are required.In order to improve warpage according to light and small size, modulus is used instead of CCL. Development of glass circuit boards (GCBs) using high glass cores is being actively conducted.

However, in the related art, cracks are generated in the glass core even during a small physical impact during the process for manufacturing GCB, causing cracks in handling and cracks inside the equipment during the process, thereby causing contamination of the solution.

In addition, when the glass core is manufactured by stacking prepreg (PPG) and copper foil on both sides in order to increase the impact resistance of the glass core, there is a problem that the glass core is broken even at a low pressure during the hot press process.

In addition, there is a problem that the glass wool is replaced with only the glass core, and the initial purpose of replacing the existing CCL with the glass core having a high modulus disappears.

In particular, in recent years, as the size of a substrate increases, cracks are frequently generated due to handling and physical impact on a substrate line when a process is performed using an ultra-thin glass core. This causes problems of contamination of the solution, difficulty in handling the process and reduction of yield.

Related prior arts are Korean Patent Publication No. 10-2011-0055133 (published May 25, 2011), which discloses a carrier for manufacturing a printed circuit board, a method for manufacturing the same, and a method for manufacturing a printed circuit board using the same. .

It is an object of the present invention to provide a circuit board using a carrier glass and a method of manufacturing the same, which can improve crack prevention and process handling of the glass core.

A circuit board using a carrier glass according to an embodiment of the present invention for achieving the above object has a glass core having an upper surface and a lower surface, and having a first through via penetrating the upper and lower surfaces; First circuit patterns disposed on the top, bottom, and first through vias of the glass core; An upper resin layer covering an upper surface of the glass core and having a second through via disposed at a position corresponding to the first circuit pattern; A lower resin layer covering a bottom surface of the glass core and having a third through via disposed at a position corresponding to the first circuit pattern; A second circuit pattern disposed in an upper surface of the upper resin layer and a second through via and connected to the first circuit pattern; And a third circuit pattern disposed in a lower surface of the lower resin layer and a third through via and connected to the first circuit pattern.

The circuit board manufacturing method using a carrier glass according to an embodiment of the present invention for achieving the above object is (a) after attaching a glass core via an adhesive member on the carrier glass, by removing a portion of the glass core Forming a through via; (b) forming a first metal pattern on the top surface of the glass core and in the first through via; (c) forming an upper resin layer covering an upper surface of the glass core on which the first metal pattern is formed, and then removing a portion of the upper resin layer to form a second through via exposing a portion of the first metal pattern step; (d) forming a second metal layer on the upper surface of the upper resin layer and the second through via, and then attaching a surface protection film covering the second metal layer; (e) removing the carrier glass and the adhesive member from the lower surface of the glass core and forming a first circuit pattern by forming a lower pad portion connected to the first metal pattern on the lower surface of the glass core; (f) forming a lower resin layer covering the lower surface of the first circuit pattern and the glass core, and then removing a portion of the lower resin layer to form a third through via exposing a portion of the first circuit pattern. step; (g) forming a third metal layer connected to the first circuit pattern in a lower surface of the lower resin layer and a third through via; And (h) removing the surface protection film and patterning the second metal layer and the third metal layer, respectively, to form a second circuit pattern and a third circuit pattern, respectively.

The circuit board using the carrier glass and the method of manufacturing the same according to the present invention can not only protect the glass core from physical shock which is a weak point of the glass core by attaching the glass core onto a carrier glass having a thickness of 0.5 mm or more. After completing the process, there is an advantage that it is possible to reuse the carrier glass.

As a result, the circuit board and the manufacturing method using the carrier glass according to the present invention can improve the crack prevention and process handling properties of the glass core, the solution contamination by cracks generated during the process by improving the handleability of the glass core It is possible to improve the risk and to increase the yield by reducing cracking of the glass core.

1 is a cross-sectional view showing a circuit board using a carrier glass according to an embodiment of the present invention.
2 to 17 is a cross-sectional view showing a circuit board manufacturing method using a carrier glass according to an embodiment of the present invention.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, only the present embodiments to make the disclosure of the present invention complete, and common knowledge in the art to which the present invention pertains. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, a circuit board using a carrier glass and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view showing a circuit board using a carrier glass according to an embodiment of the present invention.

Referring to FIG. 1, a circuit board 100 using a carrier glass according to an exemplary embodiment of the present invention may include a glass core 110, a first circuit pattern 120, an upper resin layer 130, and a lower resin layer 140. , A second circuit pattern 150 and a third circuit pattern 160.

The glass core 110 has an upper surface 110a and a lower surface 110b, and has a first through via V1 penetrating through the upper surface 110a and the lower surface 110b. The first through via V1 may be formed by removing a portion of the glass core 110 by laser drilling, mechanical drilling, punching, or the like.

At this time, the glass core 110 is preferably used having a thickness of less than 150㎛, more preferably 10 ~ 100㎛, which should have a thickness range of 10㎛ or more to be able to handle the glass core 110 This is because it is suitable for implementing ultra-thin.

As described above, in order to stably handle the ultra thin glass core 110, the impact resistance of the glass core 110 is increased by using the carrier glass (10 in FIG. 2), and by using such a carrier glass, the ultra thin It was possible to manufacture a circuit board.

At this time, in the present invention, the glass core 110 can be protected from physical shock by attaching the glass core 110 on a thick carrier glass of 0.5 mm or more, more preferably 0.5 to 5 mm, and proceeding the process. After completing the process, there is an advantage that it is possible to reuse the carrier glass.

The first circuit pattern 120 is disposed in the top surface 110a, the bottom surface 110b, and the first through via V1 of the glass core 110. In this case, the first circuit pattern 120 includes an upper pad portion 122 disposed on the upper surface 110a of the glass core 110 and a lower pad portion 124 disposed on the lower surface 110b of the glass core 110. And through via portions 126 disposed in the first through vias V1 and connecting the upper and lower pad portions 122 and 124. The first circuit pattern 120 is formed of at least one of copper (Cu), nickel (Ni), titanium (Ti), aluminum (Al), gold (Au), silver (Ag), and chromium (Cr). Among them, it is preferable to use copper (Cu).

The upper resin layer 130 covers the upper surface 110a of the glass core 110 and has a second through via V2 disposed at a position corresponding to the first circuit pattern 120. Accordingly, the second through via V2 exposes a portion of the upper pad part 122 of the first circuit pattern 120. The second through via V2 may be formed by removing a portion of the upper resin layer 130 by laser drilling, mechanical drilling, punching, or the like.

The lower resin layer 140 covers the lower surface 110b of the glass core 110 and has a third through via V3 disposed at a position corresponding to the first circuit pattern 120. Accordingly, the third through via V3 exposes a portion of the lower pad part 124 of the first circuit pattern 120. The third through via V3 may be formed by removing a portion of the lower resin layer 140 by laser drilling, mechanical drilling, punching, or the like.

Here, each of the upper and lower resin layers 130 and 140 may include at least one material selected from Ajinomoto Build-up Film (ABF), prepreg (PPG), and copper foil adhesive resin (RCC).

The second circuit pattern 150 is disposed in the upper surface of the upper resin layer 130 and the second through via V2, and is electrically connected to the first circuit pattern 120. More specifically, the second circuit pattern 150 is electrically connected directly to the upper pad portion 122 of the first circuit pattern 120. In this case, the second circuit pattern 150 may be formed of at least one of copper (Cu), nickel (Ni), titanium (Ti), aluminum (Al), gold (Au), silver (Ag), and chromium (Cr). It may be formed, of which it is preferable to use copper (Cu).

The third circuit pattern 160 is disposed in the lower surface of the lower resin layer 140 and in the third through via V3 to be electrically connected to the first circuit pattern 120. More specifically, the third circuit pattern 160 is electrically connected directly to the lower pad portion 124 of the first circuit pattern 120. In this case, the third circuit pattern 160 may be formed of at least one of copper (Cu), nickel (Ni), titanium (Ti), aluminum (Al), gold (Au), silver (Ag), and chromium (Cr). It may be formed, of which it is preferable to use copper (Cu).

In addition, the circuit board 100 using the carrier glass according to the embodiment of the present invention further includes a first solder mask pattern 170 and a second solder mask pattern 180.

The first solder mask pattern 170 exposes the second circuit pattern 150 and covers the upper surface of the upper resin layer 130.

The second solder mask pattern 180 exposes the third circuit pattern 160 and covers the lower surface of the lower resin layer 140. In this case, the first and second solder mask patterns 170 and 180 may expose all or part of the second and third circuit patterns 150 and 160.

The first and second solder mask patterns 170 and 180 may be a photo solder resist (PSR), a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, or the like. Can be.

The circuit board using the carrier glass according to the embodiment of the present invention described above not only protects the glass core from physical shock, which is a weak point of the glass core, by adhering the glass core onto a thick carrier glass of 0.5 mm or more. After completing the process, there is an advantage that it is possible to reuse the carrier glass.

As a result, the circuit board using the carrier glass according to the embodiment of the present invention can improve crack prevention and process handling of the glass core, and solution contamination and risk due to cracks generated during the process by improving the handleability of the glass core. It is possible to improve the efficiency and to increase the yield by reducing cracking of the glass core.

Hereinafter, a circuit board manufacturing method using a carrier glass according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 to 17 are cross-sectional views illustrating a method of manufacturing a circuit board using a carrier glass according to an exemplary embodiment of the present invention.

As shown in FIG. 2, the glass core 110 is attached to the carrier glass 10 via the adhesive member 20.

The carrier glass 10 serves to protect the glass core 110 from physical impact, which is a weak point of the ultra-thin glass core 110 of 150 μm or less. To this end, the carrier glass 10 preferably has a thick thickness of 0.5 mm or more, more preferably 0.5 to 5 mm, which increases the impact resistance of the glass core 110 when it has a thickness of less than 0.5 mm. Difficulties can follow.

As described above, in the present invention, the glass core 110 is attached to the carrier glass 10 having a thickness of 0.5 mm or more, so that the glass core 110 may be stably protected from physical shock.

The carrier glass 10 may be any one selected from soda-lime glass, bare glass, TGV glass (through glass via glass), and the like, and more preferably, soda-lime glass is used.

The adhesive member 20 is used for the purpose of attaching the glass core 110 to the carrier glass 10. The adhesive member 20 may be used without particular limitation as long as it is a material that can be separated at a high temperature of about 70 ° C. or more, and specific examples include an adhesive selected from polyurethane, acrylic, EVA (ethylene co-vinyl acetate), PVAc (polyvinyl acetate), and the like. Can be used.

The glass core 110 has an upper surface 110a and a lower surface 110b. At this time, it is preferable to attach the lower surface 110b of the glass core 110 to the carrier glass 10 via the adhesive member 20. The glass core 110 is preferably used having a thickness of less than 150㎛, more preferably 10 ~ 100㎛, which should have a thickness range of 10㎛ or more to be able to handle the glass core 110. It is because it is suitable for implementing ultra-thin.

Here, the glass core 110 has a first area, and the carrier glass 10 preferably has a second area that is wider than the first area, which makes the carrier glass 10 wider than the area of the glass core 110. This is to ensure a more stable impact resistance of the glass core 110 by design.

As shown in FIG. 3, a portion of the glass core 110 is removed to form the first through via V1. In this case, the first through via V1 may be formed by removing a portion of the glass core 110 by laser drilling, mechanical drilling, punching, or the like.

Next, the first seed layer 120a is formed in the upper surface 110a and the first through via V1 of the glass core 110. In this case, the first seed layer 120a may be formed by depositing a metal by a sputtering method, but is not limited thereto.

As shown in FIG. 4, a first metal layer (not shown) is formed in the upper surface 110a and the first through via V1 of the glass core 110 through the first seed layer 120a in FIG. 3. Thereafter, the first metal layer is selectively patterned to form the first metal pattern 125. Accordingly, the first metal pattern 125 is disposed in the upper surface 110 and the first through via V1 of the glass core 110.

As shown in FIG. 5, the upper resin layer 130 covering the upper surface 110a of the glass core 110 on which the first metal pattern 125 is formed is formed. In this case, the upper resin layer 130 may be one or more materials selected from Ajinomoto Build-up Film (ABF), prepreg (PPG), and copper foil adhesive resin (RCC). The upper resin layer 130 may be attached to the glass core 110 by bonding the upper resin layer 130 by hot pressing in a state in which the upper resin layer 130 is laminated on the upper surface 110a of the glass core 110.

Next, as shown in FIG. 6, a portion of the upper resin layer 130 is removed to form a second through via V2 exposing a portion of the first metal pattern 125. In this case, the second through via V2 may be formed by removing a portion of the upper resin layer 130 by laser drilling, mechanical drilling, punching, or the like.

Next, the second seed layer 150a is formed on the upper surface of the upper resin layer 130 and the second through via V2. In this case, the second seed layer 150a may be formed by a plating method using the first metal pattern 125, but is not limited thereto.

As illustrated in FIG. 7, the second metal layer 155 is formed on the upper surface of the upper resin layer 130 and the second through via V2 through the second seed layer 150a of FIG. 6. The second metal layer 155 may be formed by performing a plating process via the second seed layer, but is not limited thereto.

Next, as shown in FIG. 8, the surface protection film 200 covering the second metal layer 155 is attached. In this case, the surface protection film 200 may be made of any one material of polyimide (PI), polyethylene terephthalate (PET), polyethylene (PE), and polycarbonate (PC).

As shown in FIG. 9, the carrier glass (10 in FIG. 8) and the adhesive member (20 in FIG. 8) are removed from the bottom surface 110b of the glass core 110. Accordingly, the lower surface 110b of the glass core 110 and a part of the first metal pattern 125 are exposed to the outside. Here, since the carrier glass, which has been attached to the lower surface 110b of the glass core 110 through the adhesive member, may be removed from the glass core 110 and recovered, the glass may be reused.

As shown in FIG. 10, the lower seed layer 127 is formed on the lower surface 110b of the glass core 110 and the lower portion of the first metal pattern 125. The lower seed layer 127 may be formed by depositing a metal by sputtering, but is not limited thereto.

Next, as shown in FIG. 11, the lower seed layer (127 of FIG. 10) is selectively patterned to connect the lower metal layer (125 of FIG. 10) to the lower surface 110b of the glass core 110. The pad part 124 is formed to form the first circuit pattern 120. Accordingly, the first circuit pattern 120 includes the upper pad portion 122 disposed on the upper surface 110a of the glass core 110 and the lower pad portion 124 disposed on the lower surface 110b of the glass core 110. ) And through vias 126 disposed in the first through vias V1 to connect the upper and lower pad portions 122 and 124.

As shown in FIG. 12, the lower resin layer 140 covering the first circuit pattern 120 and the lower surface 110b of the glass core 110 is formed. In this case, the lower resin layer 140 may be one or more materials selected from Ajinomoto Build-up Film (ABF), prepreg (PPG), and copper foil adhesive resin (RCC). The lower resin layer 140 may be attached to the glass core 110 by bonding the lower resin layer 140 in a state of being laminated on the bottom surface 110b of the glass core 110 by hot pressing.

As shown in FIG. 13, a portion of the lower resin layer 140 is removed to form a third through via V3 exposing a portion of the first circuit pattern 120. Accordingly, the third through via V3 exposes a portion of the lower pad part 124 of the first circuit pattern 120. The third through via V3 may be formed by removing a portion of the lower resin layer 140 by laser drilling, mechanical drilling, punching, or the like.

Next, the third seed layer 160a is formed in the lower surface of the lower resin layer 140 and in the third through vias V3. In this case, the third seed layer 160a may be formed by a plating method using the first circuit pattern 120, but is not limited thereto.

As illustrated in FIG. 14, a third surface connected to the first circuit pattern 120 in the lower surface of the lower resin layer 140 and the third through via V3 through the third seed layer 160a of FIG. 13. The metal layer 165 is formed. The third metal layer 165 may be formed by performing a plating process via the third seed layer, but is not limited thereto.

As shown in FIG. 15, the surface protection film 200 (FIG. 14) on the second metal layer 155 is removed. Accordingly, the second metal layer 155 under the surface protection film is exposed to the outside.

Next, as shown in FIG. 16, the second metal layer 155 of FIG. 15 and the third metal layer 165 of FIG. 15 are respectively patterned to expose the second circuit pattern 150 and the third circuit. Each pattern 160 is formed.

In this case, the second circuit pattern 150 is electrically connected directly to the upper pad portion 122 of the first circuit pattern 120, and the third circuit pattern 160 is the lower pad portion of the first circuit pattern 120. 124 is electrically connected directly.

As shown in FIG. 17, the second circuit pattern 150 is exposed, and the first solder mask pattern 170 and the third circuit pattern 160 covering the upper surface of the upper resin layer 130 are exposed. The second solder mask pattern 180 covering the lower surface of the lower resin layer 140 is formed.

In this case, the first and second solder mask patterns 170 and 180 may include a photo solder resist (PSR), a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, or the like. This can be used.

As described above, the circuit board manufacturing method using a carrier glass according to an embodiment of the present invention to protect the glass core from physical impact which is a weak point of the glass core by attaching the glass core on a carrier glass thicker than 0.5mm In addition to being able to do this, after completing the process, it is possible to reuse the carrier glass.

As a result, the circuit board manufacturing method using the carrier glass according to the embodiment of the present invention can improve crack prevention and process handling of the glass core, and solution contamination by cracks generated during the process by improving the handleability of the glass core. And the risk can be improved, and the yield increase effect by the crack reduction of a glass core can be aimed at.

Although the above has been described with reference to the embodiments of the present invention, various changes and modifications can be made at the level of those skilled in the art. Such changes and modifications can be said to belong to the present invention without departing from the scope of the technical idea provided by the present invention. Therefore, the scope of the present invention will be determined by the claims described below.

100: circuit board 120: first circuit pattern
130: upper resin layer 140: lower resin layer
150: second circuit pattern 160: third circuit pattern
170: first solder mask pattern 180: second solder mask pattern
V1, V2, V3: first through third through vias 10: carrier glass
20: adhesive member

Claims (13)

delete delete delete delete delete (a) attaching a glass core to the carrier glass via an adhesive member, and then removing a portion of the glass core to form a first through via;
(b) forming a first metal pattern on the top surface of the glass core and in the first through via;
(c) forming an upper resin layer covering an upper surface of the glass core on which the first metal pattern is formed, and then removing a portion of the upper resin layer to form a second through via exposing a portion of the first metal pattern step;
(d) forming a second metal layer on the upper surface of the upper resin layer and the second through via, and then attaching a surface protection film covering the second metal layer;
(e) removing the carrier glass and the adhesive member from the lower surface of the glass core and forming a first circuit pattern by forming a lower pad portion connected to the first metal pattern on the lower surface of the glass core;
(f) forming a lower resin layer covering the lower surface of the first circuit pattern and the glass core, and then removing a portion of the lower resin layer to form a third through via exposing a portion of the first circuit pattern. step;
(g) forming a third metal layer connected to the first circuit pattern in a lower surface of the lower resin layer and a third through via; And
(h) removing the surface protection film and patterning the second metal layer and the third metal layer, respectively, to form a second circuit pattern and a third circuit pattern, respectively;
Circuit board manufacturing method using a carrier glass comprising a.
The method of claim 6,
In the step (a),
The carrier glass
A circuit board manufacturing method using a carrier glass, characterized in that it has a thickness of 0.5mm or more.
The method of claim 6,
In the step (a),
The glass core is
A circuit board manufacturing method using a carrier glass, characterized in that it has a thickness of less than 150㎛.
The method of claim 6,
In the step (a),
The glass core has a first area,
The carrier glass manufacturing method of a circuit board using a carrier glass, characterized in that the second area larger than the first area.
The method of claim 6,
Each of the upper and lower resin layers
A method for manufacturing a circuit board using a carrier glass, comprising at least one material selected from Ajinomoto Build-up Film (ABF), prepreg (PPG), and copper foil adhesive resin (RCC).
The method of claim 6,
In step (d),
The surface protective film
A method of manufacturing a circuit board using a carrier glass, characterized in that it comprises any one material of polyimide (PI), polyethylene terephthalate (PET), polyethylene (PE), and polycarbonate (PC).
The method of claim 6,
In the step (e),
The first circuit pattern is
An upper pad portion disposed on an upper surface of the glass core,
A lower pad portion disposed on a lower surface of the glass core,
And a through via portion disposed in the first through via and connecting the upper pad portion and the lower pad portion to each other.
The method of claim 6,
After step (h),
(i) a second solder mask pattern exposing the second circuit pattern and covering the upper surface of the upper resin layer, and a second solder mask pattern exposing the third circuit pattern and covering the lower surface of the lower resin layer. Method of manufacturing a circuit board using a carrier glass, characterized in that it further comprises forming.

Images