KR102010317B1 - 재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 동적 체크포인팅 - Google Patents

재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 동적 체크포인팅 Download PDF

Info

Publication number
KR102010317B1
KR102010317B1 KR1020130160343A KR20130160343A KR102010317B1 KR 102010317 B1 KR102010317 B1 KR 102010317B1 KR 1020130160343 A KR1020130160343 A KR 1020130160343A KR 20130160343 A KR20130160343 A KR 20130160343A KR 102010317 B1 KR102010317 B1 KR 102010317B1
Authority
KR
South Korea
Prior art keywords
rename
check
data
order buffer
entries
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020130160343A
Other languages
English (en)
Korean (ko)
Other versions
KR20140113305A (ko
Inventor
라비 아이옌가
프라스나 사다나크리쉬난
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/831,488 external-priority patent/US9448799B2/en
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Publication of KR20140113305A publication Critical patent/KR20140113305A/ko
Application granted granted Critical
Publication of KR102010317B1 publication Critical patent/KR102010317B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Retry When Errors Occur (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
KR1020130160343A 2013-03-14 2013-12-20 재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 동적 체크포인팅 Active KR102010317B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/831,488 2013-03-14
US13/831,488 US9448799B2 (en) 2013-03-14 2013-03-14 Reorder-buffer-based dynamic checkpointing for rename table rebuilding

Publications (2)

Publication Number Publication Date
KR20140113305A KR20140113305A (ko) 2014-09-24
KR102010317B1 true KR102010317B1 (ko) 2019-08-13

Family

ID=51419101

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130160343A Active KR102010317B1 (ko) 2013-03-14 2013-12-20 재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 동적 체크포인팅

Country Status (4)

Country Link
JP (1) JP6399772B2 (https=)
KR (1) KR102010317B1 (https=)
CN (1) CN104050027B (https=)
DE (1) DE102014103183A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9448800B2 (en) * 2013-03-14 2016-09-20 Samsung Electronics Co., Ltd. Reorder-buffer-based static checkpointing for rename table rebuilding

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5630149A (en) 1993-10-18 1997-05-13 Cyrix Corporation Pipelined processor with register renaming hardware to accommodate multiple size registers
US6629233B1 (en) 2000-02-17 2003-09-30 International Business Machines Corporation Secondary reorder buffer microprocessor
US7747841B2 (en) 2005-09-26 2010-06-29 Cornell Research Foundation, Inc. Method and apparatus for early load retirement in a processor system
US20120079488A1 (en) 2010-09-25 2012-03-29 Phillips James E Execute at commit state update instructions, apparatus, methods, and systems

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996025705A1 (en) * 1995-02-14 1996-08-22 Fujitsu Limited Structure and method for high-performance speculative execution processor providing special features
JP2000285082A (ja) * 1999-03-31 2000-10-13 Toshiba Corp 中央演算装置及びコンパイル方法
US6742112B1 (en) * 1999-12-29 2004-05-25 Intel Corporation Lookahead register value tracking
US20060149931A1 (en) * 2004-12-28 2006-07-06 Akkary Haitham Runahead execution in a central processing unit
US20070043934A1 (en) * 2005-08-22 2007-02-22 Intel Corporation Early misprediction recovery through periodic checkpoints
US7809926B2 (en) * 2006-11-03 2010-10-05 Cornell Research Foundation, Inc. Systems and methods for reconfiguring on-chip multiprocessors
JP5547208B2 (ja) * 2008-11-24 2014-07-09 インテル コーポレイション シーケンシャル・プログラムを複数スレッドに分解し、スレッドを実行し、シーケンシャルな実行を再構成するシステム、方法および装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5630149A (en) 1993-10-18 1997-05-13 Cyrix Corporation Pipelined processor with register renaming hardware to accommodate multiple size registers
US6629233B1 (en) 2000-02-17 2003-09-30 International Business Machines Corporation Secondary reorder buffer microprocessor
US7747841B2 (en) 2005-09-26 2010-06-29 Cornell Research Foundation, Inc. Method and apparatus for early load retirement in a processor system
US20120079488A1 (en) 2010-09-25 2012-03-29 Phillips James E Execute at commit state update instructions, apparatus, methods, and systems

Also Published As

Publication number Publication date
DE102014103183A8 (de) 2014-11-13
JP6399772B2 (ja) 2018-10-03
JP2014179096A (ja) 2014-09-25
CN104050027A (zh) 2014-09-17
CN104050027B (zh) 2018-11-27
KR20140113305A (ko) 2014-09-24
DE102014103183A1 (de) 2014-09-18

Similar Documents

Publication Publication Date Title
TWI681333B (zh) 可靠度提升系統、方法和電腦可讀取媒體
TWI470547B (zh) 非循序執行微處理器及其操作方法
JP5904993B2 (ja) マルチスレッド・コードをデバッグする方法、システム、及びコンピュータ・プログラム
US20160055004A1 (en) Method and apparatus for non-speculative fetch and execution of control-dependent blocks
TWI506550B (zh) 管線式微處理器、執行兩種條件分支指令的方法以及其電腦程式產品
US8856496B2 (en) Microprocessor that fuses load-alu-store and JCC macroinstructions
US8954797B2 (en) Reconfigurable recovery modes in high availability processors
KR102021957B1 (ko) 재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 정적 체크포인팅
KR20170097633A (ko) 융합된 단일 사이클 증가-비교-점프를 수행하기 위한 명령어 및 로직
JP2011086289A (ja) レジスタ状態の保存および復元
CN105122206A (zh) 用于支持推测的访客返回地址栈仿真的方法和装置
CN100377078C (zh) 修正管线作业微处理器中分支指令预测错误的装置
US9594564B2 (en) Arithmetic processing device and control method of arithmetic processing device
HK1214377A1 (zh) 具有世代重命名的計算機處理器
KR20190038989A (ko) 나누기와 곱하기-빼기 연산들을 병합하기 위한 시스템 및 방법
US11663011B2 (en) System and method of VLIW instruction processing using reduced-width VLIW processor
CN102163139B (zh) 微处理器融合载入算术/逻辑运算及跳跃宏指令
WO2012107800A1 (en) Integrated circuit devices and methods for scheduling and executing a restricted load operation
KR102010317B1 (ko) 재명명 테이블 재구성을 위한 리오더-버퍼를 기초로 하는 동적 체크포인팅
CN102023841B (zh) 微处理器以及相关指令执行方法
Lim et al. LARECD: Low area overhead and reliable error correction DMR architecture
US12487829B2 (en) Macro-op fusion for pipelined architectures
US20230028929A1 (en) Execution elision of intermediate instruction by processor
US20160026401A1 (en) Updating of shadow registers in n:1 clock domain
JPH0764803A (ja) プロセッサ

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20131220

PG1501 Laying open of application
A201 Request for examination
A302 Request for accelerated examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20181218

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 20131220

Comment text: Patent Application

PA0302 Request for accelerated examination

Patent event date: 20181218

Patent event code: PA03022R01D

Comment text: Request for Accelerated Examination

Patent event date: 20131220

Patent event code: PA03021R01I

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20190408

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20190704

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20190807

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20190808

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20220706

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20230705

Start annual number: 5

End annual number: 5

PR1001 Payment of annual fee

Payment date: 20240625

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 20250625

Start annual number: 7

End annual number: 7