KR102006674B1 - Driver having self-test and self-repair function for flat panel display - Google Patents

Abstract

Disclosed is a driving device with self-test and self-repair functions for flat panel display. According to one embodiment of the present invention, the driving device for flat panel display comprises: a first data driver connected to each one end of odd-numbered column lines among the M number of column lines in a pixel array in which a pixel circuit with N rows x M columns is disposed; a second data driver connected to each other end of the even-numbered column lines among the M number of column lines; and a gate driver connected to the N number of row lines in the pixel array. The first data driver is operated in one of a driving mode for driving the pixel circuit and test mode for detecting whether a driver or line is bad, and the second data driver is operated in the other one of the driving mode and test mode.

Description

DRIVER HAVING SELF-TEST AND SELF-REPAIR FUNCTION FOR FLAT PANEL DISPLAY}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display driving apparatus, and more particularly, to a driving apparatus having a self test and self repair function for a flat panel display.

Recently, a flat panel display device has been widely used, and a flat panel display device has been implemented in various ways such as a liquid crystal display, a light emitting diode display, and an organic light emitting diode display.

FIG. 1 is a diagram illustrating a configuration of a flat panel display device according to the related art, FIG. 2 is a diagram illustrating a detailed configuration of a pixel array of FIG. 1, and FIG. 3 is a diagram illustrating a detailed configuration of a data driver of FIG. 1.

Referring to FIGS. 1 to 3, a general flat panel display apparatus drives a voltage corresponding to a gray scale value for determining brightness of a pixel array 10 in which R × C pixels are arranged in two dimensions. It is composed of a column driver (data driver) or data driver (data driver) 20, a row driver (gate driver) or a gate driver (40) for driving the activation signal in the row unit of each pixel have. The shape and structure of the display device may be determined by the manufacturer. In the case of a display, the column lines and row lines of the pixel array are determined by the resolution. For example, a 1920 x 1080 Full-HD screen consists of 1920 column lines and 1080 row lines.

The row lines thus configured are sequentially selected to store analog or digital data in each pixel through the column lines. When storing digital data, the entire row line selection must be made several times because the N-bit signal is converted to 1-bit and stored sequentially.

In the case of the analog pixel driving method, the color of the screen is determined according to the voltage VLC across the liquid crystal (LC) device according to the size of the stored value. In the case of the digital pixel driving method, the color of the screen is determined by the occupancy ratio of '0' or '1' stored in the pixel over time. For example, more '0's are closer to black, and more' 1s' are closer to white. Of course, it may be reversed by the material or voltage constituting the pixel.

Repeat the above method to change the values to new values after all the pixels have been stored.

In the conventional flat panel display, each driving element (column driver, row driver) is manufactured as each unit element and is separated from the pixel array. In this case, the output of each driving element is electrically measured to check for defects. It is to judge.

However, if the spacing and area of the output of the drive element are difficult to test using general test equipment, the pixel circuit and the drive circuit are integrated on one substrate, for example, a micro display, so that each output is at least required for semiconductor or component measurement. If the area or spacing is not secured or the technical difficulty is so high that it cannot be reflected in actual production, there is no way to measure it. Can be.

As such, after the final manufacturing of the display product, the test fails to identify the defect of the unit component or the device, thereby causing additional cost by performing an additional post-process on the defective substrate.

In addition, in the case of a conventional driving circuit, as thousands of driving circuits are integrated into a single integrated circuit, a relatively high defect rate is obtained according to a process, which causes a decrease in yield.

In the case of the existing pixel array, each drive line is long and vertically distributed on the flat display side or left and right, and the possibility of a defect is very high, and considering the area of the flat panel display, the connection line may be defective even with a small number of defects. In addition, because millions of pixels are built in, the defective rate of the pixels is very high.

Patent Application Publication No. 10-1238006, Publication Date March 08, 2013

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art. The present invention provides a drive device having a self-test and self-repair function for a flat panel display in which switches are connected in parallel and self-test or self-repair functions are activated according to on / off of the connected switch.

It should be understood, however, that the present invention is not limited to the above-described embodiments, and may be variously modified without departing from the spirit and scope of the present invention.

In order to achieve the above object of the present invention, a driving device for a flat panel display according to an aspect of the present invention is connected to one end of each of the odd-numbered column lines of the M column lines in the pixel array in which the pixel circuit of N rows x M columns is disposed. A first data driver; A second data driver connected to the other end of each even column line among the M column lines; And a gate driver connected to the N row lines in the pixel array, wherein the first data driver is any one of a driving mode for driving the pixel circuit and a test mode for detecting whether a driver or a line is defective. The second data driver may be operated in another of the driving mode and the test mode.

The first data driver may be disposed on one side of the pixel array, and the second data driver may be disposed on the opposite side of the pixel array.

Also, when the first data driver connected to the m th column line is operated in the driving mode, the second data driver connected to the (m + 1) th line is connected to the first data driver or the first data driver. When the second data driver connected to the (m + 1) th column line is operated in the driving mode and the second data driver connected to the (m + 1) th column line is operated in the driving mode, the first data driver connected to the mth column line is It may be operated in a test mode for detecting whether the (m + 1) th column line connected to the second data driver or the second data driver is defective.

The first data driver and the second data driver may each include a plurality of unit data drivers, and each of the plurality of unit data drivers may include a latch configured to store digital data; A digital analog converter (DAC) for converting the digital data into an analog signal of a first voltage or an analog signal of a second voltage lower than the first voltage; Amplifies the analog signal of the first voltage and outputs it to the m-th column line, or compares the analog signal of the second voltage and the analog signal of the first voltage input from the m-th column line to obtain a comparison value (m + 1). A driver for outputting to the first column line; And a first switch and a second switch connected in parallel to a feedback loop from an output terminal of the driver, wherein the first switch is connected to an output terminal of a driver having one end connected to an m-th row line and the other end connected to an inverting input terminal. The second switch may have one end connected to the (m + 1) th row line and the other end connected to the other end of the first switch.

Further, when the first data driver or the second data driver is operated in the driving mode, the first switch is turned on and the second switch is turned off, and the DAC outputs an analog signal of the first voltage. The driver may amplify an analog signal of the first voltage and output the amplified analog signal to the m th column line through the driving switch.

Further, when the first data driver or the second data driver is operated in the test mode, the first switch is turned off and the second switch is turned on, and the DAC outputs an analog signal of the second voltage. The driver may compare the analog signal of the second voltage with the analog signal of the first voltage and output a comparison value to the (m + 1) th column line through the second switch as a result of the comparison. .

The gate driver may further include a first gate driver connected to one end of each of the odd-numbered row lines of the N row lines in the pixel array; And a second gate driver connected to the other ends of the even-numbered row lines of the N row lines, wherein the first gate driver detects a driving mode for driving the pixel circuit, and whether the driver or the line is defective. The second gate driver may be operated in any one of the driving mode and the test mode.

The gate driver may further include a first gate driver connected to one end of each of the N row lines of the pixel array; And a second gate driver connected to the other ends of each of the N row lines, wherein the first gate driver is a driving mode for driving the pixel circuit and a test mode for detecting whether a driver or a line is defective. The second gate driver may be operated in any one of the driving mode and the test mode.

According to another aspect of the present invention, a driving apparatus for a flat panel display includes a plurality of unit data drivers connected to one end of an odd-numbered column line among M column lines in a pixel array in which pixel circuits of N rows x M columns are disposed. A first data driver; A second data driver including a plurality of unit data drivers connected to the other ends of the even-numbered column lines of the M column lines; And a gate driver connected to the N row lines in the pixel array, and when the unit data driver connected to the m-th column line is defective, the unit data driver adjacent to the defective unit data driver is the m-th column line. Can be connected to.

Each of the plurality of unit data drivers may include a latch configured to store digital data; A digital analog converter (DAC) for converting the digital data into an analog signal; A driver for amplifying the analog signal and outputting the m-th column line; And a first switch and a second switch connected in parallel to an output terminal of the driver, wherein the first switch has one end connected to an output terminal of the driver, the other end connected to an m-th row line, and the second switch One end may be connected to the other end of the first switch, and the other end may be connected to the output end of the driver connected to the (m + 1) th row line.

In addition, when the unit data driver connected to the m-th column line is defective, the first switch may be turned off and the second switch may be turned on.

In addition, the gate driver may include a plurality of unit gate drivers, and when the unit gate driver connected to the n-th row line is defective, the unit gate driver adjacent to the defective unit gate driver may be connected to the n-th column line. .

According to another aspect of the present invention, a driving device for a flat panel display includes pixel circuit pairs arranged for each pixel, and connected to any one of M column line pairs in a pixel array in which pixel circuit pairs of N rows x M columns are arranged. Data driver; And a gate driver connected to any one of an odd-numbered row line pair in the N row line pairs in the pixel array, and when the one of the M column line pairs connected to the data driver is defective, The other of the M row line pairs may be connected to the data driver and the other of the N row line pairs may be connected to the gate driver to interlock with the other connected column line.

Each of the data drivers may include a plurality of unit data drivers, and each of the plurality of unit data drivers may include a latch configured to store digital data; A digital analog converter (DAC) for converting the digital data into an analog signal; A driver for amplifying the analog signal and outputting the analog signal to any one of an m-th column line pair; And a first switch and a second switch connected in parallel to a feedback loop from an output end of the driver, wherein the first switch has one end connected to an output end of the driver and the other end of the pair of mth column lines. The second switch may have one end connected to one end of the first switch and the other end connected to the other of the m-th row line pair.

The data driver may include a first data driver disposed above the pixel array and a second data driver disposed below the pixel array, wherein the first data driver is an odd number of the M column line pairs. The second data driver may be connected to an even-numbered column line pair among the M column line pairs.

As described above, the present invention connects two switches in parallel to an output terminal of a plurality of unit driving units constituting each of the data driving device and the gate driving device for driving the pixel array, or a feedback loop from the output terminal, and turns on / off the connected switch. By enabling the self-test or self-repair function, it is possible to check or repair the fault of the drive circuit and the fault of the drive line by simple electric drive without using expensive equipment.

In addition, the present invention can improve the productivity of the overall process, by reducing the cost of the subsequent process by excluding the drive substrate from the subsequent process through the presence or absence of the defect type.

In addition, since the present invention can repair the driving circuit and the driving line according to the presence or absence of the defect and the failure type, the yield of the driving IC or the substrate can be improved.

However, the effects of the present invention are not limited to the above effects, and may be variously extended without departing from the spirit and scope of the present invention.

1 is a view showing the configuration of a flat panel display device according to the prior art.
FIG. 2 is a diagram illustrating a detailed configuration of the pixel array of FIG. 1.
3 is a diagram illustrating a detailed configuration of the data driver of FIG. 1.
4 is a diagram illustrating a configuration of a flat panel display device according to an exemplary embodiment of the present invention.
5A to 5C are diagrams illustrating the configuration of a data driver with a self test function according to an exemplary embodiment of the present invention.
6A to 6D are diagrams illustrating a configuration of a data driver with a self repair function according to an embodiment of the present invention.
7A to 7C are views illustrating a configuration of a data driver with a self repair function according to another exemplary embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION The following detailed description of the invention refers to the accompanying drawings that show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It should be understood that the various embodiments of the present invention are different, but need not be mutually exclusive. For example, certain features, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the invention in connection with an embodiment. It is also to be understood that the position or arrangement of the individual components within each disclosed embodiment may be varied without departing from the spirit and scope of the invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is to be limited only by the appended claims, along with the full scope of equivalents to which such claims are entitled, if properly explained. In the drawings, like reference numerals refer to the same or similar functions throughout the several views.

DETAILED DESCRIPTION Hereinafter, a driving apparatus equipped with a self test and self repair function for a flat panel display according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings. Particularly, in the present invention, an output terminal of a plurality of unit driving units constituting each of a data driver and a gate driver for driving a pixel array or a feedback loop from the output terminal thereof are provided. A new solution is proposed, in which two switches are connected in parallel and self-test or self-repair functions are activated according to the switches on and off.

4 is a diagram illustrating a structure of a flat panel display according to an exemplary embodiment of the present invention.

Referring to FIG. 4, a flat panel display according to an exemplary embodiment may include a pixel array 100, a first data driver 200, a second data driver 300, a first gate driver 400, and a second gate. Driver 500 may be included.

The pixel array 100 may include a plurality of pixel circuits arranged in N rows x M columns. That is, in the pixel array 100, N pixel circuits are arranged in a horizontal direction and M in a vertical direction, a column line into which line data is input is connected to the pixel circuit in a vertical direction, and a row line into which a selection signal is input is It may be connected to the pixel circuit in the horizontal direction.

The first data driver 200 may be disposed on one side of the pixel array and may operate as a driver for driving the pixel circuit and a detector for detecting the presence or absence of a defective driver or line. That is, the first data driver 200 may temporarily store input image data in column lines and simultaneously output driving signals to M / 2 odd column lines among the M column lines in the pixel array. In addition, the first data driver 200 compares the signal to be output to the (m) th line with the signal received from the (m + 1) th line connected to the second data driver 300 to compare the second data driver ( The comparison value for determining whether the (m + 1) th column line connected to the second data driver 300 is defective may be output to the mth column line.

The second data driver 300 may be disposed on an opposite side of the pixel array and may operate as a driver and a detector. That is, the second data driver 300 may temporarily store the input image data in units of column lines and simultaneously output driving signals to M / 2 even column lines among the M column lines in the pixel array. In addition, the second data driver 300 compares a signal to be output to the (m + 1) th column line with a signal received from the (m) th column line connected to the first data driver 200 to compare the signal with the first data driver ( Or a comparison value for determining whether the (m) th column line connected to the first data driver 200 is defective may be output to the (m + 1) th column line.

In this case, the first data driver 200 and the second data driver 300 may operate in a driving mode for driving the pixel circuit and a test mode for determining whether the driver or line is defective, but may operate in different modes. .

For example, when the first data driver 200 is operated in the driving mode, the second data driver 300 may check whether the first data driver 200 or the column line to which the first data driver 200 is connected is defective. It may be operated in a test mode for determining.

As another example, when the second data driver 300 operates in the driving mode, the first data driver 200 determines whether the second data driver 300 or the column line to which the second data driver 300 is connected is defective. Can be operated in a test mode.

The first gate driver 400 may be operated as a driver, and the second gate driver 500 may be operated as a detector. That is, the first gate driver 400 may be connected to one end of the N row lines in the pixel array and sequentially output the selection signals. The second gate driver 500 may be connected to the other ends of the N row lines in the pixel array to detect whether a driver or a line is defective.

In addition, each of the first gate driver 400 and the second gate driver 500 may be operated as a driver and a detector. That is, the first gate driver 400 may sequentially output a selection signal to odd-numbered row lines among the N row lines in the pixel array. In addition, the first gate driver 400 compares a signal to be output to the (n) th row line and a signal received from the (n + 1) th row line connected to the second gate driver 500 to determine the second gate driver ( It is possible to determine whether the (n + 1) -th row line 500 or the second gate driver 500 is defective.

The second gate driver 500 may sequentially output a line selection signal to even-numbered row lines of the N row lines in the pixel array. In addition, the second gate driver 500 compares a signal to be output to the (n + 1) th row line and a signal received from the (n) th row line connected to the first gate driver 400 to compare the first gate driver ( 400 or the defect of the (n) th row line connected to the first gate driver 400 may be determined.

5A to 5C are diagrams illustrating the configuration of a data driver with a self test function according to an exemplary embodiment of the present invention.

Referring to FIG. 5A, a data driver equipped with a self test function according to an embodiment of the present invention includes a first data driver 200 and a second data driver 300, and may include different modes, that is, a driving mode or Can operate in test mode.

The first data driver 200 may be connected to an odd-numbered column line in the pixel array 100, and may include a first gray scale reference voltage generator 210 and a plurality of first unit data drivers 220.

The first gray scale reference voltage generating circuit 210 may generate a reference voltage corresponding to a gray scale value for determining the brightness of the pixel.

The plurality of first unit data drivers 220 may output driving signals. Each of the plurality of first unit data drivers 220 includes a latch 221, a digital analog converter (DAC) 222, a driver 223, a first switch 224, and a second switch 225. ) May be included.

The latch 221 may temporarily store digital data. The DAC 222 converts digital data into an analog signal, and outputs an analog signal of a first voltage corresponding to the digital data according to a driving mode, or outputs an analog signal of a second voltage lower than the first voltage according to a test mode. Can be. The driver 223 may amplify the analog signal and output the analog signal to the m-th column line.

In this case, two switches, that is, the first switch 224 and the second switch 225 may be connected in parallel on the feedback loop from the output terminal of the driver 223. The first switch 224 has one end connected to the output terminal of the driver connected to the m th row line, the other end connected to the non-inverting input terminal, and the second switch 225 has one end connected to the (m + 1) th row line. The other end may be connected to the other end of the first switch.

The second data driver 300 may be connected to an even-numbered column line in the pixel array 100, and may include a second gray scale reference voltage generator 310 and a plurality of second unit data drivers 320.

The second gray scale reference voltage generator 310 may generate a reference voltage corresponding to the gray scale value for determining the brightness of the pixel.

The plurality of second unit data drivers 320 may output a driving signal. Each of the plurality of second unit data drivers 320 includes a latch 321, a digital analog converter (DAC) 322, a driver 323, a first switch 324, and a second switch 325. ) May be included.

The latch 321 may temporarily store digital data. The DAC 322 converts digital data into an analog signal, and outputs an analog signal of a first voltage corresponding to the digital data according to a driving mode, or outputs an analog signal of a second voltage lower than the first voltage according to a test mode. Can be. The driver 323 may amplify the analog signal and output the analog signal to the m-th column line.

In this case, two switches, that is, the first switch 324 and the second switch 325 are connected in parallel on the feedback loop from the output terminal of the driver 323, and may be turned on or off by a control signal from the outside. The first switch 324 has one end connected to the output terminal of the driver connected to the m th row line, the other end connected to the non-inverting input terminal, and the second switch 325 has one end connected to the (m + 1) th row line. The other end may be connected to the other end of the first switch.

Referring to FIG. 5B, both the first data driver 200 and the second data driver 300 at the bottom operate in the driving mode for driving the pixel circuit. That is, the first switch 224 of the first first unit data driver 220 in the upper first data driver 200 is turned on so that the output terminal of the first driver 223 is fed back to the inverting (−) input terminal. The first driver 223 operates as a negative feedback amplifier to output an output voltage of the first DAC 222, and the first second unit data driver 320 in the second data driver 300 at the lower end thereof. The first switch 324 is turned on, and the output terminal of the second driver 323 is connected to the inverting (-) input terminal in a feedback loop, so that the second driver 323 operates as a negative feedback amplifier to operate the second DAC ( The output voltage of 322 may be output.

Referring to FIG. 5C, the first data driver 200 operates in the driving mode and the second data driver 300 operates in the test mode. In this case, the second data driver 300 operating in the test mode may detect whether the first data driver 200 or the column line connected to the first data driver 200 is defective. That is, the first switch 224 of the first first unit data driver 220 in the upper first data driver 200 is turned on to operate as a negative feedback amplifier, and the lower limit 1 in the second data driver 300. The second switch 325 of the second second unit data driver 320 may be turned on to operate as a comparator connected to an inverting input terminal of the second driver 323 to the tartan of the first column line COL_1.

In this case, the second driver 323 may operate as a comparator without forming a feedback loop. For example, when the output of the first driver 223 is 1V and the output of the second DAC 322 is assumed to be 0.8V, 0.8V is applied to the non-inverting (+) input terminal of the second driver 323. Is input and 1V is input to the inverting (−) input terminal, so the output logic value of the second driver 323 should be low, that is, '0'. Therefore, when the output logic value of the second driver 323 becomes high, that is, '1', it may be determined that the first unit data driver 220 or the first column line COL_1 is defective.

Since the output logic value is stored in the storage element in the pixel circuit, it is possible to determine whether the driving signal is normal by reading the value stored in the storage element.

Similarly, when the second data driver 300 operates in the driving mode and the first data driver 200 operates in the test mode, the first data driver 200 operating in the test mode may include the second data driver 300. Alternatively, the presence or absence of a defective thermal line connected to the second data driver 300 may be detected. That is, the first switch 324 of the first second unit data driver 320 in the lower second data driver 300 is turned on to operate as a negative feedback amplifier, and the first switch in the upper first data driver 200 is operated. The second switch 225 of the first first unit data driver 220 may be turned on to operate as a comparator connected to an inverting input terminal of the first driver 223 to the tartan of the second column line COL_2.

6A to 6D are diagrams illustrating a configuration of a data driver with a self repair function according to an embodiment of the present invention.

Referring to FIG. 6A, a data driver having a self repair function according to an exemplary embodiment of the present invention includes a first data driver 200 and a second data driver 300, and the data driver includes a first data driver 200 and a second data driver 300. You can change which driver is connected.

The first data driver 200 may be connected to an odd-numbered column line in the pixel array 100, and may include a first gray scale reference voltage generator 210 and a plurality of first unit data drivers 220.

The first gray scale reference voltage generating circuit 210 may generate a reference voltage corresponding to a gray scale value for determining the brightness of the pixel.

The plurality of first unit data drivers 220 may output line data. Each of the plurality of first unit data drivers 220 includes a latch 221, a digital analog converter (DAC) 222, a driver 223, a first switch 224, and a second switch 225. can do.

The latch 221 may temporarily store digital data. The DAC 222 may convert digital data into an analog signal and output an analog signal having a first voltage corresponding to the digital data. The driver 223 may amplify the analog signal and output the analog signal to the m-th column line.

In this case, two switches, that is, the first switch 224 and the second switch 225 are connected to the output terminal of the driver 223 in parallel and may be turned on or off by a control signal from the outside. One end of the first switch 224 is connected to the output terminal of the driver 223, the other end is connected to the m-th row line, the second switch 225 is connected to the other end of the first switch 224, The other end may be connected to the output end of the driver connected to the (m + 1) th column line.

Accordingly, when the first switch 224 is turned on, the driver is connected to the m-th row line, and when the second switch 225 is turned on, another driver adjacent to the driver is connected to the m-th row line.

The second data driver 300 may be connected to an even-numbered column line in the pixel array 100, and may include a second gray scale reference voltage generator 310 and a plurality of second unit data drivers 320.

The second gray scale reference voltage generator 310 may generate a reference voltage corresponding to the gray scale value for determining the brightness of the pixel.

The plurality of second unit data drivers 320 may output line data. Each of the plurality of second unit data drivers 320 includes a latch 321, a digital analog converter (DAC) 322, a driver 323, a first switch 324, and a second switch 325. can do.

The latch 321 may temporarily store digital data. The DAC 322 may convert digital data into an analog signal and output an analog signal having a first voltage corresponding to the digital data. The driver 323 may amplify the analog signal and output the analog signal to the m-th column line.

In this case, two switches, that is, the first switch 324 and the second switch 325 are connected in parallel to the output terminal of the driver 323, and may be turned on or off by a control signal from the outside. One end of the first switch 324 is connected to the output terminal of the driver 323, the other end is connected to the m-th row line, the second switch 325 is connected to the other end of the first switch 324, The other end may be connected to the output end of the driver connected to the (m + 1) th column line.

Referring to FIG. 6B, both the first data driver 200 and the second data driver 300 at the bottom operate in the driving mode for driving the pixel circuit. That is, the first switch 224 of the first first unit data driver 220 in the upper first data driver 200 is turned on so that the output terminal of the first driver 223 is connected to the first column line. The first switch 324 of the second unit data driver 320 of the second data driver 300 may be turned on so that the output terminal of the second driver 323 may be connected to the second column line.

Referring to FIG. 6C, when the first unit data driver 220a in the upper first data driver is defective, the second switch 225a of the first first unit data driver 220a that is defective is turned on to be the first. The output terminal of the first driver 223b in the second first unit data driver 220b adjacent to the column line may be connected. As a result, all of the second switches from the second first unit data driver to the last first unit data driver may be turned on.

In this case, the last column line may be connected to the extra first unit data driver 220 ′. Here, the case in which one extra first unit data driver 220 ′ is provided as an example is not limited thereto, and a plurality of first unit data driver 220 ′ may be provided.

Similarly, when the second unit data driver 320a in the lower second data driver is defective, the second switch 325a of the defective first unit data driver 320a is turned on to be adjacent to the first column line. The output terminal of the second driver 323b in the second second unit data driver 320b may be connected. As a result, all of the second switches from the second second unit data driver to the last second unit data driver may be turned on.

In this case, the last column line may be connected to the extra second unit data driver 320 ′.

Referring to FIG. 6D, the gate driver may be provided with a self repair function in the same manner as a data driver with a self repair function according to an embodiment of the present invention.

The gate driver 400 may include a plurality of unit selection drivers 410, and the plurality of unit gate drivers 410 may include a driver 411, a first switch 412, and a second switch 413. .

The driver 411 may output a signal for selecting the n-th row line.

At this time, two switches, that is, the first switch 412 and the second switch 413 are connected in parallel to the output terminal of the driver 411 and may be turned on or off by a control signal from the outside. One end of the first switch 412 is connected to the output terminal of the driver 411, the other end is connected to the n-th row line, the second switch is connected to the other end of the first switch 412, the other end ( n + 1) may be connected to the output terminal of the driver connected to the row line.

Accordingly, when the first switch 412 is turned on, the driver is connected to the n-th row line, and when the second switch 413 is turned on, another driver adjacent to the driver is connected to the n-th row line.

In this case, the last row line may be connected to the extra unit selection driver 410 ′.

7A to 7C are views illustrating a configuration of a data driver with a self repair function according to another exemplary embodiment of the present invention.

Referring to FIG. 7A, a line including a data driver 200 and a gate driver 400 having a self repair function according to another exemplary embodiment of the present invention may be connected to a line connected to a driver according to a defect of a line rather than a defect of a driver. You can change it.

The data driver 200 may be connected to a column line in the pixel array 100, and may include a gray reference voltage generation circuit 210 and a plurality of unit data driver 220.

The gray reference voltage generating circuit 210 may generate a reference voltage corresponding to a gray value for determining the brightness of the pixel.

The plurality of unit data drivers 220 may output line data. Each of the plurality of unit data drivers 220 may include a latch 221, a digital analog converter (DAC) 222, a driver 223, a first switch 224, and a second switch 225. have.

The latch 221 may temporarily store digital data. The DAC 222 may convert digital data into an analog signal and output an analog signal having a first voltage corresponding to the digital data. The driver 223 may amplify the analog signal and output the analog signal to the m-th column line.

In this case, two switches, that is, the first switch 224 and the second switch 225 are connected to the output terminal of the driver 223 in parallel and may be turned on or off by a control signal from the outside. One end of the first switch 224 is connected to the output terminal of the driver 223, the other end is connected to the m-th row line, the second switch is connected to the other end of the first switch 224, the other end ( It can be connected to the output terminal of the driver connected to the m + 1) th row line.

In addition, the data driver 200 includes a first data driver disposed above the pixel array and a second data driver disposed below the pixel array, and the first data driver includes an odd-numbered column line among M column line pairs. The second data driver may be connected to an even-numbered column line pair of the M column line pairs.

Referring to FIG. 7B, in the present invention, a pixel circuit, a column line, and a row line constituting the pixel array may be formed in a redundancy structure in order to self repair a line defect. That is, one pixel is composed of two pixel circuits, that is, pixel circuit pairs {pixel1 circuit, pixel2 circuit}, and the output of one pixel circuit is configured to drive one pixel. A column line pair {col_k_1, col_k_2} including two column lines connected to each pixel circuit in the pixel circuit pair and a row line pair {row_l_1, row_l_2} including two row lines may be formed.

Referring to FIG. 7C, when the column line col_2_1 of the second column line pair {col_2_1 and col_2_2} is defective, the first switch 224 of the first unit data driver 220 is turned off and the second switch 225 is turned off. ) May be turned on and connected to the column line col_k_2 in each of the M column line pairs {col_k_1 and col_k_2}.

Then, the first switch 242 of the unit gate driver 410 is turned off and the second switch 243 is turned on to be connected to the row lines row_l_2 in each of the row line pairs {row_l_1 and row_l_2}, thereby providing two pixel circuits. One pixel circuit may be driven.

The features, structures, effects and the like described in the embodiments are included in one embodiment of the present invention and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100: pixel array
200: first data driver
300: second data driver
400: first gate driver
500: second gate driver

Claims (15)

A first data driver connected to one end of each of the odd-numbered column lines of the M column lines in the pixel array in which the pixel circuits of the N rows x M columns are disposed;
A second data driver connected to the other end of each even column line among the M column lines; And
A gate driver connected to the N row lines in the pixel array;
The first data driver is operated in any one of a driving mode for driving the pixel circuit and a test mode for detecting whether a driver or a line is defective, and the second data driver is operated in another of the driving mode and the test mode. Operated, drive device for a flat panel display. The method of claim 1,
And the first data driver is disposed on one side of the pixel array, and the second data driver is disposed on the opposite side of the pixel array. The method of claim 1,
When the first data driver connected to the m th column line is operated in the driving mode, the m th column connected to the first data driver or the first data driver is connected to the second data driver connected to the (m + 1) th column line. It is operated in test mode to detect the presence or absence of line defects,
When the second data driver connected to the (m + 1) th column line is operated in the driving mode, the first data driver connected to the mth column line is connected to the second data driver or the second data driver (m + 1). A driving device for a flat panel display operated in a test mode for detecting the presence or absence of a) th column line. The method of claim 1,
Each of the first data driver and the second data driver includes a plurality of unit data drivers, and each of the plurality of unit data drivers includes:
A latch for storing digital data;
A digital analog converter (DAC) for converting an analog signal of a first voltage corresponding to the digital data or an analog signal of a second voltage lower than the first voltage;
Amplifies the analog signal of the first voltage and outputs it to the m-th column line, or compares the analog signal of the second voltage and the analog signal of the first voltage input from the m-th column line to obtain a comparison value (m + 1). A driver for outputting to the first column line; And
A first switch and a second switch connected in parallel to a feedback loop from an output end of the driver;
The first switch is connected to the output terminal of the driver one end is connected to the m-th column line, the other end is connected to the inverting input terminal,
Wherein the second switch is connected at one end to the (m + 1) th row line and at the other end to the other end of the first switch. 5. The method of claim 4,
When the first data driver or the second data driver is operated in the drive mode, the first switch is turned on and the second switch is turned off,
The DAC outputs an analog signal of the first voltage,
And the driver amplifies the analog signal of the first voltage and outputs the analog signal to the m-th column line through the first switch. 5. The method of claim 4,
When the first data driver or the second data driver is operated in the test mode, the first switch is turned off and the second switch is turned on,
The DAC outputs an analog signal of the second voltage,
And the driver compares the analog signal of the second voltage with the analog signal of the first voltage and outputs a comparison value to the (m + 1) th column line through the second switch as a result of the comparison. Drive device for. The method of claim 1,
The gate driver includes:
A first gate driver connected to one end of each of the odd-numbered row lines of the N row lines in the pixel array; And
And a second gate driver connected to the other end of each even row line among the N row lines.
The first gate driver operates in one of a driving mode for driving the pixel circuit and a test mode for detecting whether a driver or a line is defective, and the second gate driver operates in another of the driving mode and the test mode. Operated, drive device for a flat panel display. The method of claim 1,
The gate driver includes:
A first gate driver connected to one end of each of the N row lines in the pixel array; And
And a second gate driver connected to the other ends of each of the N row lines.
The first gate driver operates in one of a driving mode for driving the pixel circuit and a test mode for detecting whether a driver or a line is defective, and the second gate driver operates in another of the driving mode and the test mode. Operated, drive device for a flat panel display. A first data driver including a plurality of unit data drivers connected to one end of each of the odd-numbered column lines of the M column lines in the pixel array in which the pixel circuits of the N rows x M columns are disposed;
A second data driver including a plurality of unit data drivers connected to the other ends of the even-numbered column lines of the M column lines; And
A gate driver connected to the N row lines in the pixel array;
and when the unit data driver connected to the m-th column line is defective, the unit data driver adjacent to the defective unit data driver is connected to the m-th column line. 10. The method of claim 9,
Each of the plurality of unit data drivers,
A latch for storing digital data;
A digital analog converter (DAC) for converting the digital data into an analog signal;
A driver for amplifying the analog signal and outputting the m-th column line; And
And a first switch and a second switch connected in parallel to an output terminal of the driver.
One end of the first switch is connected to the output terminal of the driver, the other end is connected to the m-th column line,
And the second switch is connected at one end to the other end of the first switch and the other end to the output end of the driver connected to the (m + 1) th row line. The method of claim 10,
And the first switch is turned off and the second switch is turned on when the unit data driver connected to the m-th column line is defective. The method of claim 10,
The gate driver includes a plurality of unit gate drivers, and when the unit gate driver connected to the n-th row line is defective, the unit gate driver adjacent to the defective unit gate driver is connected to the n-th row line. Drive device for. A data driver arranged with a pixel circuit pair for each pixel and connected to any one of M column line pairs in a pixel array in which pixel circuit pairs of N rows x M columns are arranged; And
A gate driver each connected to any one of N row line pairs in the pixel array;
If any one of the M column line pairs connected to the data driver is bad, connect the other of the M column line pairs to the data driver,
And connect another one of each of the N row line pairs to the gate driver so as to interlock with the other connected column line. The method of claim 13,
Each of the data drivers includes a plurality of unit data drivers, and each of the plurality of unit data drivers includes:
A latch for storing digital data;
A digital analog converter (DAC) for converting the digital data into an analog signal;
A driver for amplifying the analog signal and outputting the analog signal to any one of an m-th column line pair; And
A first switch and a second switch connected in parallel to a feedback loop from an output end of the driver;
One end of the first switch is connected to the output terminal of the driver, and the other end is connected to any one of the m-th row line pairs.
Wherein the second switch has one end connected to one end of the first switch and the other end connected to the other one of the m-th row line pairs. The method of claim 13,
The data driver includes a first data driver disposed above the pixel array and a second data driver disposed below the pixel array.
Wherein the first data driver is connected to an odd-numbered column line pair of the M column line pairs, and the second data driver is connected to an even-numbered column line pair of the M column line pairs. .

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