KR102004240B1 - Chip electronic component and board having the same mounted thereon - Google Patents

Abstract

The present invention relates to an insulating substrate; A first inner coil portion disposed on one surface of the insulating substrate; A second inner coil part disposed on the other surface opposite to one surface of the insulating substrate; Vias connecting the first and second inner coil portions through the insulating substrate; And a first via pad disposed on one surface of the insulating substrate to cover the via, and a second via pad disposed on the other surface of the insulating substrate, wherein the first and second via pads are adjacent to the first and second via pads, A chip electronic component arranged in a second internal coil part direction, and a mounting board therefor.

Description

TECHNICAL FIELD [0001] The present invention relates to a chip electronic component and a board having the same,

The present invention relates to a chip electronic component and a mounting substrate of the chip electronic component.

An inductor, which is one of the chip electronic components, is a typical passive element that removes noise by forming an electronic circuit together with a resistor and a capacitor. The inductor amplifies a signal of a specific frequency band in combination with a capacitor using electromagnetic characteristics A resonance circuit, a filter circuit, and the like.

In recent years, miniaturization and thinning of IT devices such as various communication devices and display devices have been accelerated. Researches for miniaturization and thinning of various devices such as inductors, capacitors, and transistors employed in IT devices have been continuously carried out .

Thus, the inductor has been rapidly switched to a chip capable of miniaturization and high density automatic surface mounting, and the development of a thin film type inductor in which a magnetic powder is mixed with a resin on a coil pattern formed by plating on the upper and lower surfaces of a thin insulating substrate .

The thin film type inductor is manufactured by forming a coil pattern on an insulating substrate and then filling the magnetic material on the outside.

Meanwhile, in order to realize the miniaturization and thinning of the inductor, it is necessary to solve the constraint condition of the existing shape in accordance with the miniaturization and the high capacity even in the connection portion between the coils.

Specifically, the substrate plating process for forming the coils of the inductor may include forming a coil conductor pattern having a coil-shaped pattern on one surface of the substrate, and forming a coil conductor pattern having a coil- .

The coil conductor pattern formed on the surface opposite to the one surface of the substrate may be electrically connected through a via electrode formed on the substrate.

The via electrode is generally in a straight line with the coil conductor pattern portion, and since the pad is manufactured in large size in order to prevent defects due to vias, there is a problem in implementing a small and high capacity inductor.

In addition, since the position of the pad is located toward the core that implements the inductance capacity, the internal core area is reduced, and the miniaturization is greatly restricted.

Therefore, it is still necessary to implement a small-sized inductor while ensuring a sufficient capacity.

Japanese Patent Laid-Open No. 2007-067214

The present invention relates to a chip electronic component capable of preventing the loss of inductance due to the area of a via pad by changing the shape and position of the via pad.

One embodiment of the present invention relates to a semiconductor device comprising: an insulating substrate; A first inner coil portion disposed on one surface of the insulating substrate; A second inner coil part disposed on the other surface opposite to one surface of the insulating substrate; Vias connecting the first and second inner coil portions through the insulating substrate; And a via pad disposed on at least one side of the insulating substrate to cover the via, wherein the via pad is disposed in the direction of adjacent first and second inner coil sections, and the first inner coil section and the second inner section Wherein the magnetic substance body includes a metal magnetic powder, a through hole is formed in a central portion of the insulating substrate, and the through hole is filled with a magnetic substance to form a core portion, .

Another embodiment of the present invention is a printed circuit board comprising: a printed circuit board having first and second electrode pads on top; And a chip electronic component mounted on the printed circuit board.

According to the present invention, by arranging the via pad in the direction of the adjacent coil, it is possible to sufficiently secure the area of the core, thereby preventing loss of inductance due to the area of the via pad.

1 is a schematic perspective view showing an inner coil portion of a chip electronic component according to an embodiment of the present invention.
2 is a sectional view taken along a line I-I 'in Fig.
3 is a schematic plan view showing a via pad according to an embodiment of the present invention.
4 is a sectional view taken along a line II-II 'in FIG.
5 is a perspective view showing a state in which the chip electronic component of Fig. 1 is mounted on a printed circuit board.

Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shapes and sizes of the elements in the drawings may be exaggerated for clarity of description, and the elements denoted by the same reference numerals in the drawings are the same elements.

It is to be understood that, although the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, Will be described using the symbols.

Throughout the specification, when an element is referred to as "comprising ", it means that it can include other elements as well, without excluding other elements unless specifically stated otherwise.

Chip electronic components

Hereinafter, a chip electronic component according to an embodiment of the present invention will be described, but the present invention is not limited thereto.

1 is a schematic perspective view showing an inner coil portion of a chip electronic component according to an embodiment of the present invention.

Referring to FIG. 1, a thin film type inductor used for a power supply line of a power supply circuit as an example of a chip electronic component is disclosed.

A chip electronic component 100 according to an embodiment of the present invention includes a magnetic body 50, internal coil portions 41 and 42 embedded in the inside of the magnetic body 50, And first and second external electrodes 81 and 82 which are disposed and electrically connected to the inner coil portions 41 and 42, respectively.

In the chip electronic component 100 according to an embodiment of the present invention, the 'L' direction, the 'W' direction, and the 'Thickness' direction are the 'L' direction, the 'T' Let's define it.

The magnetic substance body 50 forms an outer appearance of the chip electronic component 100, and is not limited as long as it is a material exhibiting magnetic characteristics. For example, the magnetic substance body 50 may be formed by filling a ferrite or a metal magnetic powder.

The ferrite may be, for example, Mn-Zn ferrite, Ni-Zn ferrite, Ni-Zn-Cu ferrite, Mn-Mg ferrite, Ba ferrite or Li ferrite.

 The metal magnetic powder may include at least one selected from the group consisting of Fe, Si, Cr, Al and Ni, and may be, for example, an Fe-Si-B-Cr amorphous metal, It is not.

The metal magnetic powder may have a particle diameter of 0.1 to 30 μm and may be dispersed in a thermosetting resin such as an epoxy resin or a polyimide.

A coil-shaped first inner coil part 41 is formed on one surface of the insulating substrate 20 disposed inside the magnetic body 50 and a coil-shaped first inner coil part 41 is formed on the other surface of the insulating substrate 20, A second inner coil part 42 is formed.

The first and second inner coil parts 41 and 42 may be formed in a spiral shape and may be formed by an electroplating method.

The insulating substrate 20 is formed of, for example, a polypropylene glycol (PPG) substrate, a ferrite substrate, or a metal-based soft magnetic substrate.

The central portion of the insulating substrate 20 penetrates to form a through hole, and the through hole is filled with a magnetic material to form a core portion 55.

The inductance Ls can be improved by forming the core portion 55 filled with the magnetic material.

2 is a sectional view taken along a line I-I 'in Fig.

Referring to FIG. 2, the first and second inner coil parts 41 and 42 formed on one surface and the other surface of the insulating substrate 20 are connected to each other via a via 45 formed through the insulating substrate 20 do.

First and second via pads 43 and 44 are formed on one surface and the other surface of the insulating substrate 20 so as to cover the vias 45, respectively.

The first via pad 43 is formed by extending one end of the first inner coil part 41 and the second via pad 44 is formed by extending one end of the second inner coil part 42 Respectively.

The first and second via pads 43 and 44 may be formed by electroplating similarly to the first and second inner coil portions 41 and 42.

In general, the vias are on a straight line with the inner coil portion, and open failure due to the deformation of the vias may be a problem.

When the via pad is formed to prevent the open defect as described above, the area tends to be increased. This has been a constraint in the miniaturization and high capacity of the chip electronic component.

Meanwhile, since the via pad having a large area as described above is disposed in the direction of the core that implements the inductance Ls, there is a problem that the area of the internal core portion is reduced, thereby reducing the capacity in the miniaturization process of the chip electronic component.

That is, as the area of the via pad increases, the area of the core portion decreases, and the magnetic material filled in the core portion decreases, thereby reducing the inductance Ls characteristic.

According to an embodiment of the present invention, the first and second via pads 43 and 44 are disposed in the direction of the adjacent first and second inner coil sections 41 and 42 to solve the above problem.

3 is a schematic plan view showing a via pad according to an embodiment of the present invention.

Referring to FIG. 3, it can be seen that the first and second via pads 43 and 44 are disposed in the direction of the adjacent first and second inner coil sections 41 and 42, respectively.

The first and second via pads 43 and 44 are not limited in shape, and may have a circular shape in the same manner as a via.

The first and second via pads 43 and 44 may be disposed to be offset in the direction of the first and second inner coil sections 41 and 42,

As a result of this arrangement, the area of the core portion 55 becomes larger than that of the related art, and the number of the magnetic bodies filled in the core portion increases, so that the inductance Ls characteristics can be improved.

It is also possible to secure the area of the core portion 55 filled with the magnetic material to a maximum extent while preventing the defects of open that the vias 45 and the via pads 43 and 44 are not aligned with each other, A high inductance Ls can be realized.

The first and second inner coil portions 41 and 42 adjacent to the first and second via pads 43 and 44 may be formed to be insulated from the first and second via pads 43 and 44 have.

That is, according to an embodiment of the present invention, the first and second via pads 43 and 44 are connected to the adjacent first and second inner coil parts 41 and 42, respectively, in order to realize a high inductance Ls of the chip electronic component. Grooves are formed in the first and second inner coil portions 41 and 42 adjacent to the first and second via pads 43 and 44 in order to prevent a short- .

The groove may be formed so that the first and second inner coil portions 41 and 42 and the first and second via pads 43 and 44 are insulated from each other, and the shape thereof is not particularly limited.

According to an embodiment of the present invention, the center of the groove and the center of the first and second via pads 43 and 44 may coincide with each other.

That is, the groove may have a shape that is equally divided around the first and second via pads 43 and 44.

Meanwhile, according to an embodiment of the present invention, the distance d between the first and second inner coil parts 41 and 42 adjacent to the first and second via pads 43 and 44 may be 3 μm or more , But are not necessarily limited thereto.

By adjusting the interval d between the first and second via pads 43 and 44 and the adjacent first and second internal coil parts 41 and 42 to be 3 μm or more, The first and second inner coil portions 41 and 42 adjacent to the pads 43 and 44 can secure the insulation characteristics with the first and second via pads 43 and 44.

If the distance d between the first and second inner pad portions 43 and 44 and the adjacent first and second inner coil portions 41 and 42 is less than 3 mu m, a short failure may occur.

According to an embodiment of the present invention, the first and second via pads 43 and 44 are biased toward the first and second inner coil portions 41 and 42 as described above, ) Increases, and the magnetic substance to be filled in the core portion increases, so that the inductance Ls characteristic can be improved.

That is, even if the chip electronic component is miniaturized, the area of the core portion can be secured largely due to the arrangement of the via pad as described above, and a high-capacity chip electronic component can be realized in accordance with the increase of the magnetic body to be filled.

The first and second inner coil portions 41 and 42, the via 45 and the first and second via pads 43 and 44 may be formed of a metal having excellent electrical conductivity. For example, And may be formed of Ag, Pd, Al, Ni, Ti, Au, Cu, Pt, or an alloy thereof.

4 is a sectional view taken along a line II-II 'in FIG.

4, the other end of the first inner coil part 41 may extend to form a first lead part 46 exposed at one end in the direction of the length L of the magnetic body 50 And the other end of the second inner coil part 42 is extended to form the second lead part 47 exposed in the other end surface in the direction of the length L of the magnetic body 50.

However, the present invention is not limited thereto, and the first and second lead portions 46 and 47 may be exposed to at least one surface of the magnetic body 50.

Sectional view of the magnetic body 50 in the direction of the length L so as to be connected to the first and second lead portions 46 and 47 exposed at both end faces in the length L direction of the magnetic body main body 50 First and second external electrodes 81 and 82 are disposed, respectively.

The first and second external electrodes 81 and 82 may be formed of a metal having excellent electrical conductivity such as Ni, Cu, Sn, Ag, Or the like, or an alloy thereof.

The mounting substrate of the chip electronic component

5 is a perspective view showing a state in which the chip electronic component of Fig. 1 is mounted on a printed circuit board.

5, a mounting board 200 of a chip electronic component 100 according to an embodiment of the present invention includes a printed circuit board 210 on which a chip electronic component 100 is mounted, And first and second electrode pads 211 and 212 spaced apart from each other on an upper surface of the first electrode pad 210. [

At this time, the first and second external electrodes 81 and 82 formed on both end faces of the chip electronic component 100 are placed in contact with the first and second electrode pads 211 and 212, respectively, And may be electrically connected to the printed circuit board 210 by means of the printed circuit board 210.

The inner coil portions 41 and 42 of the mounted chip electronic component 100 are arranged horizontally with respect to the mounting surface of the printed circuit board 210.

Except for the above description, a description overlapping with the feature of the chip electronic component according to the embodiment of the present invention described above will be omitted here.

It is to be understood that the present invention is not limited to the disclosed embodiments and that various substitutions and modifications can be made by those skilled in the art without departing from the scope of the present invention Should be construed as being within the scope of the present invention, and constituent elements which are described in the embodiments of the present invention but are not described in the claims shall not be construed as essential elements of the present invention.

100: chip electronic component 20: insulating substrate
41, 42: first and second inner coil portions
43, 44: first and second via pads 45: via
46, 47: first and second lead portions 50: magnetic body main body
55: core portion 81, 82: first and second outer electrodes
200: mounting board 210: printed circuit board
211, 212: first and second electrode pads 230: solder

Claims (14)

An insulating substrate;
A first inner coil portion disposed on one surface of the insulating substrate;
A second inner coil part disposed on the other surface opposite to one surface of the insulating substrate;
Vias connecting the first and second inner coil portions through the insulating substrate; And
And a via pad disposed on at least one surface of the insulating substrate to cover the via,
Wherein the via pad further comprises a magnetic body body disposed in adjacent first and second inner coil part directions and surrounding the first inner coil part and the second inner coil part, the magnetic body body including a metal magnetic body powder , A through hole is disposed in a central portion of the insulating substrate, and the through hole is filled with a magnetic material to form a core portion.
The method according to claim 1,
Wherein the first and second inner coil portions adjacent to the via pad are formed with a groove to be insulated from the via pad.
3. The method of claim 2,
And the center of the groove and the center of the via pad coincide with each other.
The method according to claim 1,
Wherein the via pad comprises a first via pad and a second via pad, wherein the first via pad is formed by extending one end of the first inner coil part, And the other end of the chip is extended.
The method according to claim 1,
Wherein the first and second inner coil parts and the via pad are formed by plating.
The method according to claim 1,
(D) between the via pad and the adjacent first and second inner coil parts is 3 占 퐉 or more.
The method according to claim 1,
And the other end of the first and second inner coil parts extends to form a lead-out part drawn out to one surface of the magnetic body body.
A printed circuit board having first and second electrode pads on the top; And
And the chip electronic component of claim 1 provided on the printed circuit board.
9. The method of claim 8,
Wherein the first and second inner coil portions adjacent to the via pad are formed with a groove to be insulated from the via pad.
10. The method of claim 9,
And the center of the groove and the center of the via pad coincide with each other.
9. The method of claim 8,
Wherein the via pad comprises a first via pad and a second via pad, wherein the first via pad is formed by extending one end of the first inner coil part, And the one end of the chip electronic component is extended.
9. The method of claim 8,
Wherein the first and second internal coil parts and the via pad are formed by plating.
9. The method of claim 8,
(D) between the via pad and the adjacent first and second inner coil parts is 3 占 퐉 or more.
9. The method of claim 8,
And the other end of the first and second inner coil parts extends to form a lead-out part drawn out to one surface of the magnetic body body.

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