KR101983591B1 - 3-level t-type inverter operation method using level change - Google Patents

Abstract

수식(8)

수식(12)
여기서, P _x2 는 2레벨 전압 소스 컨버터의 총 손실이고, P _xsw2 는 2레벨 전압 소스 컨버터로 동작할 때의 스위칭 손실이고, P _xcon2 는 2레벨 전압 소스 컨버터로 동작할 때의 전도 손실이고, P _x3 은 3레벨 T타입 전압 소스 컨버터의 총 손실이고, P _xsw3 은 3레벨 T타입 전압 소스 컨버터로 동작할 때의 스위칭 손실이고, P _xcon3 은 3레벨 T타입 전압 소스 컨버터로 동작할 때의 스위칭 손실이다.
본 발명에 따르면, 스위칭 동작 주기 각각에서 3LT VSC로 동작할 때의 스위칭 손실 및 전도 손실과 2레벨 VSC로 동작할 때의 스위칭 손실 및 전도 손실을 연산하고, 연산 결과에 기반하여 양자의 총 손실을 비교하고, 비교 결과에 따라 3LT VSC와 2레벨 VSC 간에 동작 모드를 전환함으로써, 각각의 개별 동작과 대비하여 손실을 최소화하고 효율을 향상시킬 수 있으며, 각 토폴로지의 동작 분석을 토대로 연산 시간을 줄임으로써 빠른 레벨 전환을 가능하게 하는 효과가 있다.The present invention relates to a three-level T-type inverter operating method for operating a three-level T-type inverter including a circuit configuration of a two-level voltage source converter and a circuit configuration of a three-level T-type voltage source converter, Measuring an output voltage ( V _xn ), a DC link voltage ( V _dc ), and an inductor current ( i _xL ) at each phase for each operation period of the T type inverter; (b) calculating a switching loss ( P _xsw2 ) and a conduction loss ( P _xcon2 ) when operating as the two-level voltage source converter using the parameters measured in the step _Calculating a switching loss ( P _xsw3 ) and a conduction loss ( P _xcon3 ) at the time of switching; (c) comparing the total loss (P _x2) and total loss (P _x3) of the third level T-type voltage-source converter of the two-level voltage source converter in said operation cycle, respectively; And (d) operating the two-level voltage source converter if the P _x3 is greater than or equal to the P _x2 , and operating the three-level T-type voltage source converter if the P _x3 is less than the P _x2 , Level T-type inverter.

Equation (8)

Equation (12)
Here, P _x2 is the total loss of the two-level voltage source converter, P _xsw2 is a switching loss when operating in a two-level voltage source converter, P _xcon2 are conduction losses when operating in a two-level voltage source converter, P _x3 is the total loss of the three-level T-type voltage-source converter, P _xsw3 3 level T and the switching loss when operating in a type of voltage-source converter, P _xcon3 the switching loss when operating in a three-level T-type voltage-source converter to be.
According to the present invention, switching loss and conduction loss when operating with 3LT VSC and switching loss and conduction loss when operating with 2-level VSC in each switching operation cycle are computed, and based on the calculation result, By comparing the operation mode between the 3LT VSC and the 2-level VSC according to the comparison result, it is possible to minimize the loss and improve the efficiency as compared with each individual operation. By reducing the calculation time based on the operation analysis of each topology It has the effect of enabling quick level switching.

Description

[0001] The present invention relates to a three-level T-type inverter,

The present invention relates to a three-level T-type inverter operation method using a level switching which minimizes conduction loss and improves efficiency by converting a three-level T-type inverter to a two-level voltage source converter operation mode and a three- .

In general, multilevel inverters have many advantages over a two-level voltage source converter (VSC). The switching voltage of the switch is half of the DC link voltage, which reduces switching and harmonic losses and can produce a high quality output voltage. Neutral-point-clamped (NPC) and active NPC multilevel inverters have advantages in terms of intermediate voltage.

However, the multi-level inverter topology has a disadvantage that a high conduction loss occurs as the number of semiconductors increases. These disadvantages make them unsuitable for low voltage applications.

For example, Korean Patent Laid-Open Publication No. 10-2014-0013863 proposes a method of reducing the voltage drop of the main switching device in order to reduce conduction loss and switching loss of a three-level NPC inverter. However, as a method of minimizing the reverse recovery current of the clamping diode, the basic problem of the NPC method is not solved, and still high conduction loss occurs.

To overcome these drawbacks, a 3-level T-type VSC (3LT VSC) has been proposed to apply a 3-level inverter to low voltage applications. 3LT VSC has the advantage of reducing conduction losses by reducing the number of switch and insulated gate drivers compared to conventional multi-level topologies such as NPCs.

For example, a 3LT VSC achieves high efficiency with low switching loss characteristics even under low voltage conditions and with a switching frequency of 10 kHz or higher compared to a 2-level VSC.

However, the efficiency of the 3LT VSC depends on the amplitude modulation index (MI) if the switching frequency and the DC link voltage are the same. If the MI is small (i.e., close to 0), there is a problem that the conduction loss is increased and the efficiency of the 3LT VSC is reduced.

Conduction losses are dependent on the turn-on ratio of the neutral switch and MI. However, since the 2-level VSC does not include a neutral switch, it exhibits higher efficiency than 3LT VSC at lower MI. Therefore, a plan for improving the efficiency of the 3LT VSC is required.

Korean Patent Publication No. 10-2014-0013863

The present invention is based on the idea that the 3-level T-type VSC has a similar configuration in which two additional neutral switches are added to the same circuit in comparison with the existing 2-level VSC. Level VSC, and determines whether to operate as a 3-level T-type VSC or a 2-level VSC based on the calculation result, thereby reducing the conduction loss and improving the efficiency. And a method of operating a level T type inverter.

A method for operating a 3-level T-type inverter using level switching according to an embodiment of the present invention includes operating a 3-level T-type inverter including a circuit configuration of a 2-level voltage source converter and a circuit configuration of a 3-level T- _Wherein the output voltage ( V _xn ), the DC link voltage ( V _dc ), and the inductor current ( i _xL ) of each of the three-level T- Measuring; (b) calculating a switching loss ( P _xsw2 ) and a conduction loss ( P _xcon2 ) when operating as the two-level voltage source converter using the parameters measured in the step _Calculating a switching loss ( P _xsw3 ) and a conduction loss ( P _xcon3 ) at the time of switching; (c) comparing the total loss (P _x2) and total loss (P _x3) of the third level T-type voltage-source converter of the two-level voltage source converter in said operation cycle, respectively; And (d) operating the two-level voltage source converter if the P _x3 is greater than or equal to the P _x2 , and operating the three-level T-type voltage source converter if the P _x3 is less than the P _x2 .

수식(8)

Equation (8)

수식(12)

Equation (12)

Here, P _x2 is the total loss of the two-level voltage source converter, P _xsw2 is a switching loss when operating in a two-level voltage source converter, P _xcon2 are conduction losses when operating in a two-level voltage source converter, P _x3 is the total loss of the three-level T-type voltage-source converter, P _xsw3 3 level T and the switching loss when operating in a type of voltage-source converter, P _xcon3 the switching loss when operating in a three-level T-type voltage-source converter to be.

In a method of operating a 3-level T-type inverter using level switching according to another embodiment of the present invention, the switching frequency ( f _s ) of the switch included in the 3-level T-type inverter is 10 kHz to 20 kHz.

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According to the 3-level T-type inverter operating method using level switching of the present invention, switching loss and conduction loss when operating with 3LT VSC and switching loss and conduction loss when operating with 2-level VSC are calculated And comparing the total loss of both of them based on the calculation result and switching the operation mode between the 3LT VSC and the 2-level VSC according to the comparison result, the loss can be minimized and the efficiency can be improved in comparison with each individual operation, Based on the motion analysis of each topology, it is possible to achieve fast level switching by reducing the computation time.

1 is a waveform diagram illustrating an operation region based on a phase angle of an inductor current and an output voltage on A in a 3LT inverter,
2 is a circuit diagram of a 2-level VSC,
3 is a table illustrating switching loss and conduction loss equations during operation in all regions of a 2-level VSC,
4 is a circuit diagram of a 3LT VSC,
5 is a table showing the switch loss and conduction loss equations during operation in all regions of a 3LT VSC,
6 is a flow chart illustrating a method of operating a 3-level T-type inverter using level switching according to the present invention,
Figure 7 illustrates a PSIM simulation waveform for verifying an operating method according to the present invention;
FIG. 8 is a table showing the results of the simulation as shown in FIG. 7,
FIGS. 9 to 11 are graphs showing experimental results of the 3LT inverter operation method using level switching according to the present invention, and FIGS.
FIG. 12 is a table showing the efficiency comparison according to the experimental results of FIGS. 9 to 11. FIG.

Hereinafter, specific embodiments according to the present invention will be described with reference to the accompanying drawings. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Parts having similar configurations and operations throughout the specification are denoted by the same reference numerals. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

In the following description of the embodiments, redundant descriptions and explanations of techniques obvious to those skilled in the art are omitted. Also, in the following description, when a section is referred to as " comprising " another element, it means that it may further include other elements in addition to the described element unless otherwise specifically stated.

 Also, the terms "to", "to", "to", and "modules" in the specification mean units for processing at least one function or operation, and may be implemented by hardware or software or a combination of hardware and software . In addition, when a part is electrically connected to another part, it includes not only a case directly connected but also a case where the other parts are connected to each other in the middle.

Terms including ordinals, such as first, second, etc., may be used to describe various elements, but the elements are not limited to these terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the second component may be referred to as a first component, and similarly, the first component may also be referred to as a second component.

The present invention relates to an operation method of a three-level T-type inverter using level switching, and more particularly, to a three-level T-type inverter using a two-level voltage source converter (VSC) and a 3-level T- (Hereinafter referred to as " VSC "). In the following description, the loss in each of the 3LT VSC and the 2LVSC is calculated in a control cycle of 10 to 20 kHz, and a determination is made as to whether to operate as a 3LT VSC or a 2LVSC based on the loss operation However, it goes without saying that the same efficiency improvement effect can be expected over other control cycles based on the technical idea of the present invention.

1 is a waveform diagram illustrating an operation region based on a phase angle of an output voltage and an inductor current on A in a 3LT inverter.

The switching loss and the conduction loss can be obtained from the DC link voltage ( V _dc ), the output voltage ( V _an ) and the inductor current ( i _aL ). As shown in FIG. 1, the operation region is divided into four regions (regions 1 to 4), and switching loss and conduction loss are analyzed according to the operation mode for each region.

2 shows a circuit diagram of a 2-level VSC.

Referring to FIG. 2, the switch S _{x_H} constituting the first switching unit 110 in all regions _operates as a complementary switch to the switch S _{x_L} constituting the second switching unit 120. In areas 1 and 4, the switching loss in a switching cycle comprises a turn-on loss (P _xon2) and turn-off loss (P _xoff2) of S _{x_H.} The diode reverse recovery loss ( P _xrr2 ) of S _{x_L} also occurs. Each switching loss can be expressed by the following equations (1) to (3).

수식(1)

Equation (1)

수식(2)

Equation (2)

수식(3)

Equation (3)

Here, the inductor current ( i _xL ) is expressed by the following equation (4).

수식(4)

Equation (4)

Where V _dc is the DC link voltage and V _data is the reference switching voltage of the data sheet. The switching voltage of the 2-level VSC is equal to V _dc . A and B are constants obtained by taking IGBT switching energy loss as a function of collector current, and C is a constant obtained from diode reverse recovery energy loss as a function of collector current in the data sheet. Further, φ is the phase delay between the output voltage and inductor current i _xL.

The diode conduction loss ( P _xd ) of the IGBT and the transistor conduction loss ( P _xtr ) of the IGBT can be expressed by the following equations (5) and (6).

수식(5)

Equation (5)

수식(6)

Equation (6)

Where V _tr0 and V _d0 are the on-state saturation voltages between the collector and emitter of the IGBT when the IGBT is turned on but no current is present. R _tr is the resistance between the collector and the emitter in the on state of the IGBT and R _d is the resistance across the diode inversely parallel connected in the on state of the IGBT and is derived from the I _c - V _ce characteristics of the IGBT and antiparallel diode in the data sheet .

)는 다음의 수식(7)로 표현된다.In one control period, the conduction loss varies with the duty ratio. In region 1, when S _{x_H} is on, the current i _xL flows into the diode of S _{x_H} and a diode conduction loss occurs depending on the turn-on ratio. A reverse recovery energy loss occurs during the switching time. The duty ratio of S _{x_H} (

) Is expressed by the following equation (7).

수식(7)

Equation (7)

Therefore, the duty ratio depends on the output voltage. The duty ratio of each switch should be considered when calculating conduction losses. If S a - _H is turned off and S a _L is on, the current i _aL will flow through the transistors of S a _L. Turn-on and turn-off losses ( P _xon2 , P _xoff2 ) occur in S _{x_L} during the switching time. The duty ratio of S _{a_L} becomes ( 1-D ).

3 is a table illustrating switching losses and conduction loss equations during operation in all regions of a 2-level VSC.

Referring to FIG. 3, P _xsw2 represents a switching loss and P _xcon2 represents a conduction loss in the second level VSC. Since current flows through one IGBT transistor and one IGBT antiparallel diode, P _xsw2 in each region uses the same equation. However, since conduction losses must take into account the duty ratio, P _xcon2 in each region uses a different equation. The total loss of the 2-level VSC can be expressed by the following equation (8).

수식(8)

Equation (8)

4 shows a circuit diagram of a 3LT VSC.

4, the first 1 S _{x_H} and the S _{x_N2} constituting the third switching unit 130 constituting the switch section 110 performs the complementary switching operation, constituting the third switch 130 S _{x_N1} and the 2 S _{x_L} constituting the switching unit 120 and also performs a switching operation complementarily. In a single cycle, the output voltage of the 3LT VSC is 0 to V _dc / 2 or ( -V _dc / 2 ) to 0. Switching losses and harmonics can be reduced because the turn-on / off voltage of the switch is reduced. The IGBT turn-on and turn-off losses ( P _xon3 and P _xoff3 ) of the 3LT VSC and the diode reverse recovery loss ( P _xrr3 ) are expressed by the following equations (9) to (11), respectively.

수식(9)

Equation (9)

수식(10)

Equation (10)

수식(11)

Equation (11)

Where V _dc / 2 is equal to the switching voltage of 3LT VSC.

When the current flows through the neutral point (S _{x_N1} , S _{x_N2} ) of the IGBT, the conduction loss increases twice as much as the two-level VSC because conduction loss occurs in both the transistor and the diode. Therefore, if the duty ratio of S _{x_N1} and S _{x_N2} is high enough, the conduction loss of the 3LT VSC will be higher than the conduction loss of the 2-level VSC.

The operation of the 3LT VSC is separated based on the areas shown in Fig. In the areas 1 and 3, S _{a_N} 1 maintains the ON state and S a _L maintains the OFF state while S _{a_H} and S _{a_N 2} perform the complementary switching operation. In region 1 and S a - _H on, current flows through the S a - _H diode and diode conduction losses occur. Also, in the _{Si_H} switching time, a diode reverse recovery loss occurs. In the S a _L on state, current flows through the S _{a_L} transistor. Therefore, transistor conduction loss occurs. During the switching time, S _{x_L} turn-on and turn-off losses occur.

5 is a table showing switch loss and conduction loss equations during operation in all regions of a 3LT VSC.

Referring to FIG. 5, since the current flows through one IGBT transistor and one IGBT anti-parallel diode, the 3LT VSC switching loss ( P _xsw3 ) uses the same equation in each region. The 3LT VSC conduction loss ( P _xcon3 ) is the sum of the three terms because the two switches are at neutral. Conduction loss in each region depends on the duty ratio of each switch. The 3LT VSC total loss can be expressed by the following equation (12).

수식(12)

Equation (12)

6 is a flowchart illustrating a method of operating a 3-level T-type inverter using level switching according to the present invention.

The 3LT inverter operating method according to the present invention proposes a mode switching method between 2-level VSC and 3LT VSC for optimum efficiency. (8) and (12), and immediately determines which operation mode produces high efficiency. The parameters affecting the loss operation result are the duty ratio (of the DC link voltage and the output voltage) and the inductor current. The operation method according to the present invention can achieve higher efficiency than each of the 2-level VSC or 3LT VSC.

The sequence of FIG. 6 is performed every control cycle of 10 to 20 kHz. Referring to Figure 6, a step by measuring a parameter value (V _xn, V _dc, i _xL) is started (ST610). The parameter values are the output voltage ( V _xn ), DC link voltage ( V _dc ) and inductor current ( i _xL ) of each phase.

Next, operation for a two level VSC switching losses and conduction losses in the operation mode (P _xsw2, P _xcon2) and, switching losses and conduction losses (P _xsw3, P _xcon3) in 3LT VSC operation mode (ST615 ~ ST650) .

Loss of operation in each operation mode is calculated for each area in accordance with an output voltage (V _xn) and inductor current (i _xL) in a sequence of FIG. The switching loss and the conduction loss ( P _xsw2 , P _xcon2 ) in the two-level VSC operating mode in each region are calculated based on the loss equation given in the table shown in Fig. 3, and the switching in the 3LT VSC operating mode The loss and conduction losses ( P _xsw3 , P _xcon3 ) are calculated based on the loss equation given in the table shown in Fig. The switching loss and conduction loss in each phase shown on the loss equation can be obtained by the above-mentioned equations (1) - (3), (5), (6), and (9) - (11).

For example, if at least determined whether the V _xn is greater than or equal to zero in step ST620, and 0, the i _xL in step ST625 it is determined whether or equal to zero. If V _xn is less than 0, it is determined in step ST 630 if i _xL is equal to or greater than zero. If it is determined in step ST625 that i _xL is equal to or larger than 0, the loss in area 1 is calculated (ST 635). In this manner, the loss in the area 2 is calculated in step ST640, the loss in the area 3 in the step ST645, and the loss in the area 4 in the step ST650.

And using the above-described formula (8) calculates the total loss (P _x2) in a two level VSC mode of operation, and by using the equation (12) calculates a total loss (P _x3) in 3LT VSC operation mode ( ST655). The total loss in each operation mode calculated in step ST655 is compared (ST660).

If P _x3 is greater than or equal to P _x2 , the flow advances to step ST665 to select the two-level VSC operation mode. Otherwise, the process proceeds to step ST670 and the 3LT VSC operation mode is selected.

7 is a diagram illustrating a PSIM simulation waveform for verifying an operation method according to the present invention. Figure 7 is the switching frequency _{(f s) 10kHz, (a} ) of the load resistance and a waveform measured at 48Ω, 7 denotes a waveform of the output voltage _{V an, V bn, V cn} , (b) the inductor current i shows the waveform of the _aL, i _bL, i _cL and, (c) is a comparison of the a phase loss of the two-level VSC (P _a2) and the a phase loss (P _a3) of 3LT VSC waveform, (d) is lost And the difference ( P _a3 - P _a2 ).

The operation of the inverter and the calculation of the used equations were performed using the DLL function. A thermal module in the PSIM was used to verify the operation results. Table 1 below shows the parameters used in the simulation and experiment.

System parameters Parameter Value DC-link volatage ( V _dc ) 700 [V] Output volatage ( V _xn ) 220 [V] Switching frequency ( f _s ) 10, 15, 20 [kHz] Resistor load ( R _load ) 24, 48 [Ω] Filter inductor ( L _f ) 1 [mH] Filter capacitor ( C _f ) 100 [uF]

Fig. 7 shows the result of the PSIM simulation. The operating loss in each method is identified by the total loss that can be obtained from the thermal module. The average value of total loss (AVG) is used to identify the average loss.

Total loss (P _a3) a total loss (P _a2) and 3LT VSC two levels of VSC also on A as shown in 7 (c) has been verified by simulation waveform, (P _a3, as shown in (d) - P _a2 ). < / RTI >

FIG. 8 is a table showing the results of the simulation as shown in FIG. 7 under the condition of the parameters in Table 1. FIG. Referring to FIG. 8, it can be seen that the method of switching between the 2-level VSC operating mode and the 3LT VSC operating mode according to the present invention achieves higher efficiency than the respective individual operating methods. The efficiency increased about 0.3% at a frequency of 10 kHz and a resistive load of 1 kW.

9 to 11 are graphs showing experimental results of a 3LT inverter operating method using level switching according to the present invention. FIG. 9 shows an operation waveform of a 2-level VSC, FIG. 10 shows an operation waveform of a 3LT VSC And FIG. 11 shows an operation waveform according to the present invention.

The experimental conditions of FIGS. 9 to 11 are the same as those listed in <Table 1>. The prototype 3LT VSC used in the experiment consisted of Vincotech 70-W212NMA300SC-M208P IGBT (1200V, 300A). To implement the proposed method of operation, a DSP (Digital Signal Processor) TMS320F28335 was used. The control period is 15 kHz, and the resistive load is 2 kW.

In the operating waveforms of the two level VSC in Fig. 9, Ch1 is the output voltage _{V an (250V / div),} CH2 denotes respectively the inverter voltage _{V ainv (250V / div),} Ch3 is the inductor current i _aL (10A / div). Referring to FIG. 9, it can be seen that the inverter voltage variation at the 2-level VSC is equal to the DC link voltage.

In the operating waveforms of the 3LT VSC in Fig. 10, Ch1 is _an output voltage V (250V / div), CH2 denotes respectively the inverter voltage _{V ainv (250V / div),} Ch3 is the inductor current i _aL (10A / div). Referring to FIG. 10, it can be seen that the current variation of the 3LT VSC is lower than the 2-level VSC.

11, Ch 1 represents the output voltage V _an (250 V / div), CH 2 represents the inverter voltage V _ainv (250 V / div), _{Ch 3} represents the inductor current i _aL (10 A / div), Ch4 is another loss difference in the two different operating modes (P _a3 - _a2 denotes a P) value (2W / div), respectively.

As described above, when the additional waveform existing in the example of FIG. 11, '( P _a3 - P _a2 ) 0', the inverter operates as a two level VSC. '( P _a3 - P _a2 ) <0', the inverter operates with 3LT VSC. It can be seen that the 2-level VSC operation is performed at phase angles of approximately '0' and 'π'.

FIG. 12 is a table showing the efficiency comparison according to the experimental results of FIGS. 9 to 11. FIG. In order to measure the efficiency, HIOKI PW6001 power analyzer with 0.02% accuracy of the basic power was used. At a switching frequency of 10kHz, the 2-level VSC operating method achieved higher efficiency than the 3LT VSC operating mode. At the switching frequency of 15kHz, the 3LT VSC operating method achieved higher efficiency than the 2-level VSC. The method of operating a 3LT inverter using level switching according to the present invention achieves higher efficiency than two different operating methods. In the operating method according to the invention, the efficiency increased by about 0.67% at a frequency of 15 kHz and a load of 2 kW resistances.

The 3LT inverter operating method using the level switching of the present invention as described above has proposed a mode switching method between 2-level VSC and 3LT VSC for optimum efficiency. The 3LT VSC has the advantage of a low switching loss because the switching voltage is half the DC link voltage. However, the 3LT VSC has a disadvantage in that conduction loss is higher than that of the 2-level VSC due to the two neutral switches. Therefore, 3LT VSC showed lower efficiency than 2-level VSC at low voltage. Therefore, the method of operating the 3LT inverter using the level switching of the present invention achieves higher efficiency than that of each method by switching the operation mode between the 3LT VSC and the 2-level VSC, and the operation method of the present invention is high Efficiency is achieved. Overall efficiency increased about 0.67% at 15kHz frequency and 2kW resistive load.

The invention described above is susceptible to various modifications within the scope not impairing the basic idea. In other words, all of the above embodiments should be interpreted by way of example and not by way of limitation. Therefore, the scope of protection of the present invention should be determined in accordance with the appended claims rather than the above-described embodiments, and should be construed as falling within the scope of the present invention when the constituent elements defined in the appended claims are replaced by equivalents.

110: first switching unit 120: second switching unit
130: a third switching unit

Claims (3)

A three-level T-type inverter operation method for operating a three-level T-type inverter including a circuit configuration of a two-level voltage source converter and a circuit configuration of a three-level T-type voltage source converter,
(a) measuring an output voltage ( V _xn ), a DC link voltage ( V _dc ), and an inductor current ( i _xL ) at each phase for each operation period of the 3-level T-type inverter;
(b) calculating a switching loss ( P _xsw2 ) and a conduction loss ( P _xcon2 ) when operating as the two-level voltage source converter using the parameters measured in the step _Calculating a switching loss ( P _xsw3 ) and a conduction loss ( P _xcon3 ) at the time of switching;
(c) comparing the total loss (P _x2) and total loss (P _x3) of the third level T-type voltage-source converter of the two-level voltage source converter in said operation cycle, respectively; And
(d) operating as a two-level voltage source converter if P _x3 is greater than or equal to P _x2 , and operating as a three-level T-type voltage source converter if P _x3 is less than P _x2
Level T-type inverter.

Equation (8)

Equation (12)
Here, P _x2 is the total loss of the two-level voltage source converter, P _xsw2 is a switching loss when operating in a two-level voltage source converter, P _xcon2 are conduction losses when operating in a two-level voltage source converter, P _x3 is the total loss of the three-level T-type voltage-source converter, P _xsw3 3 level T and the switching loss when operating in a type of voltage-source converter, P _xcon3 the switching loss when operating in a three-level T-type voltage-source converter to be.
The method according to claim 1,
Wherein the switching frequency ( f _s ) of the switches included in the 3-level T-type inverter is 10 kHz to 20 kHz. delete

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