KR101960849B1 - Organic light-emitting diode display device and driving method thereof - Google Patents

Abstract

The present invention discloses an organic light emitting display. More specifically, the present invention relates to a structure in which the number of channels of a data driver is reduced by sharing a channel between neighboring pixels, thereby improving image quality degradation caused by inputting different data to pixels of the same color at different driving timings To an organic light emitting display and a driving method thereof.
The organic light emitting diode display of the present invention includes a mux driver for alternately connecting first and second data lines connected to two adjacent pixels to one channel, And includes a mux transistor circuit connected to the channel and a voltage compensation circuit for equally reflecting the voltage loss generated in the first data line to the second data line.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an organic light emitting diode (OLED) display, and more particularly, to an organic light emitting diode (OLED) display device having a structure in which the number of channels of a data driver is reduced by sharing a channel between neighboring pixels, And an organic light emitting display device and a driving method thereof.

A flat panel display device proposed to replace a conventional cathode ray tube display device includes a liquid crystal display device, a field emission display device, a plasma display device, A display device (Plasma Display Panel Device) and an OLED display device (Organic Light-Emitting Diode Display Device).

In the organic light emitting display, the organic light emitting diode provided in the display panel has a high luminance and low operating voltage characteristics, and is self-emitting type that emits light by itself. Therefore, the organic light emitting display has a high contrast ratio, It has the advantage that it can be implemented. In addition, the response time is as small as several microseconds (μs), the moving image is easy to implement, the viewing angle is not limited, and the characteristic is stable even at low temperatures.

1 is an equivalent circuit diagram of one pixel of a conventional OLED display.

As shown in the figure, the organic light emitting display includes a scan line and a data line, a data line, and a data line. The data lines are spaced apart from each other by a predetermined distance to supply a power source voltage ELVDD. PX).

The switching TFT SWT applies a data voltage Vdata to the first node N1 in response to the scan signal Scan. The switching TFT SWT applies a driving voltage ELVDD to the source electrode, A driving thin film transistor DT for applying a drain current to the organic light emitting diode OLED according to a voltage applied to the driving transistor DT, Gt; C1 < / RTI >

The organic light emitting diode EL includes an organic light emitting layer formed between the cathode electrode and the anode electrode, the anode electrode connected to the drain electrode of the driving transistor DT, the cathode electrode grounded (ELVSS). The above-described organic luminescent layer may be composed of a hole transporting layer, a luminescent layer and an electron transporting layer.

The organic light emitting display device displays the gray level of an image by controlling the amount of current flowing in the organic light emitting diode by the driving thin film transistor DT, and the image quality is determined by the characteristics of the driving thin film transistor DT.

However, even within one display panel, a threshold voltage deviation occurs between the pixel-to-pixel driving TFTs, and the current flowing through each of the organic light emitting diodes (OLEDs) changes, resulting in a problem that the desired gradation can not be realized. In order to solve this problem, recently, as shown in FIG. 2, one or more sampling thin film transistors (SPT) for applying a reference voltage Vref are added to sense a threshold voltage of a driving transistor, A pixel structure for compensating a threshold voltage deviation by removing a sensed threshold voltage component is widely used.

In addition to the above-described threshold voltage deviation compensating pixel structure, in order to reduce the number of channels of a data driver (not shown) for providing a data voltage to pixels of a driving OLED display device, a multiplexer structure Is proposed.

FIG. 3 is a diagram illustrating a portion of an organic light emitting display having a channel shared structure using a conventional multiplexer, and FIG. 4 is a diagram illustrating signal waveforms applied to the organic light emitting display of FIG.

As shown in the figure, the data wiring sharing structure using the multiplexer is composed of two neighboring pixels RG, BR, and NB on the non-display region N / A between the display region A / A of the display panel and the data driver And a plurality of switching elements T _MUX1 and T _MUX2 connected to one channel CH1, CH2 and CH3, respectively, according to the control signals S1 and S2 of the multiplexer incorporated in the data driver, The number of channels of the data driver is reduced to 1/2 compared with the conventional one by driving the switching elements T _MUX1 and T _MUX2 in an alternate manner by dividing the period 1H into two periods.

However, in the above-described structure, the second switching device T _MUX2 drives the turn-on time to overlap with the scan signal Scan in order to secure a sampling period for voltage compensation, The data lines DL1, DL3 and DL5 charged in the turn-on state of the first switching element T _MUX1 among the wires DL1 to DL6 are turned on by the switching thin film transistors (SWT in Fig. 2) of each pixel PX, A phenomenon (a) occurs in which the voltage level is lowered as the voltage is turned on.

In particular, in the circuit structure of FIG. 3, the R pixels R have the same voltage, the G pixels G do not change in voltage, and the gradation change due to the voltage change is not visible. , A deviation occurs between the data voltages charged in the neighboring B pixel (B), and a problem of dim deficiency is visually recognized when a monochromatic image is displayed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to solve the image quality degradation caused by sharing a data channel by using a multiplexer in an OLED display.

According to an aspect of the present invention, there is provided an organic light emitting diode display comprising: a display panel having a plurality of pixels defined therein; A scan driver and an EM driver for providing a scan signal and an EM signal to the pixel, respectively; A data driver having a plurality of channels for supplying data voltages to the pixels; And a mux driver for alternately connecting first and second data lines connected to two neighboring pixels to one channel, wherein the mux driver drives the first and second data lines to the one channel Connecting Mux transistor circuits; And a voltage compensation circuit for equally reflecting the voltage loss generated in the first data line to the second data line.

The pixel is divided into an initial section, a sampling section and an emission section.

The mux transistor circuit includes: a first mux transistor connected to the channel; And a second mux transistor connected to the channel and being turned on in the initial period.

Wherein the display panel has a plurality of data lines, data lines driving pixels of a first color are connected to the corresponding channels by the first mux transistors, data lines driving pixels of a second color are connected to the second And the data lines for driving the pixels of the third color are connected to the corresponding channel by the first or second mux transistor.

And the voltage compensation circuit is connected to a data line connected to the second mux transistor.

Wherein the voltage compensation circuit comprises: a first voltage compensation transistor for connecting a data line connected to the second mux transistor to an N node; And a second voltage compensating transistor for connecting the N node and the reference voltage terminal.

The first and second voltage-compensating transistors are all turned on during the same period as the initial period within the sampling period.

According to an aspect of the present invention, there is provided a method of driving an organic light emitting diode display, the method including: selectively connecting first and second data lines connected to neighboring pixels to one channel of a data driver, The method comprising: applying a data voltage by connecting the channel and the first data line to each other; Connecting the channel and the second data line to apply a data voltage and initializing the pixel; Sampling a threshold voltage of the driving thin film transistor of the pixel and reflecting the voltage loss generated in the first data line during sampling to the second data line in the same manner; And applying a current corresponding to the sampled threshold voltage to the organic light emitting diode.

The step of reflecting the voltage loss generated in the first data line to the second data line is the same as the period of the step of initializing the pixel.

According to the embodiment of the present invention, an OLED display device sharing a data channel between neighboring pixels is provided with a separate voltage compensation circuit for a pixel in which no voltage loss occurs, so that the data voltages of all the pixels are controlled equally There is an effect that the image quality degradation problem such as dim defect can be solved.

1 is an equivalent circuit diagram of one pixel of a conventional OLED display.
2 is a diagram showing a part of a pixel to which a threshold voltage deviation compensation structure is applied to a conventional organic light emitting diode display.
FIG. 3 is a diagram illustrating a portion of an organic light emitting display having a channel shared structure using a conventional multiplexer.
FIG. 4 is a diagram illustrating signal waveforms applied to the OLED display of FIG. 3. Referring to FIG.
5 is a diagram illustrating an overall structure of an OLED display according to an exemplary embodiment of the present invention.
6 is an equivalent circuit diagram of six neighboring pixels of the organic light emitting display according to the present invention and a mux driving unit connected thereto.
7 is a diagram showing a signal waveform applied to the circuit of Fig.

Hereinafter, a driving method of an OLED display according to a preferred embodiment of the present invention will be described with reference to the drawings.

In the following description, the pixel and the mux portion of the organic light emitting display device are all described on the basis of the P-MOS transistor. Accordingly, the turn-on voltage at which the transistor is turned on is at least lower than the ground voltage GND, and the turn-on voltage at which the transistor is turned off indicates a high-level voltage at least higher than the ground voltage (GND). Therefore, when the pixel and the driver are implemented as N-MOS transistors, the turn-on and turn-off voltages become high level voltage and low level voltage, respectively.

5 is a diagram illustrating an overall structure of an OLED display according to an exemplary embodiment of the present invention.

As shown in the figure, the OLED display includes a display panel 100 in which a plurality of pixels are defined, and a plurality of drivers 110, 120, 130, and 140 connected to the display panel 100.

The display panel 100 includes a plurality of scan lines SL1 to SLn and data lines DL1 to DLm formed on a plastic substrate so as to intersect with each other and the scan lines SL1 to SLn and the data lines DL1 to DLm Pixels PX corresponding to red (R), green (G) and blue (B) are defined at the intersections. The EM signal lines EML1 to EMLi arranged in a direction parallel to the scan lines SL1 to SLn are connected to the respective pixels PX and each of the pixels PX is connected to a reference (Not shown) for supplying a voltage Vref, a power supply voltage ELVDD for driving, and a ground voltage ELVSS.

In particular, two adjacent data lines DL1, DL2, DL3, DL4, DL5, DL6, DLm-1, DLm are connected to one of the data driver 130 through the mux driver 140, Lt; / RTI > channel.

 Each of the pixels PX of the display panel 100 includes a scan driver 110 which is formed on the outer periphery of the display panel and applies a scan signal to the scan lines SL1 to SLn, An EM driver 120 for applying an EM signal, and a data driver 130 for applying a data voltage to the data lines DL1 to DLm. Here, the scan driver 110 and the EM driver 120 may be implemented as thin film transistors and mounted in the display panel 100.

Particularly, the data driver 130 includes a plurality of transistors (not shown) for selectively connecting the data lines DL1 to DLm and the data driver 130, not directly to the display panel 100 And is connected through a mux drive unit 140. Here, the transistor forming the mux driver 140 may be mounted in the display panel 100 in the form of a thin film transistor.

Although not shown, the pixel PX includes at least one organic light emitting diode, a capacitor, a switching thin film transistor, a driving thin film transistor, and a plurality of sampling thin film transistors. Here, the organic light emitting diode may include a first electrode (hole injection electrode), an organic compound layer, and a second electrode (electron injection electrode).

The organic compound layer may further include various organic layers for efficiently transporting carriers of holes or electrons to the light-emitting layer in addition to the light-emitting layer in which light is actually emitted. These organic layers may be a hole injecting layer and a hole transporting layer positioned between the first electrode and the light emitting layer, an electron injecting layer and an electron transporting layer positioned between the second electrode and the light emitting layer.

The switching thin film transistor is connected to the scan lines SL1 to SLn and the data lines DL1 to DLm and is connected to the data lines DL1 to DLm in accordance with the switching voltages inputted to the scan lines SL1 to SLn Voltage to the driving thin film transistor. The capacitor is connected to the switching thin film transistor and the power supply wiring and stores a voltage proportional to a difference between a data voltage transmitted from the switching thin film transistor and a voltage obtained by removing the threshold voltage of the sampled driving thin film transistor through the reference voltage.

A plurality of sampling thin film transistors are provided to sample a threshold voltage of the driving thin film transistor through an applied reference voltage to remove a threshold voltage component from a current flowing through the driving thin film transistor.

In addition, the driving thin film transistor is connected to the power supply wiring and the capacitor to supply the drain current corresponding to the gate-source voltage to the organic light emitting diode, and the organic light emitting diode emits light by the drain current. Here, the driving thin film transistor includes a gate electrode, a source electrode and a drain electrode, and an anode electrode of the organic electroluminescent diode is connected to a drain electrode of the driving thin film transistor.

The connection structure of the switching thin film transistor, the sampling thin film transistor and the driving thin film transistor will be described in detail later.

The scan driver 110 and the EM driver 120 sequentially apply a scan signal and an EM signal to each pixel in units of one horizontal line. The scan driver 110 and the EM driver 120 may be implemented as a shift register having a plurality of stages and a scan control signal SCS generated from a timing control circuit (not shown) Level or low level scan signals and EM signals in accordance with an initialization period and a sampling period corresponding to the control signals MCS and EMCS.

The scan signals and the EM signals are both in the low level state in the initialization period. In the sampling period, only the scan signal is output in the low level state, and the initialization period and the sampling period continue for the pixel driving.

The data driver 130 receives the image data supplied from the external system by the built-in timing controller, converts the image data into an analog voltage data voltage that can be processed by the pixel PX, Generates control signals SCS and MCS and supplies the data voltage to the pixel PX through the data lines DL1 to DLm in synchronization with the driving timing of each pixel.

Although not shown, the data driver 130 includes a multiplexer (not shown) for generating mux control signals S1 and S2 for selectively turning on and off the mux transistor circuit 141 provided in the mux driver 140 , And the multiplexer alternately drives two neighboring pixels PX of the display panel 100 during a horizontal period (1H). The above-described multiplexer is implemented as a 1x2 demultiplexer (1x2 demultiplexer) that outputs one turn-on voltage without overlapping any of the two first mux control signals S1 and the second mux control signals S2 .

The mux driving unit 140 drives the two adjacent data lines DL1, DL2, DL3, DL4, and DL2 of the display panel 100 for one channel of the data driver according to the mux control signals S1, DL5, DL6), (DLm-1, DLm)} alternately. Here, the first and second mux transistors are staggered by colors R, G, and B of each pixel PX. Accordingly, at least one of the two neighboring data lines DL1, DL2, DL3, DL4, DL5, DL6, DLm-1, DLm is alternately connected to each channel of the data driver 130 do.

The mux transistor circuit 141 of the mux driver 140 is further connected to the voltage compensation circuit 145. The voltage compensating circuit 145 receives the voltages {DL1, DL2, DL3, DL4, DL5, DL6, DLm-1, DLm} between adjacent two data wirings by the first and second mux transistors It serves to compensate the car. This voltage compensation circuit 145 is composed of first and second compensation transistors (not shown).

Hereinafter, an organic light emitting display according to an embodiment of the present invention and a driving method thereof will be described with reference to drawings.

6 is an equivalent circuit diagram of six neighboring pixels of the organic light emitting display according to the present invention and a mux driving part connected to the pixel. FIG. 7 is a diagram showing signal waveforms applied to the circuit of FIG. The six pixels are the pixels for the three primary colors R, G, and B, respectively.

Referring to FIG. 6, one pixel of the organic light emitting diode display of the present invention includes six thin film transistors, one capacitor, and an organic light emitting diode.

The switching transistor SWT is supplied with the scan signal Scan to the gate electrode and the data line DL1 to DL6 to the source electrode to receive the data signal Vdata and the drain electrode to the first node N1 .

In the first sampling transistor SPT1, the EM signal EM is applied to the gate electrode, and the reference voltage Vref is applied to the source electrode. Further, the drain electrode is connected to the first node N1.

In the second sampling transistor SPT2, the scan signal Scan is applied to the gate electrode, the reference voltage ELVDD is applied to the source electrode, and the drain electrode is connected to the second node N2.

In the three sampling transistor SPT3, the gate electrode is connected to the EM signal wiring EML, and the source and drain electrodes are connected to the third node N3 and the second node N2, respectively.

The scan signal (Scan) is applied to the gate electrode of the fourth sampling transistor SPT4, and the source and drain electrodes thereof are connected to the fourth node N4 and the third node N3, respectively.

The gate electrode of the driving transistor DT is connected to the fourth node N4, the source voltage ELVDD is applied to the source electrode, and the drain electrode is connected to the third node N3. Therefore, the gate electrode and the drain electrode of the driving transistor DT are connected to the source and drain electrodes of the fourth sampling transistor SPT4, respectively.

In the capacitor C1, both electrodes are connected to the first node N1 and the fourth node N4, respectively.

The mux driver of the organic light emitting diode display of the present invention may further include two data lines DL1, DL2 adjacent to the respective channels CH1 to CH3 of the data driver according to the first and second mux control signals S1, And first to third mux transistor circuits 1411, 1412, and 1413 which are alternately interlaced and connected to each other.

Each of the first to third mux transistor circuits 1411, 1412 and 1413 includes a plurality of first and second mux transistors T _MUX1 and T _MUX2 . Here, the channel of the data driver is connected to the data line by the same mux transistor for each color (R, G, B) of each pixel PX.
6, the first and fourth data lines DL1 and DL4 drive R pixels, the second and fifth data lines DL2 and DL5 drive G pixels, and the third And the sixth data lines DL3 and DL6 drive the B pixels, the data lines DL1 and DL4 for driving the R pixels are connected to the corresponding channels by the first mux transistors T _MUX1 The second and fifth data lines DL2 and DL5 for driving the G pixels are connected to the corresponding channel by the second multiplex transistors T _MUX2 and the third and sixth data lines DL2 and DL5 for driving the B pixels, The wirings DL3 and DL6 are connected to the corresponding channel by the first or second mux transistors T _MUX1 and T _MUX2 .
Therefore, the first mux transistors T _MUX1 are connected to the first, fourth and sixth data lines DL1, DL4 and DL6, and the second mux transistors T _MUX2 are connected to the second, And is connected to the wirings DL2, DL3, and DL5.

DL1, DL2, DL3, DL4, DL5, and DL6, which are alternate turn-on voltages, are used as the first and second mux control signals S1 and S2. Are electrically connected to the first to third channels CH1 to CH3, respectively.

At least one of the two data lines {DL1, DL2, DL3, DL4, DL5, DL6} connected to the first to third mux transistor circuits 1411, 1412, And third voltage compensating circuits 1451, 1452 and 1453 are connected.

The first to third voltage compensation circuits 1451, 1452 and 1453 include a plurality of first and second voltage compensation transistors T _COM1 and T _COM2 connected to the fifth node N5, respectively. The second voltage compensation transistor _TCOM2 is connected to the reference voltage Vref.
That is, the first to third voltage compensating circuits 1451, 1452 and 1453 are controlled by the S clock signal SCLK and are connected to one of the data lines connected to the second mux transistor T _MUX2 , A second voltage compensating transistor T _COM1 for connecting the fifth node N5 to the reference voltage Vref by being controlled by an E clock signal ECLK, (T _COM2 ).
The first to third voltage compensation circuits 1451, 1452 and 1453 are connected to the second, third and fifth data lines DL2, DL3 and DL5 connected to the second mux transistors T _MUX2 .

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That is, the first to third voltage compensation circuits 1451, 1452, and 1453 of the present invention are initialized by the first to third mux transistor circuits 1411, 1412, and 1413, DL4 and DL6 connected to the other data lines DL2, DL3 and DL5 so as to generate a voltage loss equal to the voltage loss to generate the same voltage loss in all the data lines DL1 to DL6 .

Hereinafter, a method of driving the OLED display according to a signal applied to the OLED display device of the present invention will be described.

7, the scan signal Scan is at a turn-off voltage (high) level and the EM signal EM is at a turn-on voltage (low) level (Low) level of the turn-on voltage (low) level from the data driver in a state where the S clock signal SCLK is at a turn-off voltage level and the E clock signal ECLK is at a turn-on voltage (S1) is the first mUX transistor (T _MUX1) is turned applied-on and, the first to third channels (CH1 ~ CH3) of the data driver accordingly respectively the first, the fourth and the sixth data line (DL1 , DL4, and DL6. At the same time, the first data voltage Vdata is applied to the first, fourth, and sixth data lines DL1, DL4, and DL6.

At this time, since the EM signal EM is at the turn-on voltage (low) level, the first sampling thin film transistor SPT1 is turned on and is turned to the first node N1 reference voltage Vref level of each pixel PX .

The S clock signal SCLK and the E clock signal ECLK applied to the voltage compensating circuits 1451, 1452 and 1453 are output at the turn-off voltage level and the turn-on voltage level, respectively, The second voltage compensation transistor T _COM2 is turned on by the signal ECLK so that the potential of the fifth node N5 becomes the reference voltage Vref level.

After the first mux control signal S1 transitions to the turn-off voltage (high) level, the second mux control signal S2 and the scan signal Scan simultaneously transition to the turn-on voltage level The first to third channels CH1 to CH3 of the data driver are charged with the second data voltage Vdata2 to the second, third and fifth data lines DL2, DL3 and DL5, PX and the sampling transistors SWT and SPT1 to 4 are turned on to initialize the fourth node N4 to the reference voltage Vref level. After a certain time, the EM signal EM transitions to the turn-off voltage level and enters a sampling time.

During the period (initial period) until the scan signal (Scan) transitions to the turn-on voltage level and the EM signal EM transitions to the turn-off voltage level, the switching transistor (SWT) The data voltage Vdata1 charged in the first, fourth and sixth data lines DL1, DL4 and DL6 becomes equal to the reference voltage Vref of the first node N1 as the fourth sampling transistor SPT4 is turned on. (A portion).

At the sampling time, as the second mux control signal S2 transitions to the turn-off voltage level and the EM signal EM of the turn-off level is applied, the first and third sampling transistors The voltage level of the fourth node N4 of each pixel PX becomes equal to or less than the voltage level of the fourth node N4 of the pixel PX according to the following equation 1, the absolute value of the threshold voltage of the driving thin film transistor DT is different from the power supply voltage ELVDD.

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During a period in which the S clock signal SCLK transits to the turn-on voltage (low) level and the E clock signal ECLK transits to the turn-off voltage level, the first voltage compensation transistor T _COM1 turns And the second data voltage Vdata2 charged in the second, third and fifth data lines D2, DL3 and DL5 is lost to a predetermined level by the reference voltage Vref of the fifth node N5 (Part B). At this time, a period (initial period) in which the scan signal (Scan) transits to the turn-on voltage level and the EM signal EM transits to the turn-off voltage level and the S clock signal SCLK The data voltages Vdata1 and Vdata2 applied to all the data lines DL1 to DL6 are set to the same level when the transition to the turn-on voltage level and the transition of the E clock signal ECLK to the turn- ) Have the same voltage loss.

Therefore, the data voltages Vdata1 and Vdata2 applied to all the data lines DL1 to DL6 have the same voltage loss.

When the scan signal Scan transitions to the turn-off voltage level and the EM signal EM transitions to the turn-on voltage level and the sampling period ends, the scan signal Scan is turned off, The switching transistor SWT and the fourth sampling transistor SPT4 are turned off and the voltage level of the fourth node N4 is boosted according to Equation 2 below.

Accordingly, the voltage applied to the gate electrode of the driving thin film transistor DT is changed, and the current IOLED flowing through the driving thin film transistor DT to the organic light emitting diode OLED according to Equation (2) The following equation (3) is satisfied.

In Equation (3), Vgs is the gate-source voltage of the driving thin film transistor DT, and Vth is the threshold voltage of the driving thin film transistor DT. K is a characteristic value of the driving thin film transistor DT, k = mu x Cox x W / L.

Accordingly, the current IOLED flowing through the organic light emitting diode OLED is converted into a function of the first and second data voltages Vdata 1 and 2 and the ground voltage ELVSS, so that the threshold voltage of the driving thin film transistor is compensated do. That is, voltage compensation is performed by removing the threshold voltage (Vth) component from the voltage applied to the capacitor (C1). Accordingly, the organic light emitting diode EL emits light by the drain current of the driving transistor DT.

The organic light emitting display device of the present invention is configured such that the voltages to be lost are set equal to each other according to the different charging time points of the data lines DL1 to DL6 and the data to be applied to the pixels for all the colors R, As the voltage becomes the same, the deviation can be improved.

While a number of embodiments have been described in detail above, it should be construed as being illustrative of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

100: display panel 110: scan driver
120: EM driver 130: Data driver
140: Mux driving part 141: Mux transistor circuit
145: Voltage compensation circuit

Claims (9)

A display panel on which a plurality of pixels are defined;
A scan driver and an EM driver for providing a scan signal and an EM signal to the pixel, respectively;
A data driver having a plurality of channels for supplying data voltages to the pixels; And
And a mux driver for connecting the first and second data lines, which are respectively connected to two neighboring pixels, to one channel in an alternate manner,
The mux-
A mux transistor circuit connecting the first and second data lines to the one channel, respectively; And
A voltage compensating circuit for equally reflecting the voltage loss generated in the first data line to the second data line;
And an organic light emitting diode (OLED). The method according to claim 1,
Wherein the pixel is divided into an initial section, a sampling section, and an emission section. 3. The method of claim 2,
The mux transistor circuit comprises:
A first mux transistor connected to the channel; And
And a second mux transistor connected to the channel and being turned on in the initial period,
And an organic light emitting diode (OLED). The method of claim 3,
Wherein the display panel has a plurality of data lines, data lines driving pixels of a first color are connected to the corresponding channels by the first mux transistors, data lines driving pixels of a second color are connected to the second And the data lines for driving the pixels of the third color are connected to the corresponding channel by the first or second mux transistor. 5. The method of claim 4,
Wherein the voltage compensation circuit comprises:
And the data line is connected to the data line connected to the second mux transistor. 6. The method of claim 5,
Wherein the voltage compensation circuit comprises:
A first voltage compensation transistor for connecting a data line connected to the second mux transistor to an N node; And
And a second voltage compensating transistor for connecting the N-node and a reference voltage terminal. The method according to claim 6,
Wherein the first and second voltage-compensating transistors comprise:
And the organic light emitting display device is turned on for the same period as the initial period within the sampling period. And a mux driver for selectively connecting the first and second data lines connected to two neighboring pixels to one channel of the data driver, the method comprising:
Connecting the channel and the first data line to apply a data voltage;
Connecting the channel and the second data line to apply a data voltage and initializing the pixel;
Sampling a threshold voltage of the driving thin film transistor of the pixel and reflecting the voltage loss generated in the first data line during sampling to the second data line in the same manner; And
Applying a current corresponding to the sampled threshold voltage to the organic light emitting diode
And a driving method of the organic light emitting display device. 9. The method of claim 8,
The step of equally reflecting the voltage loss generated in the first data line to the second data line,
Wherein the driving of the organic light emitting diode is performed for a period equal to a period of initializing the pixel.

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