KR101949384B1 - Liquid crystal display device and method of driving the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device and a driving method thereof, in which pixel electrodes of a previous sub-pixel region and a common electrode of a corresponding sub-pixel region are connected so that two electrodes share the same voltage.

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display (LCD)

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, to a liquid crystal display To a liquid crystal display device capable of reducing power and a driving method thereof.

2. Description of the Related Art [0002] With the development of information society in recent years, demands for the display field have been increasing in various forms. In response to this demand, various flat panel display devices having characteristics such as thinning, light weight and low power consumption have been developed, A liquid crystal display device, a plasma display panel device, and an electro luminescent display device have been studied.

Among these, a liquid crystal display device is one of the most widely used flat panel display devices, and includes two substrates on which pixel electrodes and common electrodes are formed, and a liquid crystal layer between two substrates.

Such a liquid crystal display device determines the orientation of liquid crystal molecules in the liquid crystal layer according to the electric field generated by the voltage applied to the electrodes, and controls the polarization of the incident light to display an image.

On the other hand, a liquid crystal display device is classified into a TN (Twisted Nematic) mode in which liquid crystal molecules are arranged so as to twist by 90 degrees and then a voltage is applied to control the liquid crystal molecules according to the arrangement of liquid crystals and the arrangement of electrodes for applying electric fields to the liquid crystal, An IPS (In-Plane Switching) mode in which two electrodes are formed on a substrate to change the alignment of the liquid crystal molecules by a horizontal electric field in a plane parallel to the alignment film, an initial alignment of the liquid crystal molecules is arranged in parallel to the substrate, And a VA (vertical alignment) mode formed on each of the second substrates to apply a vertical electric field to the liquid crystal.

Among them, the IPS-mode liquid crystal display device includes a first substrate and a second substrate which are generally opposed to each other with a liquid crystal layer therebetween, and the liquid crystal molecules of the liquid crystal layer are driven horizontally by a horizontal electric field, great.

1 is a diagram schematically showing an equivalent circuit of a sub-pixel region of a conventional liquid crystal display device.

1, a gate line GL and a data line DL are formed in a liquid crystal display device (not shown) to define a sub-pixel region SP, A thin film transistor T connected to the gate wiring GL and the data wiring DL and a storage capacitor Cst and a liquid crystal capacitor Clc connected to the thin film transistor T are formed.

Although not shown, a pixel electrode (not shown) may be connected to a drain electrode (not shown) of the thin film transistor T, and a common electrode (not shown) may be formed corresponding to the pixel electrode.

When a pixel voltage (Vdata) and a common voltage (Vcom) are applied to each of the pixel electrode and the common electrode, an electric field is formed between the pixel electrode and the common electrode, and the liquid crystal display device can be driven using the electric field formed.

The storage capacitor Cst serves to maintain the pixel voltage Vdata applied to the pixel electrode until the next frame.

FIG. 2 is a plan view of an array substrate of a conventional liquid crystal display device, and FIG. 3 is a cross-sectional view of a portion cut along the cutting line III-III 'of FIG.

2 and 3, on the array substrate 10 of the conventional liquid crystal display device, a gate wiring 12 and a data wiring 22 (hereinafter, referred to as " Is formed.

An inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x) is deposited on the gate wiring 12 and the gate electrode 11 to form the gate insulating film 13.

A semiconductor layer 15, a source electrode 17, a drain electrode 19 and a pixel electrode 20 are formed on the gate insulating film 13.

At this time, the pixel electrode 20 is formed with a certain distance from the data line 22 to prevent a short circuit with the data line 22.

The gate electrode 11, the gate insulating film 13, and the semiconductor layer 15 are connected to the source electrode 17 (17), which is connected to the gate wiring 12 and the data wiring 22, And a drain electrode 19 are formed on the surface of the thin film transistor T.

A protective layer 24 made of an inorganic insulating material such as silicon oxide (SiO ₂ ) is formed on the data line 22 and the pixel electrode 20. On the protective layer 24, A common electrode 26 having a plurality of openings OA spaced apart from each other and having a bar shape is formed.

In driving the liquid crystal display device, first, the thin film transistor T is turned on in response to a gate signal transmitted through the gate line 12.

Next, while the thin film transistor T is turned on, a data signal is transmitted through the data line 22 to apply the pixel voltage Vdata to the pixel electrode 20. [

An electric field is generated by the common voltage Vcom and the pixel voltage Vdata applied to the common electrode 26, and the liquid crystal layer (not shown) is rearranged by the generated electric field to display an image.

4 is a diagram for explaining a conventional method of driving a liquid crystal display device.

As shown in FIG. 4, in a conventional liquid crystal display device, a plurality of gate lines GL and a plurality of data lines DL are formed which intersect each other to define a plurality of sub-pixel regions.

At this time, the plurality of sub-pixel regions may be arranged in a matrix form of M? N (where M and N are arbitrary natural numbers).

A thin film transistor T connected to the gate line GL and the data line DL and a storage capacitor Cst connected to one electrode of the thin film transistor T are formed in each sub- The other electrodes of the capacitor Cst could be connected together by a common wiring (not shown).

However, in the related art, there is a problem in that a common voltage portion is separately provided to simultaneously apply the same voltage to all the common electrodes, thereby increasing the power consumption of the liquid crystal display device.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide a liquid crystal display device capable of reducing power consumption of a liquid crystal display device by connecting a common electrode of a pixel electrode of a previous sub- It is an object of the present invention to provide a liquid crystal display device.

According to an aspect of the present invention, there is provided a liquid crystal display device including a first substrate on which a plurality of gate wirings and a plurality of data wirings crossing each other and defining a plurality of sub- 2 substrate, wherein the first substrate has a first electrode and a second electrode formed in the plurality of sub-pixel regions, and a fourth electrode spaced apart from the first electrode and the second electrode with a protective layer interposed therebetween, (N + 1) th sub-pixel region and the (N + 1) th sub-pixel region are connected to each other, and the first electrode of the And the fourth electrode of the (N + 2) th sub-pixel region are connected to each other.

Here, the first contact hole and the second contact hole exposing the first electrode and the second electrode are formed on the protection layer, and the first contact hole and the second contact hole are formed through the first contact hole and the second contact hole, respectively. And a connection pattern connecting the second electrode.

The first electrode may be connected to the drain electrode.

In addition, a third contact hole exposing the drain electrode of the (N + 1) th sub-pixel region is formed on the protection layer, and a third contact hole is formed through the third contact hole, May be connected to the drain electrode.

The third electrode and the fourth electrode are preferably connected to each other.

The data driver may further include a data driver that generates a data signal and supplies the generated data signal to the first electrode and the third electrode through the plurality of data lines.

The data driver may further include a data operation unit for calculating a voltage applied to the third electrode using a voltage applied to the first electrode and a gamma voltage.

When the voltage applied to the first electrode is a plus (+) voltage, the data processing apparatus subtracts the voltage from the voltage by the gamma voltage, and when the voltage applied to the first electrode is negative, It is preferable to calculate the voltage applied to the third electrode by adding the gamma voltage from the voltage.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display (LCD) including a first electrode of an Nth (N is an arbitrary natural number) sub-pixel region and an (N + 1) A third electrode of the (N + 1) th sub-pixel region and a fourth electrode of the (N + 2) th sub-pixel region, which are spaced apart from the first electrode and the second electrode, And transferring a data signal to the first electrode and the third electrode through a data line while the thin film transistor is turned on, The same voltage is applied to the second electrode, and the same voltage is applied to the third electrode and the fourth electrode.

Here, the method of driving a liquid crystal display according to an embodiment of the present invention may further include generating the data signal transmitted to the third electrode using a voltage applied to the first electrode and a gamma voltage have.

When the voltage applied to the first electrode is a plus (+) voltage, the data processing apparatus subtracts the voltage from the voltage by the gamma voltage, and when the voltage applied to the first electrode is negative, It is preferable to calculate the voltage applied to the third electrode by adding the gamma voltage from the voltage.

As described above, in the liquid crystal display device according to the present invention, since the common electrode of the pixel electrode of the previous sub-pixel region and the common electrode of the corresponding sub-pixel region are connected and the two electrodes share the same voltage, The power consumption of the display device can be reduced.

1 is a diagram schematically showing an equivalent circuit of a sub-pixel region of a conventional liquid crystal display device.
2 is a plan view of an array substrate of a conventional liquid crystal display device.
Fig. 3 is a cross-sectional view of a portion cut along the cutting line III-III 'of Fig. 2;
4 is a diagram for explaining a conventional method of driving a liquid crystal display device.
5 is a view schematically showing a liquid crystal display device according to an embodiment of the present invention.
6 is a plan view of an array substrate of a liquid crystal display device according to an embodiment of the present invention.
FIG. 7 is a cross-sectional view of the portion cut along the cutting line VII-VII 'of FIG. 6;
FIG. 8 is a cross-sectional view of a portion cut along the line VIII-VIII 'of FIG. 6; FIG.
9 is a diagram for explaining a driving method of a liquid crystal display according to an embodiment of the present invention.
10 is a waveform diagram of a pixel voltage and a common voltage of a liquid crystal display device according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

5 is a view schematically showing a liquid crystal display device according to an embodiment of the present invention.

5, a liquid crystal display device 100 according to the present invention includes a liquid crystal panel 110, a data driver 120, a gate driver 130, a data driver 120, and a gate driver 130 And a timing controller 140 for controlling the driving timing of the driving signal.

The liquid crystal panel 110 may include a plurality of sub-pixel areas SP defined by intersecting a plurality of gate lines GL and a plurality of data lines DL, A thin film transistor T connected to the gate line GL and the data line DL and a storage capacitor Cst and a liquid crystal capacitor Clc connected to the thin film transistor T are formed.

Here, the plurality of sub-pixel regions SP may be, for example, red, green, and blue sub-pixel regions SP and may be sequentially arranged in a horizontal direction (horizontal direction) or a vertical direction have.

In the liquid crystal panel 110, the pixel regions including the red, green, and blue sub-pixel regions SP may be arranged in a matrix form of M? N (where M and N are arbitrary natural numbers).

The thin film transistor T is turned on when a gate signal, that is, a gate high voltage VGH, is supplied through the gate line GL to be supplied to the liquid crystal capacitor Clc through the data line DL And is turned off when receiving the gate-low voltage VGL through the gate line GL.

The liquid crystal capacitor Clc is equivalently represented by a capacitor and is composed of a common electrode (not shown) facing the liquid crystal and a pixel electrode (not shown) connected to the thin film transistor T.

In the liquid crystal capacitor Clc, the alignment state of the liquid crystal is changed according to the data signal charged through the thin film transistor T, and the light transmittance is adjusted to realize the gray level.

The storage capacitor Cst serves to hold the data signal charged in the liquid crystal capacitor Clc until the next frame.

The data driver 120 may include at least one driver IC (not shown) for supplying a data signal to the liquid crystal panel 110.

Although not shown, the data driver 120 may include a data operation unit (not shown) for calculating a pixel voltage (Vdata) applied to the next sub-pixel region using the common voltage and the gamma voltage of the corresponding sub- have.

Here, the gamma voltage may be a voltage corresponding to the gradation of the data signal.

For example, since the first electrode of the Nth sub-pixel region and the second electrode of the (N + 1) th sub-pixel region are connected and the two electrodes share the same voltage, The pixel voltage Vdata applied to the (N + 2) th sub pixel area can be calculated by adding or subtracting the gamma voltage according to the polarity control signal. This will be described in detail with reference to FIG.

The data driver 120 drives the image signal R / G / B, the source start pulse SSP, the source shift clock SSC, and the source output enable SOE, which are received from the timing controller 140, Generates a data signal using an IC control signal, and supplies the generated data signal to the liquid crystal panel 110 through a plurality of data lines DL.

The timing controller 140 receives a plurality of video signals, a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, and a data enable signal DE from a system such as a graphic card through an LVDS (Low Voltage Differential Signal) ), And the like.

The timing control unit 140 may generate a gate control signal for controlling the gate driver 130 and a data control signal for controlling the data driver 120 using a plurality of control signals.

Here, the gate control signal may include a gate start pulse, a gate shift clock, and the like. The data control signal may include a source start pulse, a source shift clock Shift Clock), and the like.

The gate driver 130 may be formed by a GIP (Gate In Panel) method or the like. The gate driver 130 generates a gate signal using a plurality of gate control signals transmitted from the timing controller 140, And can be controlled to be supplied to the liquid crystal panel 110 through the wiring GL.

The gamma voltage generating circuit may further include a gamma voltage generating circuit (not shown) and a power supply circuit (not shown). The gamma voltage generating circuit divides the high voltage and the low voltage to generate a plurality of gamma voltages, And can supply it to the data driver 140.

The power supply circuit may generate and supply a driving voltage for driving components of the liquid crystal display device 100 using a power supply voltage received from the outside.

FIG. 6 is a plan view of an array substrate of a liquid crystal display device according to an embodiment of the present invention, FIG. 7 is a cross-sectional view taken along a section line VII-VII ' ≪ RTI ID = 0.0 > VIII-VIII '. ≪ / RTI >

6 to 8, a plurality of sub-pixel regions (SP in FIG. 5) are defined on the array substrate 200 of the liquid crystal display device according to an embodiment of the present invention, And data lines 222 are formed.

An inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on the gate wiring 212 and the gate electrode 211 to form a gate insulating film 213.

A source electrode 217 and a drain electrode 219 and a first electrode 220a and a second electrode 220b are formed on the gate insulating layer 213. The first electrode 220a, Is connected to the drain electrode 219.

At this time, the first electrode 220a and the second electrode 220b are spaced apart from the data line 222 by a predetermined distance to prevent a short circuit with the data line 22.

Each of the sub-pixel regions SP is connected to the gate wiring 212 and the data wiring 222. The gate electrode 211, the gate insulating film 213 and the semiconductor layer 215 are spaced apart from each other by a source electrode 217 And a drain electrode 219 are formed on the surface of the thin film transistor T.

A protective layer 224 composed of an inorganic insulating material such as silicon oxide (SiO ₂ ) is formed on the data line 222, the first electrode 220a and the second electrode 220b. A third electrode 226b and a fourth electrode 226a having a plurality of bar-shaped openings OA spaced apart from each other and corresponding to the respective sub-pixel regions SP are simultaneously formed on the first electrode 224 and the second electrode 224.

Here, the first electrode 220a, the second electrode 220b, the third electrode 226b, and the fourth electrode 226a have a light transmittance such as indium-tin-oxide (ITO) And can be made of a relatively good transparent conductive metal.

In this case, the first electrode 220a of the Nth (N is an arbitrary natural number) sub-pixel region and the second electrode 220b of the (N + 1) th sub-pixel region are connected to each other, The third electrode 226b of the (N + 2) th sub-pixel region may be connected to the fourth electrode 226a of the (N + 2) th sub-pixel region.

In particular, the third electrode 226b and the fourth electrode 226a may be integrated.

The first contact hole CTH1 and the second contact hole CTH2 are formed in the protective layer 224 to expose the first electrode 220a and the second electrode 220b respectively and the first contact hole CTH1 and the second contact hole CTH2 are formed. The first electrode 220a and the second electrode 220b may be connected through the second contact hole CTH2 and the connection pattern 220c.

The third contact hole CTH3 exposing the drain electrode 219 of the (N + 1) th sub-pixel region is formed in the protective layer 224, and the (N + 1) th And the third electrode 226b of the sub-pixel region may be connected to the drain electrode 219. [

In driving the liquid crystal display device, first, the thin film transistor T is turned on according to a gate signal transmitted through the gate line 212.

Next, while the thin film transistor T is turned on, the data signal is transmitted through the data line 222 to apply the pixel voltage Vdata (Vdata) to the first electrode 220a and the third electrode 226b, Is applied.

At the same time, the same voltage as the first electrode 220a and the third electrode 226b is applied to the second electrode 220b and the fourth electrode 226a, respectively.

In other words, the same voltage is applied to the second electrode 220b of the (N + 1) th sub-pixel region as the first electrode 220a of the Nth sub-pixel region, The same voltage as the third electrode 226b of the (N + 1) th sub-pixel region is applied to the electrode 226a.

As a result, an electric field is generated by a voltage (a voltage serving as a Vcom) applied to the second electrode 220b of the (N + 1) th sub-pixel region and a pixel voltage Vdata applied to the third electrode 226b, The liquid crystal layer (not shown) may be rearranged by the generated electric field to display an image.

According to the present invention, since the pixel electrode of the previous sub-pixel region and the common electrode of the next sub-pixel region are connected to each other and the two electrodes share the same voltage, It is not necessary to apply the voltage Vcom, and the power consumption of the liquid crystal display device can be remarkably reduced.

9 is a diagram for explaining a driving method of a liquid crystal display according to an embodiment of the present invention.

As shown in FIG. 9, in the liquid crystal display device according to the embodiment of the present invention, a plurality of gate lines GL and a plurality of data lines DL are formed which intersect each other to define a plurality of sub-pixel regions.

A thin film transistor T connected to the gate line GL and the data line DL and a storage capacitor Cst connected to one electrode of the thin film transistor T are formed in each sub-pixel region.

For example, the drain electrode of the thin film transistor T in the Nth (N is an arbitrary natural number) sub-pixel region is connected to one end of the storage capacitor Cst and the storage capacitor Cst of the (N + 1) It is connected to the other end at the same time.

One end of the storage capacitor Cst of the (N + 1) th sub pixel region is connected to the drain electrode of the (N + 1) th sub pixel region and the other end of the storage capacitor Cst of the do.

Therefore, the pixel voltage (Vdata) is applied to the first electrode of the Nth sub-pixel region and the same voltage is applied to the second electrode of the (N + 1) th sub-pixel region,

The pixel voltage Vdata is applied to the third electrode of the (N + 1) th sub-pixel region and the same voltage is applied to the fourth electrode of the (N + 2) th sub-pixel region.

10 is a waveform diagram of a pixel voltage and a common voltage of a liquid crystal display device according to an embodiment of the present invention.

In the case of the line inversion method, the polarity of the pixel voltage Vdata can be inverted in units of a line and a frame in accordance with the polarity control signal generated from the timing controller (140 in FIG. 5).

The data driver 120 of FIG. 5 may calculate and supply the pixel voltage Vdata applied to the third electrode using the pixel voltage Vdata applied to the first electrode and the gamma voltage.

Assuming that the gamma voltages necessary for displaying an image are 2V, 4V, 6V, 8V, and 4V, 2V is applied as the pixel voltage (Vdata) to the first electrode of the Nth sub-pixel region. At this time, the polarity control signal is high and the common voltage is 0V.

That is, the Nth pixel voltage Vdata applied to the first electrode of the Nth sub-pixel region is a value (2V) obtained by adding the gamma voltage (2V) at the common voltage (0V).

The second electrode of the (N + 1) th sub-pixel region is applied with the same 2V as the Nth pixel voltage (Vdata) applied to the first electrode of the Nth sub-pixel region.

Therefore, the pixel voltage (Vdata) of the third electrode in the (N + 1) th sub pixel region becomes -2V. At this time, the polarity control signal is low.

In other words, the (N + 1) th pixel voltage Vdata becomes a value (-2V) obtained by subtracting the gamma voltage (4V) from the voltage (2V) of the second electrode of the (N + 1) th sub pixel area.

At the same time, -2V equal to the (N + 1) th pixel voltage (Vdata) is applied to the fourth electrode of the (N + 2) th sub pixel region.

Next, the (N + 2) th pixel voltage (Vdata) is a value (4V) obtained by adding the gamma voltage (6V) at the voltage (-2V) at the fourth electrode in the (N + 2) th sub pixel area. At this time, the polarity control signal is high.

The (N + 3) th pixel voltage (Vdata) is a value (-4V) obtained by subtracting the gamma voltage (8V) from the voltage (4V) at the second electrode of the (N + 3) th sub pixel area. At this time, the polarity control signal is low.

Similarly, the (N + 3) th pixel voltage Vdata is a value (0V) obtained by adding the gamma voltage (4V) at the voltage (-4V) at the fourth electrode in the (N + 4) th sub pixel region. At this time, the polarity control signal is high.

That is, when the polarity control signal is high, the gamma voltage is added to the common voltage of the corresponding sub-pixel region. When the polarity control signal is low, the gamma voltage is subtracted from the common voltage of the corresponding sub- The pixel voltage (Vdata) applied to the sub-pixel region can be calculated.

In other words, since the common voltage of the corresponding sub-pixel region corresponds to the pixel voltage of the previous sub-pixel region, if the gamma voltage is added or subtracted from the pixel voltage of the previous sub-pixel region according to the polarity control signal, (Vdata) can be calculated.

The embodiments of the present invention as described above are merely illustrative, and those skilled in the art can make modifications without departing from the gist of the present invention. Accordingly, the protection scope of the present invention includes modifications of the present invention within the scope of the appended claims and equivalents thereof.

200: array substrate 212: gate wiring
213: gate insulating film 215: semiconductor layer
217: source electrode 219: drain electrode
22a: first electrode T: thin film transistor

Claims (11)

A first substrate on which a plurality of gate lines and a plurality of data lines are formed to intersect with each other to define a plurality of sub-pixel regions, and a second substrate facing the first substrate,
The first substrate includes a first electrode and a second electrode formed in the plurality of sub-pixel regions, and a fourth electrode and a third electrode spaced apart from the first electrode and the second electrode with a protective layer therebetween In addition,
A first electrode of the Nth (N is an arbitrary natural number) sub-pixel region and a second electrode of the (N + 1) th sub-pixel region are connected to each other,
And the third electrode of the (N + 1) th sub-pixel region and the fourth electrode of the (N + 2) th sub-pixel region are connected to each other.
The method according to claim 1,
A first contact hole and a second contact hole are formed on the protection layer to expose the first electrode and the second electrode, respectively,
And a connection pattern connecting the first electrode and the second electrode through the first contact hole and the second contact hole.
The method according to claim 1,
And the first electrode is connected to the drain electrode.
The method according to claim 1,
And a third contact hole exposing the drain electrode of the (N + 1) th sub-pixel region is formed on the passivation layer,
And a third electrode of the (N + 1) th sub-pixel region through the third contact hole is connected to the drain electrode.
The method according to claim 1,
And the third electrode and the fourth electrode are connected to each other.
The method according to claim 1,
And a data driver for generating a data signal and supplying the generated data signal to the first electrode and the third electrode through the plurality of data lines.
The method according to claim 6,
The data driver includes:
And a data operation unit for calculating a voltage applied to the third electrode using a voltage applied to the first electrode and a gamma voltage.
8. The method of claim 7,
The data processing apparatus includes:
When the voltage applied to the first electrode is a voltage of positive polarity, the voltage is subtracted from the voltage by the gamma voltage,
Wherein when the voltage applied to the first electrode is a negative voltage, the voltage applied to the third electrode is calculated by adding the gamma voltage from the voltage.
A first electrode of the Nth (N is an arbitrary natural number) sub-pixel region, a second electrode of the (N + 1) th sub-pixel region, and a second electrode of the A third electrode of the (N + 1) th sub-pixel region, and a fourth electrode of the (N + 2) th sub-pixel region,
And transferring the respective data signals to the first electrode and the third electrode through the data line while the thin film transistor is turned on,
Wherein the same voltage is applied to the first electrode and the second electrode, and the same voltage is applied to the third electrode and the fourth electrode.
10. The method of claim 9,
And generating the data signal to be transmitted to the third electrode using a voltage and a gamma voltage applied to the first electrode.
11. The method of claim 10,
Wherein the step of generating the data signal transmitted to the third electrode using the voltage applied to the first electrode and the gamma voltage comprises:
When the voltage applied to the first electrode is a voltage of positive polarity, the voltage is subtracted from the voltage by the gamma voltage,
Wherein when the voltage applied to the first electrode is a negative voltage, a voltage applied to the third electrode is calculated by adding the gamma voltage to the voltage.

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