KR101932897B1 - Method for forming ultra-shallow doping regions by solid phase diffusion - Google Patents

Abstract

A method for forming an extremely shallow dopant region in a substrate is provided. In one embodiment, the method comprises depositing a dopant layer in direct contact with a substrate, the dopant layer containing an oxide, a nitride or an oxynitride, wherein the dopant layer is selected from the group consisting of boron (B), aluminum ), Gallium (Ga), indium (In), thallium (Tl), nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb) and bismuth (Bi). The method further includes patterning the dopant layer and forming an extremely shallow dopant region in the substrate by diffusing the dopant from the patterned dopant layer to the substrate by heat treatment.

Description

METHOD FOR FORMING ULTRA-SHALLOW DOPING REGIONS BY SOLID PHASE DIFFUSION < RTI ID = 0.0 >

Cross reference of related application

This application claims the benefit of US Provisional Application No. 13 / 077,721 (Docket No. TTCA-373), entitled " METHOD FOR FORMING ULTRA-SHALLOW BORON DOPING ", which is entitled METHOD FOR FORMING ULTRA-SHALLOW DOPING REGIONS BY SOLID PHASE DIFFUSION. REGIONS BY SOLID PHASE DIFFUSION ", which claims priority to U.S. Patent Application No. 13 / 077,688 (Docket No. TTCA-345). The entire contents of these applications are incorporated herein by reference in their entirety.

The present invention relates generally to semiconductor devices and methods for forming the same, and more particularly to forming extremely shallow dopant regions by solid phase diffusion from a dopant layer to a substrate layer.

The semiconductor industry is characterized by trends for manufacturing larger and more complex circuits on a given semiconductor chip. Larger and more complex circuits are achieved by reducing the size of individual devices in the circuit and placing them closer together. As the dimensions of discrete components in a device, such as metal oxide semiconductor (MOS) or bipolar transistors, are reduced, the device components become closer together and the electrical performance can be improved. However, it should be noted that in order to ensure that a bad electric field condition does not occur, a doped region is formed in the substrate.

As the size of device components, such as transistor gates in MOS devices and emitter regions in bipolar devices, is reduced, the junction depth of the doped regions formed in the semiconductor substrate must also be reduced. It has proved very difficult to form a shallow junction with a uniform doping profile and high surface concentration. A commonly used technique is implanting dopant atoms into a substrate using an ion implantation apparatus. Using ion implantation, high energy dopant atoms collide with the surface of the substrate at high speed and are directed to the substrate. Although this method has proven effective in forming a doped region with a suitably deep junction, it has been very difficult to form an extremely shallow junction using ion implantation. Both the path and the injection uniformity of the activated dopant atoms in the substrate were difficult to control at the low energy required to form the implanted shallow junctions. The injection of activated dopant atoms damages the crystal lattice of the substrate, which is difficult to recover. Displacements due to lattice damage are easily spiked throughout the shallow junction, causing current leakage across the junction. Further, when a p-type dopant such as boron which is rapidly diffused in silicon is implanted, diffusion of the dopant atoms becomes excessive after the dopant is introduced into the substrate. Thereafter, it becomes difficult to form a very limited concentration of p-type dopant atoms at a specified region of the substrate, particularly at the surface of the substrate.

In addition, new device structures for transistors and memory devices, utilizing doped three-dimensional structures, are being implemented. An example of such a device includes, but is not limited to, a FinFET, a tri-gate FET, a recessed channel transistor (RCAT), and a buried dynamic random access memory (EDRAM) trench. In order to uniformly dope these structures, it is desirable to have a conformal doping method. Since the ion implantation process is effective on the lines of the site, a special substrate orientation is required to uniformly dope the fin and trench structures. Also, at high device densities, the shadow effect makes the uniform doping of the fin structure very difficult, or even impossible, by doping by ion implantation techniques. Conventional plasma doping and atomic layer doping are techniques that demonstrate conformal doping of a three-dimensional semiconductor structure, but each of these is limited to a range of depth and dopant density that can be accessed under ideal conditions. Embodiments of the present invention provide a method for forming an extremely shallow doped region that overcomes some of these problems.

A plurality of embodiments for forming an extremely shallow boron dopant region by solid phase diffusion from a boron dopant layer to a substrate layer will be described. The dopant region may be formed on a planar substrate, a raised feature on the substrate, or a concave feature of the substrate.

According to one embodiment, a method is provided for forming an extremely shallow boron (B) dopant region in a substrate. The method includes depositing a boron dopant layer in direct contact with the substrate by atomic layer deposition (ALD), wherein the boron dopant layer is formed by gaseous exposure of the boronamide precursor or organoboron precursor, Nitride, or oxynitride formed by alternating vapor phase exposures of the oxide, nitride, or oxynitride. The method further includes patterning the boron dopant layer and forming an extremely shallow boron dopant region in the substrate by diffusing boron from the patterned boron dopant layer to the substrate by heat treatment.

According to some embodiments, the method provides a step of forming a shallow boron (B) dopant region in a convex feature in a substrate or in a concave feature.

According to another embodiment, the method provides a method of forming an extremely shallow boron (B) dopant region in a substrate. The method includes the steps of depositing a boron dopant layer in direct contact with a substrate by atomic layer deposition (ALD), the boron dopant layer having a thickness of 4 nm or less, wherein the boron amide precursor or organoboron precursor is exposed to a gas phase Depositing a boron dopant layer that is formed of an oxide, nitride, or oxynitride formed by alternating vapor phase exposure of the reactive gas; and depositing a cap layer on the patterned boron dopant layer. The method includes the steps of: patterning the boron dopant layer and the cap layer; forming an extremely shallow boron dopant region in the substrate by diffusing boron from the patterned boron dopant layer to the substrate by heat treatment; , Removing the patterned boron dopant layer and the patterned cap layer from the substrate.

According to one embodiment, a method is provided for forming an extremely shallow dopant region in a substrate. The method includes the steps of depositing a dopant layer in direct contact with the substrate and containing an oxide, a nitride or an oxynitride, wherein the dopant layer is selected from the group consisting of aluminum (Al), gallium (Ga), indium (In) Depositing a dopant layer containing a dopant selected from nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi); and patterning the dopant layer And forming an extremely shallow dopant region in the substrate by diffusing the dopant from the patterned dopant layer to the substrate by heat treatment. According to some embodiments, a method is provided for forming an extremely shallow dopant region in a convex feature or a concave feature in a substrate.

According to another embodiment, a method for forming an extremely shallow dopant region in a substrate is provided. The method includes depositing, by atomic layer deposition (ALD), a first dopant layer containing a first dopant in direct contact with the substrate, and patterning the first dopant layer. The method further comprises depositing, by ALD, a second dopant layer containing a second dopant in direct contact with the substrate adjacent to the patterned first dopant layer, wherein the first and second dopant layers Wherein the first and second dopant layers comprise an n-type dopant or a p-type dopant, provided that the first or second dopant layer does not contain the same dopant Wherein the n-type dopant and the p-type dopant are selected from the group consisting of boron (B), aluminum (Al), gallium (Ga), indium (In), thallium (Tl), nitrogen (N) As, antimony (Sb), and bismuth (Bi). The method includes diffusing a first dopant from the first dopant layer to the substrate by heat treatment to form a very shallow first dopant region in the substrate, forming a second shallow dopant region in the substrate And diffusing the second dopant from the second dopant layer to the substrate by heat treatment.

According to yet another embodiment, a method is provided for forming an extremely shallow dopant region in a substrate. The method includes forming a patterned layer on a substrate, a patterned cap layer on the patterned layer, and a sidewall spacer adjacent the substrate, the patterned cap layer, and the patterned layer Depositing a first dopant layer containing a first dopant in direct contact with the substrate adjacent to the sidewall spacer by atomic layer deposition (ALD); depositing a first cap layer on the first dopant layer And planarizing the first cap layer and the first dopant layer. The method comprising: removing the patterned cap layer and the patterned layer; depositing a second dopant layer containing a second dopant in direct contact with the substrate adjacent the sidewall spacer; And depositing a second cap layer on the dopant layer, wherein the first and second dopant layers contain an oxide, a nitride, or an oxynitride, and wherein the first and second dopant layers are deposited on the first or second (B), aluminum (Al), gallium (Ga), or the like, provided that the n-type dopant or the p-type dopant does not contain the same dopant, , Indium (In), thallium (Tl), nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi). The method includes the steps of diffusing a first dopant from the first dopant layer to the substrate by heat treatment to form a very shallow first dopant region in the substrate and forming a second shallow second dopant region in the substrate And diffusing the second dopant from the second dopant layer to the substrate by heat treatment.

BRIEF DESCRIPTION OF THE DRAWINGS Figures 1A-1E show schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to an embodiment of the present invention.
Figures 2A-2E show a schematic cross-sectional view of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention.
Figures 3A-3D illustrate schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention.
Figures 4A-4F show schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention.
Figures 5A-5E illustrate a schematic cross-sectional view of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment.
Figure 6A shows a schematic cross-sectional view of a convex feature to which an embodiment of the present invention may be applied.
Figure 6b shows a schematic cross-sectional view of a confromal dopant layer deposited on the convex features of Figure 6a.
Figure 7A shows a schematic cross-sectional view of a concave feature to which an embodiment of the present invention may be applied.
Figure 7b shows a schematic cross-sectional view of a conformal dopant layer deposited on the concave feature of Figure 7b.

A method of forming an extremely shallow dopant region in a semiconductor device by solid phase diffusion from a dopant layer to a substrate layer is disclosed in various embodiments. The dopant region may comprise, for example, an extremely shallow source-drain extension for a planar transistor, a FinFET or a tri-gate FET. Other applications for very shallow dopant region formation may be channel doping in alternate gate process flow, or may include extremely thin SOI (ET-SOI) devices for FinFETs. Devices with extremely thin alternative semiconductor channels may also be doped using the disclosed methods, such as germanium on insulator devices (GeOI) or Ge-FinFETs and III-V channel devices such as GaAs, InGaAs, or InGaSb FinFETs. In addition, a device formed in an amorphous Si layer or a polycrystalline Si layer such as an EDRAM device may use the disclosed method to adjust the Si doping level.

Those skilled in the art will recognize that the various embodiments may be practiced without one or more of the specific details, or with other alternatives and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail in order to avoid obscuring aspects of various embodiments of the present invention. Similarly, for purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the present invention. It should also be understood that the various embodiments shown in the drawings are exemplary and not necessarily drawn to scale.

Throughout this specification, the term "one embodiment" or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention And does not indicate that they are present in all embodiments. Accordingly, the appearances of the phrase " in one embodiment " in various places throughout this specification are not necessarily all referring to the same embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS Figures 1A-1E show schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to an embodiment of the present invention. 1A shows a schematic cross-sectional view of a substrate 100. Fig. The substrate 100 may be any size, for example a 200 mm substrate, a 300 mm substrate, or even a larger substrate. According to one embodiment, the substrate 100 may contain Si such as crystalline Si, polycrystalline Si, or amorphous Si. In one example, the substrate 100 may be a strained Si layer. According to another embodiment, according to another embodiment, the substrate 100 may contain a Ge or Si _x Ge _{1 -x} compound, where x is the atomic fraction of Si, 1-x is the atomic fraction of Ge , 0 < (1-x) < 1. Exemplary Si _x Ge _1-x compounds include Si _{0 . 1} Ge _{0 .9} , Si _{0 . 2} Ge _{0 .8,} Si _{0. 3} Ge _{0 .7} , Si _{0 . 4} Ge _{0 .6} , Si _{0 . 5} Ge _{0 .5,} Si _{0. 6 Ge 0 .4, Si 0.7 Ge} 0.3, Si 0. ₈ Ge _{0 .2} , and Si _{0 . 9} Ge _{0 .1} . In one example, the substrate 100 has a relaxed Si _{0 . 5} Ge _{0 .5} the deposited Ge layer on the buffer layer compressive strain or tensile strain of _{Si x Ge 1-x (x} > 0.5) can be. According to some embodiments, the substrate 100 may comprise SOI.

1B may be deposited by atomic layer deposition (ALD) in direct contact with the substrate 100, after which the cap layer 104 may be deposited on the dopant layer 102. In some examples, the cap layer 104 may be omitted from the film structure in Figures 1B-1D. Dopant layer 102 may include a combination of an oxide layer (e.g., SiO _2), a nitride layer (e.g., SiN), or an oxynitride layer (e.g., SiON), or two or more of them. The dopant layer 102 may be formed of Group IIIA: boron (B), aluminum (Al), gallium (Ga), indium (In) and thallium (Tl) in the Periodic Table of Elements; And one or more dopants from group VA: nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb) and bismuth (Bi). According to some embodiments, the dopant layer 102 may comprise, for example, a low dopant level between about 0.5 atomic% dopant and about 5 atomic% dopant. According to another embodiment, the dopant layer 102 may comprise an intermediate dopant level, for example between about 5 atomic% dopant and about 20 atomic% dopant. According to another embodiment, the dopant layer may comprise a high dopant level, for example greater than 20 atomic% dopant. In some examples, the thickness of the dopant layer 102 may be 4 nm or less, such as 1 nm to 4 nm, 2 nm to 4 nm, or 3 nm to 4 nm. However, other thicknesses may be used.

According to another embodiment, the dopant layer 102 may comprise or consist of a doped high-k dielectric material in the form of an oxide layer, a nitride layer or an oxynitride layer. The dopant in the high-k dielectric material may be selected from the list of dopants described above. The high-k dielectric material may comprise at least one metal element selected from alkaline earth elements, rare earth elements, IIIA, IVA, and IVB elements of the Periodic Table of the Elements. The alkaline earth metal element includes beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr) and barium (Ba). Exemplary oxides include magnesium oxide, calcium oxide, barium oxide, and combinations thereof. The rare earth metal element is at least one element selected from the group consisting of scandium (Sc), yttrium (Y), lutetium (Lu), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm) May be selected from the group of gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb). According to some embodiments of the present invention, high -k dielectric material _{Hf0 2, HfON, HfSiON, Zr0} 2, ZrON, ZrSiON, Ti0 2, TiON, A1 2 0 3, La 2 0 3, W 2 0 3, Ce0 ₂ , Y ₂ O ₃ , or Ta ₂ O ₅ , or a combination of two or more thereof. However, other dielectric materials are contemplated and may be utilized. Precursor gases that can be used for ALD of high-k dielectric materials are disclosed in U.S. Patent No. 7,772,073, the entire contents of which are incorporated herein by reference.

The cap layer 104 may be an oxide layer, a nitride layer, or an oxynitride layer, and may include one or more of Si and / or a high-k dielectric material as described above. The cap layer 104 may be deposited, for example, by chemical vapor deposition (CVD) or ALD. In some examples, the thickness of the cap layer 104 may be between 1 nm and 100 nm, between 2 nm and 50 nm, or between 2 nm and 20 nm.

According to an embodiment of the present invention, the film structure shown in Fig. 1B may be patterned to form the patterned film structure schematically shown in Fig. 1C. For example, conventional photolithographic patterning and etching methods may be used to form the patterned doped layer 106 and the patterned cap layer 108.

The patterned film structure of Figure 1C may then be doped with a dopant 110 (e.g., B, Al, Ga, In, Tl, N, P, As, Sb , Or Bi) to form an extremely shallow dopant region 112 below the patterned dopant layer 106 in the substrate 100 (see FIG. 1D). Heat treatment is an inert atmosphere (e.g., argon (Ar) or nitrogen (N ₂₎₎ substrate 100, in an atmosphere (oxygen (O ₂₎ for example, or water (H ₂ O)) or oxidation in 10 seconds to 10 Min to a temperature of about 100 &lt; 0 &gt; C to 1000 &lt; 0 &gt; C. Some heat treatment examples include a substrate temperature of 100 ° C to 500 ° C, 200 ° C to 500 ° C, 300 ° C to 500 ° C, and 400 ° C to 500 ° C. Other examples include a substrate temperature of 500 캜 to 1000 캜, 600 캜 to 1000 캜, 700 캜 to 1000 캜, 800 캜 to 1000 캜, and 900 to 1000 캜. In some instances, thermal processing may include rapid thermal annealing (RTA), spike annealing, or laser spike annealing.

In some instances, the thickness of the extremely shallow dopant region 102 may be between 1 nm and 10 nm, or between 2 nm and 5 nm. However, one of ordinary skill in the art will readily recognize that the lower boundary of the extremely shallow dopant region 112 in the substrate 100 may not be abrupt, but rather may be characterized by a gradual decrease in dopant concentration.

Following the heat treatment and formation of the extremely shallow dopant region 112, the patterned dopant layer 106 and the patterned cap layer 108 may be removed using a dry etch process or a wet etch process. The structure after removal is shown in Fig. Additionally, a dry or wet cleaning process may be performed to remove any etch residue from the substrate 100 following thermal treatment.

In accordance with another embodiment of the present invention, following deposition of a dopant layer 102 on a substrate 100, a dopant layer 102 may be patterned to form a patterned donor layer 106, , The cap layer may be conformally deposited over the patterned dopant layer 106. Thereafter, the film structure is further processed as described in FIG. 1d and FIG. 1e to form an extremely shallow dopant region 112 in the substrate 100.

6A shows a schematic cross-sectional view of a convex feature 601 to which an embodiment of the present invention may be applied. An exemplary convex feature 601 is formed in the substrate 600. The material of the substrate 600 and the convex features 601 may comprise one or more of the materials described above relative to the substrate 100 in FIG. 1A. In one example, the substrate 600 and the convex features 601 may contain or consist of the same material (e.g., Si). One of ordinary skill in the art will readily recognize that embodiments of the present invention may be applied to other simple or complex convex features of the substrate.

FIG. 6B shows a schematic cross-sectional view of a conformal dopant layer 602 deposited on the convex features 601 of FIG. 6A. The material of the conformal dopant layer 602 may comprise one or more of the materials described above for the donor layer 102 in FIG. 1B. The film structure of FIG. 6B may include, for example, depositing a cap layer (not shown) in the dopant layer 602, patterning the dopant layer 602 (not shown) and the cap layer (not shown) (Not shown) to diffuse the dopant from the deposited dopant layer (not shown) to the substrate 600 and / or the convex feature 601, and depositing a patterned dopant layer (not shown) , And removing the patterned cap layer (not shown), as shown in Figures 1C-1E.

FIG. 7A shows a schematic cross-sectional view of a concave feature 701 to which an embodiment of the present invention may be applied. An exemplary recessed feature 701 is formed in the substrate 700. The material of the substrate 700 may comprise one or more of the materials described above relative to the substrate 100 in FIG. 1A. In one example, the substrate 700 may contain Si or be composed of Si. One of ordinary skill in the art will readily recognize that it may be applied to other simple or complex recessed features of the substrate.

FIG. 7B shows a schematic cross-sectional view of the conformal dopant layer 702 deposited on the concave feature 701 of FIG. 7A. The material of the conformal dopant layer 702 may comprise one or more of the materials described above for the dopant layer 102 in FIG. 1B. The film structure in FIG. 7B may include, for example, depositing a cap layer (not shown) on the dopant layer 702, patterning the dopant layer 702 (not shown) and the cap layer (not shown) Heat treating the patterned dopant layer (not shown) to diffuse the dopant from the patterned dopant layer (not shown) in the feature 701 to the substrate 700, and forming a patterned dopant layer (not shown) And removing the patterned cap layer (not shown), similar to the process described in Figures 1C-1E.

Figures 2A-2E show a schematic cross-sectional view of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention. At least one of the materials (e.g., substrate, dopant layer, dopant and cap layer composition), processing conditions (e.g., deposition method and heat treatment conditions), and layer thickness described above with reference to Figures 1 A- May be readily utilized in the embodiment schematically illustrated in Figure 2E.

Figure 2a shows a schematic cross-sectional view of a substrate 200. Figure 2B shows a patterned mask layer 202 formed on the substrate 200 to define a dopant window (well) 203 in the patterned mask layer 202 on the substrate 200 The patterned mask layer 202 may be, for example, a nitride hard mask (e.g., a SiN hard mask) that may be formed using conventional photolithographic patterning and etching methods.

2C shows a dopant layer 204 deposited by ALD in a patterned mast layer 202 in direct contact with the substrate 200 in the dopant window 203 and a cap layer 206 deposited on the dopant layer 204 ). The dopant layer 204 may contain an n-type dopant or a p-type dopant. In some examples, the cap layer 206 may be omitted from the film structure of Figures 2C-2D.

The film structure of Figure 2C then diffuses the dopant 208 from the dopant layer 204 to the substrate 200 to form an extremely shallow dopant in the substrate 200 below the dopant layer 204 in the dopant window 203. [ May be heat treated to form regions 210. In some examples, the thickness of the extremely shallow dopant region 210 may be between 1 nm and 10 nm, or between 2 nm and 5 nm. However, one of ordinary skill in the art will readily recognize that the lower boundary of the extremely shallow dopant region 210 is not abrupt, but rather that the dopant concentration may be characterized by a gradual decrease.

Following the heat treatment and formation of the extremely shallow dopant region 210, the patterned mask layer 202, the dopant layer 204, and the cap layer 206 may be removed using a dry etch process or a wet etch process 2e). Additionally, a dry or wet cleaning process may be performed to remove any etch residue from the substrate 200 following thermal treatment.

FIGS. 3A-3D illustrate a schematic cross-sectional view of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention. The process flow shown in FIGS. 3A-3D may include, for example, channel doping in planar SOI, FinFET or ET SOI. Also, the process flow may be used to form self-aligned extremely shallow source / drain extensions. At least one of the materials (e.g., substrate, dopant layer, dopant and cap layer composition), processing conditions (e.g., deposition method and heat treatment conditions), and layer thickness described above with reference to Figures 1 A- May be readily utilized in the embodiment schematically illustrated in FIG. 3D.

Figure 3a shows a schematic cross-sectional view of a film structure similar to the film structure of Figure 1c and includes a patterned first dopant layer 302 in direct contact with the substrate 300 and a patterned first dopant layer 302, (Not shown). The patterned first dopant layer 302 may comprise an n-type dopant or a p-type dopant.

Figure 3B illustrates a second dopant layer 306 that can be deposited directly on the substrate 300 adjacent the conformal and patterned first dopant layer 302 over the patterned cap layer 304, And a second cap layer 308 deposited over the second dopant layer 306. In some examples, the second cap layer 308 may be omitted from the film structure of Figures 3B-3C. The second dopant layer 306 is formed such that the second dopant layer 306 does not contain the same dopant as the patterned first dopant layer 302 and the first dopant layer 302 and the second dopant layer 302, Type dopant or p-type dopant, provided that only one of the first dopant layer 306 and the second dopant layer 306 contains a p-type dopant, and only one of the patterned first dopant layer 302 and the second dopant layer 306 contains an n-type dopant. Type dopant.

The film structure of Figure 3b is then formed by diffusing a first dopant 310 from the patterned first dopant layer 302 to the substrate 300 to form a patterned first dopant layer 302 Lt; RTI ID = 0.0 &gt; 312 &lt; / RTI &gt; The heat treatment also diffuses the second dopant 314 from the second dopant layer 306 to the substrate 300 to form an extremely shallow second dopant region 316 below the second dopant layer 306 in the substrate 300 (See Fig. 3C).

Following the thermal treatment, the first patterned dopant layer 302, the patterned cap layer 304, the second dopant layer 306, and the second cap layer 308 may be patterned using a dry etch process or a wet etch process (See Fig. 3d). Additionally, the cleaning process may be performed to remove any etching residues from the substrate 300 following thermal processing.

Figures 4A-4F show schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention. The process flow shown in Figs. 4A-4E may be used in a process for forming a final gate dummy transistor, for example, with self-aligned source / drain extensions. One or more of the materials (e.g., substrate, dopant layer, dopant and cap layer composition), process conditions (e.g., deposition method and heat treatment conditions), and layer thickness described above with reference to Figures 1 A- May be readily utilized in the embodiment schematically illustrated in Figure 4f.

4A shows a patterned first dopant layer 402 on a substrate 400, a patterned cap layer 404 on a patterned first dopant layer 402 and a patterned cap layer 404 on a patterned cap layer 404 Sectional view of a film structure comprising a patterned dummy gate electrode layer 406 (e.g., poly-Si). The patterned first dopant layer 402 may contain an n-type dopant or a p-type dopant. In some instances, the patterned cap layer 404 may be omitted from the film structure of Figures 4A-4E.

4B schematically illustrates a patterned dummy gate electrode layer 406, a patterned cap layer 404 and a first sidewall spacer layer 408 adjacent to the patterned first dopant layer 402. [ A first sidewall spacer layer 408 may be an oxide (e.g., SiO ₂₎ or nitride and may contain the (e. G., SiN), and depositing a conformal layer on the film structure of Figure 4a etching the conformal layer to anisotropic .

FIG. 4C shows a second dopant layer 410 that can be conformally deposited over the film structure shown in FIG. 4B, in direct contact with the substrate 400 adjacent the first sidewall spacer layer 408. In addition, the second cap layer 420 is conformally deposited over the second dopant layer 410. The second dopant layer 410 is formed such that the second dopant layer 410 does not contain the same dopant as the patterned first dopant layer 402 and the first dopant layer 402 and the second dopant layer 402, Type dopant or p-type dopant, provided that only one of the first dopant layer 306 and the second dopant layer 306 contains a p-type dopant and only one of the patterned first dopant layer 402 and the second dopant layer 410 contains an n-type dopant. Type dopant. In some instances, the second cap layer 420 may be omitted from the film structure of Figures 4C-4D.

The film structure of Figure 4C then diffuses the first dopant 412 from the patterned first dopant layer 402 to the substrate 400 to form a patterned first dopant layer 402 Lt; RTI ID = 0.0 &gt; 414 &lt; / RTI &gt; The thermal treatment also diffuses the second dopant 416 from the second dopant layer 410 to the substrate 400 to form a second dopant layer 410 in direct contact with the substrate 400 in the substrate 400 Lt; RTI ID = 0.0 &gt; 418 &lt; / RTI &gt;

Following the thermal treatment, the second dopant layer 410 and the second cap layer 420 may be removed using a dry etch process or a wet etch process to form the film structure schematically shown in Figure 4e. Additionally, the cleaning process may be performed to remove any etching residues from the substrate 400 following thermal processing.

Next, a second sidewall spacer layer 422 may be formed adjacent the first sidewall spacer layer 408. This is schematically shown in Figure 4f. First depositing a conformal layer over the second sidewall spacer layer 422 may be an oxide (e.g., SiO ₂₎ or nitride and may contain the (e. G., SiN), a film structure is formed by etching the conformal layer to anisotropic It is possible.

Thereafter, the film structure shown in Fig. 4F may be further processed. Additional processing may include forming additional source / drain extensions or performing alternate gate process flows including ion implantation, liner deposition, and the like.

Figures 5A-5E illustrate schematic cross-sectional views of a process flow for forming an extremely shallow dopant region in a substrate according to another embodiment of the present invention. The process flow shown in Figs. 5A to 5E may be used in a process for forming a spacer-defined P-i-N junction, for example, for a band-to-band tunneling transistor. One or more of the materials (e.g., substrate, dopant layer, dopant and cap layer composition), process conditions (e.g., deposition method and heat treatment conditions), and layer thickness described above with reference to Figures 1 A- May be readily utilized in the embodiment schematically illustrated in Figure 5E.

5A illustrates a patterned layer 502 (e.g., an oxide, nitride, or oxynitride layer) on a substrate 500 and a patterned cap layer 504 (e.g., poly-Si Lt; RTI ID = 0.0 &gt; of: &lt; / RTI &gt; Figure 5A additionally shows a substrate 500, a patterned cap layer 504, and a sidewall spacer layer 506 adjacent to the patterned layer 502. [ The side wall spacer layer 506 may be an oxide (e.g., SiO ₂₎ or nitride (e.g., SiN), it may be formed by depositing a conformal layer and etching the conformal layer to anisotropic.

Figure 5b illustrates a first dopant layer 508 deposited by ALD in direct contact with the substrate 500 adjacent to the sidewall spacer layer 506 and containing a first dopant and a second dopant layer 508 deposited on the first dopant layer 508 And a first cap layer 510 (e.g., an oxide layer) deposited. The resulting film structure may be planarized (e.g., by chemical mechanical polishing (CMP)) to form the film structure shown in Figure 5B.

The patterned layer 502 and the patterned cap layer 504 may then be removed using a dry etch process or a wet etch process. A second dopant layer 512 containing a second dopant may then be deposited directly on the substrate 500 and a second cap layer 514 (e.g., an oxide layer May be deposited. The resulting film structure may be planarized (e.g., by CMP) to form the planarized film structure shown in Figure 5C. The first dopant layer 508 and the second dopant layer 512 are formed such that the first dopant layer 508 and the second dopant layer 512 do not contain the same dopant and the first dopant layer 508 and the second Provided that only one of the dopant layers 512 contains a p-type dopant and only one of the first and second dopant layers 508 and 512 contains an n-type dopant, an n-type dopant or a p- May contain a dopant.

The film structure of Figure 5C then diffuses the first dopant 516 from the first dopant layer 508 to the substrate 500 to form a first shallow first layer 518 below the first dopant layer 508 in the substrate 500. [ May be thermally processed to form a dopant region 518. The thermal processing also diffuses the second dopant 520 from the second dopant layer 512 to the substrate 500 to form an extremely shallow second dopant region in the substrate 500 below the second dopant layer 512 522) (see Fig. 5D). FIG. 5E shows the first and second very shallow dopant regions 518 and 522 defined by the spacers in the substrate 500.

Next, an exemplary method for depositing a dopant layer on a substrate will be described in accordance with various embodiments of the present invention.

According to one embodiment, the boron dopant layer may comprise boron oxide, boron nitride or boron oxynitride. According to other embodiments, the boron dopant layer may comprise or consist of a boron-doped high-k material in the form of an oxide layer, a nitride layer, or an oxynitride layer. In one example, the boron oxide dopant layer comprises a) providing a substrate in a process chamber configured to perform an ALD process, b) exposing the substrate to a gaseous boron amide or organoboron precursor, c) D) exposing the substrate to a reaction gas containing H ₂ O, O ₂ or O ₃ , or a combination thereof, e) purifying / discharging the process chamber, and f) oxidizing May be deposited by ALD through repeating steps b) -e) any number of times until the boron dopant layer has the desired thickness. According to other embodiments, the boron nitride dopant layer may be deposited using a reaction gas containing NH ₃ in step d), or the boron oxynitride dopant layer may be deposited in step d) using 1) H ₂ O, O ₂ , or O _3, and NH _3, or 2) NO, N0 _2, or N ₂ 0, and optionally _{H 2 0, 0 2, 0} 3, and NH ₃ deposited using a reaction gas containing at least one of .

According to an embodiment of the present invention, the boron amide is L _n B (NR ¹ R ² ) ₃ , Wherein L is a neutral Lewis base, n is 0 or 1, and each of R ¹ and R ² is independently selected from the group consisting of alkyl, aryl, fluoroalkyl, fluoroaryl, alkoxyalkyl and Aminoalkyl. &Lt; / RTI &gt; Examples of boron amides include B (NMe ₂ ), (Me ₃ ) B (NMe ₂ ) ₃ , and B [(CF ₃ ) ₂ ] ₃ . According to an embodiment of the present invention, the organoboron can comprise a boron compound in the form of L _n BR ¹ R ² R ³ , wherein L is a neutral Lewis base, n is 0 or 1, R ¹ , R ² and R &lt; ³ &gt; may be selected from alkyl, aryl, fluoroalkyl, fluoroaryl, alkoxyalkyl and aminoalkyl. Examples of boron amides include BMe ₃ , (Me ₃ N) BMe ₃ , B (CF ₃ ) ₃ , and (Me ₃ N) B (C ₆ F ₃ ).

According to one embodiment, the arsenic dopant layer may comprise an non-oxide, non-nitrite or arsenic oxide nitride. According to one embodiment, the arsenic dopant layer may comprise or consist of an arsenic-doped high-k material in the form of an oxide layer, a nitride layer or an oxynitride layer. In one example, the non-oxide dopant layer comprises a) providing a substrate in a process chamber configured to perform an ALD process, b) exposing the substrate to a gaseous precursor containing arsenic, c) D) exposing the substrate to a reaction gas containing H ₂ O, O ₂ or O ₃ , or a combination thereof, e) purifying / discharging the process chamber, and f) May be deposited by ALD through repeating steps b) -e) any number of times until the dopant layer has the desired thickness. According to other embodiments, the non-nitrogen nitride dopant layer may be deposited using NH ₃ in step d), or the non-nitrogen nitride dopant layer may be deposited using 1) H ₂ 0, 0 ₂ , or O ₃ , And NH ₃ , or 2) at least one of NO, NO ₂ , or N ₂ O, and optionally H ₂ O, O ₂ , O ₃ , and NH ₃ . According to some embodiments of the present invention, the gaseous precursor containing arsenic may comprise arsenic halide such as AsCl ₃ , AsBr ₃ , or AsI ₃ .

According to one embodiment, the phosphorous dopant layer may comprise a phosphorus oxide, phosphorus nitride or phosphorus oxynitride. According to another embodiment, the indopter layer may contain or be composed of a doped high-k material in the form of an oxide layer, a nitride layer or an oxynitride layer. In one example, the phosphorous oxide dopant layer comprises a) providing a substrate in a process chamber configured to perform an ALD process, b) exposing the substrate to a gaseous precursor containing phosphorus, c) / D) exposing the substrate to a reaction gas containing H ₂ O, O ₂ or O ₃ , or a combination thereof, e) purifying / discharging the process chamber, and f) May be deposited by ALD through repeating steps b) -e) any number of times until the dopant layer has the desired thickness. According to other embodiments, a phosphorus nitride dopant layer may be deposited using a reaction gas containing NH ₃ in step d), or the phosphorus nitride dopant layer may be deposited using 1) H ₂ 0, 0 ₂ , or O _3, and NH _3, or 2) NO, N0 _2, or N ₂ 0, and optionally _{H 2 0, 0 2, 0} 3, and NH ₃ deposited using a reaction gas containing at least one of . According to some embodiments of the present invention, vapor phase precursor containing phosphorus is _{[(CH 3) 2 N]} 3 PO, P (CH 3) 3, PH 3, OP (C 6 H 5) 3, OPCl 3, PC1 ₃ , PBr ₃ , [(CH ₃ ) ₂ N] ₃ P, and P (C ₄ H ₉ ) ₃ .

A plurality of embodiments for forming an extremely shallow dopant region by solid phase diffusion from the dopant layer to the substrate layer have been described. The foregoing description of the embodiments of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. This description and the following claims are intended to cover such terms, which are used for descriptive purposes only and should not be construed as limiting. For example, the term " on " as used herein (including in the claims) means that the film on " on " substrate does not need to be directly above and directly in contact with the substrate, There may be membranes or other structures.

Those skilled in the art will understand that many modifications and variations are possible in light of the above teachings. Those skilled in the art will recognize various equivalents and alternatives to the various components shown in the drawings. Accordingly, the scope of the present invention is intended to be limited not by this detailed description, but by the claims appended hereto.

Claims (20)

A method for forming an extremely shallow boron (B) dopant region in a substrate,
Depositing a first dopant layer in direct contact with a substrate by atomic layer deposition (ALD), wherein the first dopant layer is a boron dopant layer and the boron dopant layer is a vapor phase of a boron amide precursor gaseous exposure and vapor phase exposure of the reaction gas to form a boron dopant layer, wherein the boron dopant layer comprises an oxide, a nitride or an oxynitride,
Patterning the boron dopant layer;
Forming an extremely shallow boron dopant region in the substrate by diffusing boron from the patterned boron dopant layer to the substrate by heat treatment;
Depositing a second dopant layer adjacent the patterned first dopant layer and in direct contact with the substrate, the second dopant layer containing a second dopant by atomic layer deposition, the first dopant layer and the second dopant layer And wherein said heat treatment diffuses said second dopant from said second dopant layer into said substrate to form an extremely shallow second dopant region in said substrate,
Lt; / RTI &gt;
Wherein the extremely shallow boron dopant region is in direct contact with the extremely shallow second dopant region,
Wherein one of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a channel of the transistor and the other of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a source / To form a dopant region. The method of claim 1, further comprising removing the patterned boron dopant layer from the substrate. 2. The method of claim 1, further comprising depositing a cap layer on the boron dopant layer or the patterned boron dopant layer. The method of claim 1, wherein the boron dopant layer contains the oxide and the reaction gas comprises H ₂ O, O ₂ , or O ₃ , or a combination of at least two of the foregoing. The method of claim 1 wherein the boron dopant layer is containing the nitride, the dopant region forming method in which the reaction gas comprises NH _3. The method of claim 1, wherein the boron dopant layer contains the oxynitride,
The reaction gas is _{a) H 2 0, 0 2} , and ₀₃ and at least one NH _3, or b of) NO, N0 _2, and N ₂ 0 at least one, or c of) i) NO, N0 _2, and N ₂ O and ii) at least one of H ₂ O, O ₂ , O ₃ , and NH ₃ . The method of claim 1, wherein the thickness of the boron dopant layer is 4 nm or less. 2. The method of claim 1, wherein the substrate comprises a patterned mask layer defining a dopant window on the substrate, wherein the boron dopant layer is deposited in direct contact with the substrate in the dopant window. 2. The method of claim 1, wherein the substrate comprises a dopant region formed of Si, Ge, In, Ga, As, Sb, GaAs, InGaAs, InGaSb, or Si _x Ge _{i -x} , Way. A method for forming an extremely shallow boron (B) dopant region in a substrate,
Depositing a first dopant layer in direct contact with the substrate by atomic layer deposition (ALD), wherein the first dopant layer is a boron dopant layer and the boron dopant layer comprises a boron amide precursor or an organic boron precursor Depositing the boron dopant layer, wherein the boron dopant layer is formed of a nitride or an oxynitride formed by alternating vapor phase exposure and vapor phase exposure of the reactive gas,
Patterning the boron dopant layer;
Forming an extremely shallow boron dopant region in the substrate by diffusing boron from the patterned boron dopant layer to the substrate by heat treatment;
Depositing a second dopant layer adjacent the patterned first dopant layer and in direct contact with the substrate, the second dopant layer containing a second dopant by atomic layer deposition, the first dopant layer and the second dopant layer And wherein said heat treatment diffuses said second dopant from said second dopant layer into said substrate to form an extremely shallow second dopant region in said substrate,
Lt; / RTI &gt;
Wherein the extremely shallow boron dopant region is in direct contact with the extremely shallow second dopant region,
Wherein one of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a channel of the transistor and the other of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a source / To form a dopant region. delete 11. The method of claim 10, wherein the boron dopant layer is containing the nitride, the dopant region forming method in which the reaction gas comprises NH _3. 11. The method of claim 10, wherein the boron dopant layer is containing the oxynitride, the reactant gas is _{a) H 2 0, 0 2} , and ₀₃ and at least one NH _3, or b of) NO, N0 _2, and N ₂ O, or c) at least one of i) NO, NO ₂ , and N ₂ O and ii) at least one of H ₂ O, O ₂ , O ₃ , and NH ₃ . / RTI &gt; 11. The method of claim 10, wherein the substrate comprises a patterned mask layer defining a dopant window on the substrate, wherein the boron dopant layer is deposited in direct contact with the substrate in the dopant window. A method for forming an extremely shallow boron (B) dopant region,
Providing a substrate comprising a raised feature or a concave feature;
Conformally depositing a first dopant layer in direct contact with the convex feature or with the interior of the recessed feature, wherein the first dopant layer is a boron dopant layer, the boron dopant layer comprises a boron amide Conformally depositing the boron dopant layer which is oxide, nitride or oxynitride deposited by atomic layer deposition (ALD) using alternating vapor phase exposure of the precursor and vapor phase exposure of the reactive gas,
Patterning the boron dopant layer;
Forming an extremely shallow boron dopant region in the convex feature or the concave feature by diffusing boron from the patterned boron dopant layer to the convex feature or to the substrate in the concave feature by heat treatment;
Depositing a second dopant layer adjacent the patterned first dopant layer and in direct contact with the substrate, the second dopant layer containing a second dopant by atomic layer deposition, the first dopant layer and the second dopant layer And wherein said heat treatment diffuses said second dopant from said second dopant layer into said substrate to form an extremely shallow second dopant region in said substrate,
Lt; / RTI &gt;
Wherein the extremely shallow boron dopant region is in direct contact with the extremely shallow second dopant region,
Wherein one of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a channel of the transistor and the other of the extremely shallow boron dopant region and the extremely shallow second dopant region forms a source / To form a dopant region. 16. The method of claim 15, further comprising removing the patterned boron dopant layer from the substrate. 16. The method of claim 15, wherein the boron dopant layer contains the oxide and the reaction gas comprises H ₂ O, O ₂ , or O ₃ , or a combination of two or more of the foregoing. The method of claim 15, wherein the boron dopant layer is containing the nitride, the dopant region forming method in which the reaction gas comprises NH _3. The method of claim 15, wherein the boron dopant layer is containing the oxynitride, the reactant gas is _{a) H 2 0, 0 2} , and ₀₃ and at least one NH _3, or b of) NO, N0 _2, and N ₂ O, or c) at least one of i) NO, NO ₂ , and N ₂ O and ii) at least one of H ₂ O, O ₂ , O ₃ , and NH ₃ . / RTI &gt; The method of claim 15, wherein the boron amide comprises a boron compound in the ^{_{L n B (NR 1 R 2}} ) 3 type, in which L is a neutral Lewis (Lewis) base, n is 0 or 1, R ^1, and Wherein each of R &lt; ² &gt; is selected from alkyl, aryl, fluoroalkyl, fluoroaryl, alkoxyalkyl, and aminoalkyl.

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