KR101904852B1 - Light-emitting device - Google Patents

Abstract

The light emitting device includes a substrate including first and second upper surfaces and c-plane side surfaces which are m-planes, a growth inhibiting layer formed on the first and second upper surfaces, and a light emitting structure formed along the horizontal direction from the side surface.
The first and second upper surfaces have different heights from the back surface of the substrate.
The side surface is formed perpendicular to the back surface of the substrate in the region where the first and second upper surfaces are in contact with each other.
The upper surface of the light emitting structure is an m-plane.

Description

Light-emitting device

An embodiment relates to a light emitting element.

Light-emitting diodes (LEDs) are semiconductor light-emitting devices that convert current into light.

Semiconductor light emitting devices are widely used as light sources for displays, light sources for automobiles, and light sources for illumination because they can obtain light having a high luminance. By using fluorescent materials or combining light emitting diodes of various colors, Light emitting diodes can also be implemented.

A light emitting structure composed of a plurality of compound semiconductor layers is typically formed along the c-axis of the substrate. In this case, an internal electric field is naturally generated in the active layer together with a growth failure such as a stacking fault or a threading dislocation, and the internal luminous efficiency is lowered. That is, the internal electric field bends the energy band of the active layer to spatially separate electrons and holes, thereby restricting the recombination efficiency, reducing the intensity of the oscillator, and reducing the red shift emission. It causes.

In addition, there is a problem that the physical and electrical characteristics of the light emitting structure grown along the c-axis are degraded.

The embodiment provides a light emitting device capable of stably growing a light emitting structure.

Embodiments provide a light emitting device having improved physical and electrical characteristics.

The embodiment provides a light emitting device having improved internal light emitting efficiency.

According to an embodiment, a light emitting device includes a substrate comprising first and second top surfaces that are m-planes and a c-plane side; A growth inhibiting layer formed on the first and second upper surfaces; And a light emitting structure formed along the horizontal direction from the side surface, wherein the first and second upper surfaces have different heights from the back surface of the substrate, and the side surfaces are in contact with the first and second upper surfaces, And the upper surface of the light emitting structure is an m-plane.

In the embodiment, the first conductive semiconductor layer including the m-plane having the non-polarization property on the m-plane of the substrate is stably formed, so that an internal electric field is not generated in the active layer of the light emitting structure Leading to an improvement in internal quantum efficiency.

1 to 4 are views for explaining a manufacturing process of the light emitting device according to the first embodiment.
5 is a plan view showing the substrate of FIG.
6 is a cross-sectional view illustrating a horizontal light emitting device according to an embodiment.
7 is a cross-sectional view illustrating a flip-type light emitting device according to an embodiment.
8 is a cross-sectional view illustrating a vertical light emitting device according to an embodiment.
9 is a cross-sectional view illustrating a light emitting device according to the second embodiment.
FIG. 10 is a view for explaining the crystal structure of the substrate of FIG. 1; FIG.
11 is an exploded perspective view of a display device according to an embodiment.
12 is a view showing a display device having a light emitting element according to an embodiment.
13 is a perspective view of a lighting apparatus according to an embodiment.

In describing an embodiment according to the invention, in the case of being described as being formed "above" or "below" each element, the upper (upper) or lower (lower) Directly contacted or formed such that one or more other components are disposed between the two components. Also, in the case of "upper (upper) or lower (lower)", it may include not only an upward direction but also a downward direction based on one component.

1 to 4 are views for explaining a manufacturing process of the light emitting device according to the first embodiment.

Referring to FIG. 1, a substrate 11 may be provided.

Although the substrate 11 of the first embodiment may be a sapphire substrate, it is not limited thereto. That is, at least one selected from the group consisting of SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, and Ge can be used as the substrate 11.

The sapphire substrate 11 is most stable in a hexagonal wurtzite crystal structure as shown in FIG. This crystal structure has three coherent base plane axes (a1, a2, a3) that are 120 degrees rotationally symmetrical with respect to each other and are all perpendicular to the vertical c-axis.

The c-plane may be formed along the c-axis. Further, an a-plane and an m-plane may be formed perpendicular to the c-plane.

The light emitting structure 27, which is typically grown along the c-axis of the sapphire substrate, has a polar plane in which bulk spontaneous polarization and piezoelectric polarization are formed. At this time, the upper surface of the light emitting structure 27 grown along the c-axis may have a c-plane.

The light-emitting structure 27 grown along the m-axis perpendicular to the m-plane of the sapphire substrate becomes a nonpolar plane without bulk spontaneous polarization or piezoelectric polarization. At this time, the upper surface of the light emitting structure 27 grown along the m-axis may also have an m-plane. Therefore, since the internal electric field is not generated in the active layer 23 of the light emitting structure 27, the recombination efficiency is increased by maintaining the symmetrical energy band, which is an improvement of the internal quantum efficiency .

However, it is difficult to grow the light emitting structure 27 along the m-axis of the sapphire substrate. Even if the light emitting structure 27 is grown, the lattice structure of the light emitting structure 27 is similar to that of the sapphire substrate, The top surface may have a non-polarized surface or a semi-polarized surface. Since the semi-polarized light emitting structure 27 also has bulk spontaneous polarization, the internal quantum efficiency of the light emitting device can be lowered.

Accordingly, the upper surface of the substrate 11 may be an m-plane and the side surface 17 may be a c-plane.

The upper surface of the substrate 11 may be locally or selectively etched to form patterns 15 having first and second upper surfaces 15a and 15b having different heights.

The first upper surface 15a of the substrate 11 may be partially removed by etching the substrate 11 to form a second upper surface 15b having a reduced height. The first upper surface 15a as well as the second upper surface 15b may be m-planes formed along the m-axis direction.

A side surface 17 perpendicular to the back surface of the substrate 11 may be formed in a region where the first and second top surfaces 15a and 15b are in contact with each other. The side surface 17 has a surface perpendicular to the back surface of the substrate 11, but the present invention is not limited thereto.

The side surface (17) perpendicular to the first top surface (15a) may be a c-plane formed along the c-axis direction.

The back surface of the substrate 11 may have a straight surface or a parallel surface.

The first upper surface 15a may have a height higher than the second upper surface 15b from the back surface of the substrate 11. [

Accordingly, the side surface 17 may be formed by a height difference between the first and second top surfaces 15a and 15b.

Grooves 13 may be formed by the second upper surface 15b between the first upper surfaces 15a and both side surfaces 17 contacting the second upper surfaces 15b.

As shown in FIG. 5, the groove 13 may have a bar shape elongated along one direction, but the present invention is not limited thereto.

The height of the side surface 17, the width of the first upper surface 15a, and the interval between the first upper surfaces 15a can be changed, so the present invention is not limited thereto.

The height of the side surface 17 so that the upper surface of the light emitting structure 27, specifically, the first conductivity type semiconductor layer 21 can be grown with a sufficient m-plane on the substrate 11, The width of the upper surface 15a and the distance between the first upper surfaces 15a should be designed.

Referring to FIG. 2, a growth inhibiting layer 19 (not shown) is formed on the substrate 11 such that the side surface 17 of the substrate 11 is exposed and the first and second upper surfaces 15b of the substrate 11 are not exposed. May be formed.

The growth inhibiting layer 19 may act to prevent the light emitting structure 27 from growing in the vertical direction, that is, the m-axis direction, on the substrate 11.

The growth inhibiting layer 19 may be a non-semiconductor material, for example, an insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN ₂ ), but is not limited thereto.

The growth inhibiting layer 19 is formed on the first and second upper surfaces 15a and 15b of the substrate 11 but not on the side surface 17 of the substrate 11. [

A growth inhibiting film is first formed on the entire surface of the substrate 11, that is, on the first and second upper surfaces 15a and 15b and the side surface 17 of the substrate 11, and a BOE (Buffer Oxide Etchant) ), The growth inhibiting layer 19 can be formed by locally or selectively removing the growth inhibiting film. That is, the growth inhibiting films on the first and second top faces 15a and 15b of the substrate 11 are not removed and the growth inhibiting film on the side faces 17 can be removed.

Although the embodiment uses wet etching to form the growth inhibiting layer 19, it is not limited thereto.

Referring to FIG. 3, the first conductive semiconductor layer 21 of the light emitting structure 27 may be formed on the substrate 11.

The first conductive semiconductor layer 21 may be, for example, an n-type semiconductor layer including an n-type dopant. The n-type semiconductor layer may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0? X? 1, 0? Y? 1, 0? X + y? 1), for example, InAlGaN, GaN, AlGaN, InGaN, AlN, InN and AlInN, and may be doped with an n-type dopant such as Si, Ge or Sn.

The growth inhibiting layer 19 is formed on the first and second upper surfaces 15a and 15b of the substrate 11 so that the first conductivity type semiconductor layer 21 is formed on the c- The surface can be gradually grown from the exposed side surface 17. That is, the first conductivity type semiconductor layer 21 is grown in the horizontal direction, that is, the c-axis direction, from both side surfaces 17 of the substrate 11 in contact with the second upper surface 15b of the substrate 11 .

The first conductivity type semiconductor layer 21 grown from one side surface 17 contacting the second upper surface 15b is grown in the c-axis direction from left to right, The first conductivity type semiconductor layer 21 grown from the other side surface 17 can be grown in the c-axis direction from right to left.

The first conductivity type semiconductor layer 21 grown from the side face 17 and the first conductivity type semiconductor layer 21 grown from the other side face 17 are brought into contact with each other on the second top face 15b And the first conductivity type semiconductor layer 21 in contact with the first conductivity type semiconductor layer 21 may be grown along the upper direction, that is, the m-axis direction.

Through the growth, the first conductive semiconductor layer 21 is filled in the groove 13 between the first upper surfaces 15a, and then the first conductive semiconductor layer 21 is formed in the adjacent groove 13, that is, along the c-axis direction.

Therefore, the first conductive type semiconductor layer 21 may be formed on the first upper surface 15a and the second upper surface 15b of the groove 13.

The width of the first upper surface 15a is greater than the width of the second upper surface 15b so that the first conductive semiconductor layer 21 is grown along the c-axis direction at the first upper surface 15a. It is preferable to be designed to be remarkably small.

For example, the first upper surface 15a may be designed to have a width of 1% to 30% of the second upper surface 15b, but the present invention is not limited thereto.

As described above, the growth inhibiting layer 19 is formed on the substrate 11 so that the m-plane is not exposed, only the c-plane is obliquely formed, and the first conductivity type semiconductor layer 21 is formed on the basis of the c- The upper surface of the first conductivity type semiconductor layer 21 may also be formed as an m-plane.

The embodiment can stably form the first conductivity type semiconductor layer 21 including the m-plane having the non-polarization property on the m-plane of the substrate 11 to form the first conductivity type semiconductor layer 21 on the active layer 23 of the light emitting structure 27 An internal electric field is not generated, which may lead to an improvement in internal quantum efficiency.

Referring to FIG. 4, the active layer 23 and the second conductive semiconductor layer 25 may be sequentially formed on the first conductive semiconductor layer 21.

The active layer 23 may include a first carrier injected through the first conductivity type semiconductor layer 21, for example, electrons and a second carrier injected through the second conductivity type semiconductor layer 25, And emits light having a wavelength corresponding to a band gap difference of an energy band according to a material of the active layer 23. [

The active layer 23 may include any one of a single quantum well structure, a multiple quantum well structure (MQW), a quantum dot structure, and a quantum wire structure. The active layer 23 may be repeatedly formed in the period of the well layer and the barrier layer by group III-V compound semiconductors.

For example, the period of the InGaN well layer / GaN barrier layer, the period of the InGaN well layer / AlGaN barrier layer, the period of the InGaN well layer / the InGaN barrier layer, and the like. The band gap of the barrier layer may be formed to be larger than the band gap of the well layer.

The second conductivity type semiconductor layer 25 may be, for example, a p-type semiconductor layer including a p-type dopant. The p-type semiconductor layer may be a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0? X? 1, 0? Y? 1, 0? X + y? 1), for example, InAlGaN, GaN, AlGaN, InGaN, AlN, InN and AlInN, and may be doped with a p-type dopant such as Mg, Zn, Ca, Sr or Ba.

The active layer 23 and the second conductivity type semiconductor layer 25 are formed on the m-plane of the first conductivity type semiconductor layer 21, The upper surface of each of the active layer 23 and the second conductivity type semiconductor layer 25 may be formed as an m-plane.

The light emitting structure 27 may be formed of the first conductive semiconductor layer 21, the active layer 23, and the second conductive semiconductor layer 25.

The first conductivity type semiconductor layer 21, the active layer 23 and the second conductivity type semiconductor layer 25 may be formed by a combination of a metal organic chemical vapor deposition (MOCVD), a hybrid vapor phase epitaxy (HVPE) chemical vapor deposition (PECVD), plasma-enhanced chemical vapor deposition (PECVD), or molecular beam epitaxy (MBE), but the present invention is not limited thereto.

Although not shown, a transparent electrode layer may be formed on the second conductive semiconductor layer 25. The transparent electrode layer may be formed of ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al- ZnO) , Ni / IrOx / Au, and Ni / IrOx / Au / ITO.

A reflective electrode layer (not shown) may be formed instead of the transparent electrode layer. The reflective electrode layer may include at least one selected from the group consisting of silver (Ag), aluminum (Al), platinum (Pt), and palladium (Pd) having high reflection efficiency.

Hereinafter, a lateral-type light emitting device, a flip-type light emitting device, and a vertical-type light emitting device, which are examples of the light emitting device manufactured by FIGS. 1 to 4, are proposed.

All of these light emitting devices can be manufactured using an additional process based on the light emitting device manufactured by Figs. 1 to 4.

In the following description, the same elements as those in the first embodiment will be denoted by the same reference numerals, and detailed description thereof will be omitted.

6 is a cross-sectional view illustrating a horizontal light emitting device according to an embodiment.

1 to 4 and 6, the horizontal light emitting device 10A according to the embodiment includes a substrate 11, a growth inhibiting layer 19 on the substrate 11, the growth inhibiting layer 19, A first conductive semiconductor layer 21 on the first conductive semiconductor layer 21, an active layer 23 on the first conductive semiconductor layer 21, a second conductive semiconductor layer 25 on the active layer 23, The first and second electrodes 31 and 33 may be formed on the second conductive semiconductor layer 25.

The light emitting structure 27 may be formed of the first conductive semiconductor layer 21, the active layer 23, and the second conductive semiconductor layer 25.

The substrate 11 may include a plurality of patterns 15 having first and second top surfaces 15a and 15b having different heights. The substrate 11 may further include a side surface 17 corresponding to a height difference between the first and second top surfaces 15a and 15b.

The first and second top surfaces 15a and 15b may be m-planes and the side surface 17 may be c-planes.

The growth inhibiting layer 19 may control the growth of the first conductivity type semiconductor layer 21 along the c-axis direction perpendicular to the c-plane. For this, the growth inhibiting layer 19 may be formed on the first and second upper surfaces 15a and 15b.

Accordingly, the first conductive semiconductor layer 21 is grown along the c-axis direction from the c-plane of the substrate 11 and is filled in the groove 13 between the patterns 15, Axis direction on the first upper surface 15a of the substrate 11 and also on the first upper surface 15a of the substrate 11 as well as the grooves 13. [

The upper surface of the first conductivity type semiconductor layer 21 thus grown may be an m-plane.

Therefore, by stably forming the first conductivity type semiconductor layer 21 whose upper surface is m-plane on the m-plane of the substrate 11, the internal light emission efficiency can be improved by the non-polarization property.

The first and second electrodes 31 and 33 may include one or an alloy selected from the group consisting of Al, Ti, Cr, Ni, Pt, Au, W, Cu and Mo, I never do that.

7 is a cross-sectional view illustrating a flip-type light emitting device according to an embodiment.

The flip-type light emitting device 10B according to the embodiment is substantially the same as the horizontal light emitting device 10A shown in Fig. 6 except for the reflection layer 35 formed on the second conductivity type semiconductor layer 25. Fig.

The description omitted in the following description of the flip-type light emitting device 10B of FIG. 7 can be easily understood from the description of the light emitting device manufactured by FIGS. 1 to 4 and the horizontal light emitting device 10A of FIG.

1 to 4 and 7, the flip-type light emitting device 10B according to the embodiment includes a substrate 11, a growth suppressing layer 19 below the substrate 11, A first conductivity type semiconductor layer 21, an active layer 23 below the first conductivity type semiconductor layer 21, a second conductivity type semiconductor layer 25 below the active layer 23, A reflective layer 35 under the layer 25 and first and second electrodes 31 and 33 below the first conductive semiconductor layer 21 and the reflective layer 35, respectively.

The reflective layer 35 may serve to reflect upward light generated in the active layer 23 and propagated downward.

The reflective layer 35 may include at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf and alloys thereof.

8 is a cross-sectional view illustrating a vertical light emitting device according to an embodiment.

1 to 4 and 8, a vertical light emitting device 10C according to an embodiment includes a first conductive semiconductor layer 21, an active layer 23 under the first conductive semiconductor layer 21, And a second conductivity type semiconductor layer 25 below the active layer 23.

The upper surface of the first conductive type semiconductor layer 21 may include a plurality of patterns 61 having first and second upper surfaces 61a and 61b having different heights.

In the vertical type light emitting device 10C according to the embodiment, the first upper surface 61a of the first conductivity type semiconductor layer 21 corresponds to the second upper surface 15b of the substrate 11 of FIG. 1, The second upper surface 61b of the first conductive type semiconductor layer 21 may correspond to the first upper surface 15a of the substrate 11 of FIG.

A plurality of patterns 15 are formed on the upper surface of the first conductivity type semiconductor layer 21 so that light generated in the active layer 23 is incident on the plurality of patterns 61 of the first conductivity type semiconductor layer 21 So that the light extraction efficiency can be improved.

The electrodes 37 may be formed on each of the first upper surfaces 61a, but the present invention is not limited thereto.

The electrode 37 may include, but is not limited to, one selected from the group consisting of Al, Ti, Cr, Ni, Pt, Au, W, Cu and Mo or an alloy thereof.

A current blocking layer 41 may be formed under the second conductive semiconductor layer 25 to overlap with the electrode 37 in a vertical direction.

The current blocking layer 41 may be formed to prevent current from concentrating along the direction perpendicular to the electrode 37.

The current blocking layer 41 may include an insulating material or a material that forms a Schottky contact with the second conductive type semiconductor layer 25.

The current blocking layer 41 is, for example, for example, ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, ZnO, SiO _2, SiO _x, SiO _x N _y, Si ₃ N _4, Al ₂ O _3, TiO _x , Ti, Al, and Cr.

A channel layer 43 may be formed along the peripheral region of the second conductive type semiconductor layer 25.

The channel layer 43 may be formed of an electrically insulating material or a material having a lower electrical conductivity than the light emitting structure 27. The channel layer 43 may be at least one selected from the group consisting of, for example, SiO ₂ , Si _x O _y , Si ₃ N ₄ , Si _x N _y , SiO _x N _y , Al ₂ O ₃ , TiO ₂ , have.

An electrode layer 45 may be formed under the current blocking layer 41 and the second conductive semiconductor layer 25.

The electrode layer 45 may have at least one of a reflection function and an ohmic function.

The electrode layer 45 includes at least one or two or more alloys of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, I never do that. The electrode layer 45 may be formed of, for example, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al- (IZTO), indium aluminum zinc oxide (IZO), indium gallium tin oxide (IGTO), aluminum tin oxide (ATO), or the like can be used to form a multi-layer . That is, the electrode layer 45 may be composed of multiple layers such as, for example, IZO / Ni, AZO / Ag, IZO / Ag / Ni, and AZO / Ag / Ni.

The electrode layer 45 may be formed to overlap the entire lower surface of the channel layer 43 or may overlap with a portion of the lower surface of the channel layer 43.

A conductive support member 49 may be formed under the electrode layer 45. The conductive support member 49 may support the light emitting structure 27 and supply power to the electrode layer 45.

The conductive supporting member 49 may be formed of a material such as titanium, chromium (Cr), nickel (Ni), aluminum (Al), platinum (Pt), gold (Au), tungsten (W) Molybdenum (Mo), and copper-tungsten (Cu-W).

A bonding layer 47 may be formed between the electrode layer 45 and the conductive supporting member 49 to attach the conductive supporting member 49 to the electrode layer 45. [

The bonding layer 47 may include at least one selected from the group consisting of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag and Ta.

The light emitting devices 10A, 10B, and 10C shown in FIGS. 6 to 8 are formed by the steps of FIGS. 1 to 4 to form the light emitting structure 27 having the m-plane on the m- The internal quantum efficiency due to the non-polarization property can be improved.

9 is a cross-sectional view illustrating a light emitting device according to the second embodiment.

The second embodiment is similar to the first embodiment except that a buffer layer 53 is further added.

In the second embodiment, the same reference numerals are assigned to the same components as those in the first embodiment, and a detailed description thereof will be omitted.

1 to 4 and 9, the light emitting device according to the second embodiment includes a substrate 11 including a plurality of patterns 15 having first and second top surfaces 15a and 15b, A buffer layer 53 is formed on the first and second upper surfaces 15a and 15b of the buffer layer 11 and a suppression layer is formed on the buffer layer 53 corresponding to the first and second upper surfaces 15a and 15b, A first conductive semiconductor layer 21 on the first conductive semiconductor layer 21, an active layer 23 on the first conductive semiconductor layer 21, and a second conductive semiconductor layer 25 on the active layer 23 can do.

The first and second top surfaces 15a and 15b may have different heights from the back surface of the substrate 11. For example, the first upper surface 15a may be positioned higher than the second upper surface 15b.

A side surface 17 may be formed between the first and second upper surfaces 15a and 15b perpendicular to the back surface of the substrate 11. [

The first and second top surfaces 15a and 15b may be m-planes and the side 17 may be c-planes.

A buffer layer 53 may be formed on the first and second upper surfaces 15a and 15b and the side surface 17.

The buffer layer 53 may reduce the lattice constant difference between the substrate 11 and the light emitting structure 27 to be formed later.

The buffer layer 53 may be formed of a Group III-V compound semiconductor material. The semiconductor material may include Al, In, Ga, N, for example. For example, in the case of the sapphire substrate 11, the buffer layer 53 may be formed of AlN having a relatively small difference in lattice constant from the sapphire substrate 11, but the present invention is not limited thereto.

The growth inhibiting layer 19 may be formed locally or selectively on the buffer layer 53.

The growth inhibiting layer 19 is formed on the buffer layer 53 corresponding to the first and second upper surfaces 15a and 15b of the substrate 11 but is formed on the side surface 17 of the substrate 11 The buffer layer 53 may be formed on the buffer layer 53.

The first conductive semiconductor layer 21 is grown along the c-axis direction from the side surface 17 of the substrate 11 and is filled in the groove 13 between the first upper surfaces 15a, And may be grown to a position higher than the first upper surface 15a.

The upper surface of the first conductivity type semiconductor layer 21 thus grown may be an m-plane as in the upper surface of the substrate 11.

The embodiment is characterized in that the buffer layer 53 is formed between the substrate 11 and the light emitting structure 27 so that the light emitting structure 27 is stably formed on the substrate 11 without causing defects due to lattice mismatch .

The embodiment can improve the internal light emitting efficiency by removing the internal electric field of the light emitting structure 27 by forming the light emitting structure 27 whose m-plane is m-plane on the m-plane of the substrate 11.

The light emitting device according to the embodiment can be applied to a light unit. The light unit includes a structure in which a plurality of light emitting elements 10 are arrayed. The light unit includes the display apparatus shown in Figs. 11 and 12 and the illumination apparatus shown in Fig. 13, and includes a lighting lamp, a traffic light, a vehicle headlight, , And an indicator light.

11 is an exploded perspective view of the display device according to the embodiment.

12, a display device 1000 includes a light guide plate 1041, a light emitting module 1031 for providing light to the light guide plate 1041, a reflection member 1022 under the light guide plate 1041, An optical sheet 1051 on the light guide plate 1041, a display panel 1061 on the optical sheet 1051, and a bottom cover 1011 for storing the light guide plate 1041, the light emitting module 1031 and the reflecting member 1022 , But is not limited thereto.

The bottom cover 1011, the reflective sheet 1022, the light guide plate 1041, and the optical sheet 1051 can be defined as a light unit 1050.

The light guide plate 1041 diffuses the light from the light emitting module 1031 to convert the light into a surface light source. The light guide plate 1041 is made of a transparent material and is made of a material such as acrylic resin such as PMMA (polymethyl methacrylate), polyethylene terephthalate (PET), polycarbonate (PC), cycloolefin copolymer (COC) and polyethylene naphthalate Resin. ≪ / RTI >

The light emitting module 1031 is disposed on at least one side of the light guide plate 1041 to provide light to at least one side of the light guide plate 1041 and ultimately to serve as a light source of the display device.

At least one light emitting module 1031 is disposed in the bottom cover, and may directly or indirectly provide light from one side of the light guide plate 1041. The light emitting module 1031 includes a substrate 1033 and a light emitting device 10 according to the embodiment described above and the light emitting devices 10 may be arrayed on the substrate 1033 at predetermined intervals. The substrate 1033 may be a printed circuit board, but is not limited thereto. The substrate 1033 may include a metal core PCB (MCPCB), a flexible PCB (FPCB), or the like, but is not limited thereto. When the light emitting device 10 is mounted on the side surface of the bottom cover 1011 or on the heat radiation plate, the substrate 1033 can be removed. A part of the heat radiation plate may be in contact with the upper surface of the bottom cover 1011. Accordingly, the heat generated in the light emitting element 10 can be emitted to the bottom cover 1011 via the heat dissipation plate.

The plurality of light emitting devices 10 may be mounted on the substrate 1033 such that the light emitting surface of the plurality of light emitting devices 10 is spaced apart from the light guiding plate 1041 by a predetermined distance. The light emitting device 10 may directly or indirectly provide light to the light-incident portion, which is one side of the light guide plate 1041, but is not limited thereto.

The reflective member 1022 may be disposed under the light guide plate 1041. The reflective member 1022 reflects the light incident on the lower surface of the light guide plate 1041 and supplies the reflected light to the display panel 1061 to improve the brightness of the display panel 1061. The reflective member 1022 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto. The reflective member 1022 may be an upper surface of the bottom cover 1011, but is not limited thereto.

The bottom cover 1011 may house the light guide plate 1041, the light emitting module 1031, the reflective member 1022, and the like. To this end, the bottom cover 1011 may be provided with a housing portion 1012 having a box-like shape with an opened upper surface, but the present invention is not limited thereto. The bottom cover 1011 may be coupled to a top cover (not shown), but is not limited thereto.

The bottom cover 1011 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding. In addition, the bottom cover 1011 may include a metal or a non-metal material having good thermal conductivity, but the present invention is not limited thereto.

The display panel 1061 is, for example, an LCD panel including first and second substrates of transparent materials opposed to each other, and a liquid crystal layer interposed between the first and second substrates. A polarizing plate may be attached to at least one surface of the display panel 1061, but the present invention is not limited thereto. The display panel 1061 transmits or blocks light provided from the light emitting module 1031 to display information. The display device 1000 can be applied to video display devices such as portable terminals, monitors of notebook computers, monitors of laptop computers, and televisions.

The optical sheet 1051 is disposed between the display panel 1061 and the light guide plate 1041 and includes at least one light-transmitting sheet. The optical sheet 1051 may include at least one of a sheet such as a diffusion sheet, a horizontal / vertical prism sheet, a brightness enhanced sheet, and the like. The diffusion sheet diffuses incident light, and the horizontal and / or vertical prism sheet concentrates incident light on the display panel 1061. The brightness enhancing sheet reuses the lost light to improve the brightness I will. A protective sheet may be disposed on the display panel 1061, but the present invention is not limited thereto.

The optical path of the light emitting module 1031 may include the light guide plate 1041 and the optical sheet 1051 as an optical member, but the present invention is not limited thereto.

12 is a view showing a display device having a light emitting device according to an embodiment.

12, the display device 1100 includes a bottom cover 1152, a substrate 1120 on which the above-described light emitting device 10 is arrayed, an optical member 1154, and a display panel 1155.

The substrate 1120 and the light emitting device 10 may be defined as a light emitting module 1160. The bottom cover 1152, at least one light emitting module 1160, and the optical member 1154 may be defined as a light unit (not shown).

The bottom cover 1152 may include a receiving portion 1153, but the present invention is not limited thereto.

The optical member 1154 may include at least one of a lens, a light guide plate, a diffusion sheet, a horizontal and vertical prism sheet, and a brightness enhancement sheet. The light guide plate may be made of a PC material or a PMMA (poly methy methacrylate) material, and such a light guide plate may be removed. The diffusion sheet diffuses the incident light, and the horizontal and vertical prism sheets condense the incident light onto the display panel 1155. The brightness enhancing sheet reuses the lost light to improve the brightness .

The optical member 1154 is disposed on the light emitting module 1060, and performs surface light source, diffusion, and light condensation of the light emitted from the light emitting module 1060.

13 is a perspective view of a lighting apparatus according to an embodiment.

13, the lighting apparatus 1500 includes a case 1510, a light emitting module 1530 installed in the case 1510, a connection terminal (not shown) installed in the case 1510 and supplied with power from an external power source 1520).

The case 1510 is preferably formed of a material having a good heat dissipation property, and may be formed of, for example, a metal material or a resin material.

The light emitting module 1530 may include a substrate 1532 and a light emitting device 10 mounted on the substrate 1532 according to an embodiment. A plurality of the light emitting devices 10 may be arrayed in a matrix or at a predetermined interval.

The substrate 1532 may be a circuit pattern printed on an insulator. For example, the substrate 1532 may be a printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, FR-4 substrate, and the like.

In addition, the substrate 1532 may be formed of a material that efficiently reflects light, or may be a coating layer of a color such as white, silver, or the like whose surface is efficiently reflected.

At least one light emitting device 10 may be mounted on the substrate 1532. Each of the light emitting devices 10 may include at least one light emitting diode (LED) chip. The LED chip may include a light emitting diode in a visible light band such as red, green, blue or white, or a UV light emitting diode that emits ultraviolet (UV) light.

The light emitting module 1530 may be arranged to have a combination of various light emitting devices 10 to obtain color and brightness. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be arranged in combination in order to secure a high color rendering index (CRI).

The connection terminal 1520 may be electrically connected to the light emitting module 1530 to supply power. The connection terminal 1520 is connected to the external power source by being inserted in a socket manner, but the present invention is not limited thereto. For example, the connection terminal 1520 may be formed in a pin shape and inserted into an external power source or may be connected to an external power source through wiring.

10A: Horizontal type light emitting element 10B: Flip type light emitting element
10C vertical type light emitting device 11:
13: groove 15: pattern
15a, 15b: upper surface 17: side surface
19: growth inhibiting layer 21: first conductivity type semiconductor layer
23: active layer 25: second conductivity type semiconductor layer
27: light emitting structure 31: first electrode
33: second electrode 35: reflective layer
37: electrode 41: current blocking layer
43: channel layer 45: electrode layer
47: bonding layer 49: conductive supporting member
53: buffer layer 61: pattern
61a, 61b: upper surface

Claims (12)

A substrate including a top surface and a groove pattern whose crystal direction is m plane;
A growth inhibiting layer disposed on an upper surface of the substrate; And
And a light emitting structure disposed on the growth inhibiting layer,
The upper surface of the substrate includes a first upper surface, a second upper surface disposed in the groove pattern,
Wherein the substrate includes a side surface perpendicular to a back surface of the substrate in a region where the first upper surface and the second upper surface are in contact with each other,
The first upper surface is disposed higher than the second upper surface,
Wherein the groove pattern is formed by the side surfaces that are in contact with the second upper surface and the second upper surface,
The side face has a c-plane in the crystal direction,
The width of the first upper surface has a width of 1% to 30% of the width of the second upper surface,
Wherein the growth inhibiting layer is disposed on the first upper surface and the second upper surface of the substrate,
Wherein the side surface disposed between the first upper surface and the second upper surface of the substrate is in contact with the light emitting structure,
Wherein the upper surface of the light emitting structure is m-plane. The method according to claim 1,
Wherein the groove pattern is a stripe pattern extending straight in the first direction. 3. The method according to claim 1 or 2,
Wherein the light emitting structure includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer,
A first electrode electrically connected to the first conductivity type semiconductor layer; and a second electrode electrically connected to the second conductivity type semiconductor layer,
Wherein the first electrode and the second electrode comprise one or an alloy selected from the group consisting of Al, Ti, Cr, Ni, Pt, Au, W, Cu and Mo. 3. The method according to claim 1 or 2,
Wherein the growth inhibiting layer comprises an insulating material. 5. The method of claim 4,
Wherein the growth inhibiting layer is made of SiO ₂ or SiN ₂ . The method according to claim 1,
Wherein a side surface of the light emitting structure is disposed on the same plane as an outer surface of the substrate.
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