KR101866348B1 - Method for manufacturing thin silicone wafer by hydrongen, hellium co-implantation - Google Patents

Abstract

The present invention relates to a solar cell and, more particularly, to a method of manufacturing a thin silicon substrate. Hydrogen and helium ions are implanted into a silicon wafer by the co-implantation of hydrogen and helium. Heat treatment is performed to fabricate a thin silicon substrate by texturing a solar cell according to a crack propagated onto the silicon wafer.

Description

TECHNICAL FIELD [0001] The present invention relates to a method for manufacturing a thin silicon substrate by hydrogen helium co-

The present invention relates to a solar cell. More particularly, the present invention relates to a solar cell, and more particularly, to a solar cell, in which hydrogen and helium ions are implanted into a silicon wafer by hydrogen helium implantation and the solar cell is textured according to a crack propagated on a silicon wafer To a method of manufacturing a silicon substrate.

The basic structure of a solar cell has a junction structure of a p-type semiconductor and an n-type semiconductor, such as a diode. When a light is incident on a solar cell, a negative charge is generated due to interaction between the light and a material constituting the semiconductor of the solar cell. Electrons and electrons escape (+) electrons and holes are generated, and current flows as they move. The p-type (101) and n-type semiconductors constituting the solar cell are attracted toward the n-type semiconductor and the holes are attracted toward the p-type semiconductor to form n-type semiconductors And the p-type semiconductor 102. When these electrodes are connected to each other by electric wires, electric power can be obtained because electricity flows.

On the other hand, the solar cell can be manufactured by forming a conductive layer of a conductive type different from that of the silicon substrate and forming an antireflection film (not shown) and a front electrode (not shown) and a rear electrode (not shown). However, before such a process is performed, a silicon substrate is subjected to a process of slicing a silicon ingot to remove damaged layers generated on the substrate surface, and to reduce the reflectance of the silicon substrate, a texturing process is performed.

The texturing process is a process that makes irregularities on the surface of the substrate to make it possible to absorb more light incident on the substrate.

Generally, the etching speed depends on the crystal orientation of silicon. Only the crystal orientation in which the etching rate is the slowest is left, and the substrate is textured and appears as a pyramid.

In an ordinary texturing process, an anisotropic etching is performed on the entire surface of a silicon substrate by using an etchant solution (etchant) in which an alkaline solution (for example, KOH or NaOH is included) and IPA (isopropyl alcohol) A wet method of performing texturing by forming unevenness is used.

However, there is a difficulty in controlling the size of the pyramid in the case of texturing using such a wet method. That is, when the height of the texturing is increased, the paste may not uniformly exist due to the texturing height in the screen printing process.

In addition, the resistance is increased due to such unevenness, which may cause a loss. To solve this problem, a method has been proposed in which hydrogen ions are implanted into a silicon substrate and then heat treatment is performed.

However, in the case of hydrogen ion implantation, when the phenomenon such as blistering, flaking, splittering occurs, the substrate is destroyed and it is difficult to use it as a substrate for a solar cell.

In addition, there is a disadvantage in that when the process conditions of manufacturing a substrate with a relatively small area are applied to a large area, the formation and / or propagation of internal cracks are not made uniformly, thereby failing to manufacture the substrate.

1. Korean Patent Publication No. 10-2015-0013871 2. Korean Patent Publication No. 10-2013-0079948 3. Korean Registered Patent No. 10-1523272 (Registered on May 20, 2015)

It is an object of the present invention to provide a method of manufacturing a thin silicon substrate that provides a thin silicon substrate using hydrogen helium co-implantation.

The present invention provides a method of manufacturing a thin silicon substrate that provides a thin silicon substrate using hydrogen helium co-implantation to achieve the above-described problems.

The thin silicon substrate manufacturing method includes:

A method of manufacturing a thin silicon substrate through hydrogen helium co-

Preparing a silicon substrate;

Implanting hydrogen ions into the silicon substrate;

Implanting helium ions after implanting the hydrogen ions;

Heat treating the silicon substrate into which the hydrogen ions and helium ions are implanted;

Forming a plurality of bubbles in the silicon substrate by the heat treatment;

Propagating microcracks in a specific direction from the plurality of bubbles; And

And forming a pyramid shape on the upper surface of the silicon substrate by the micro cracks.

At this time, the hydrogen ion and helium ion implantation may be characterized in that the pattern size of implantation is determined according to the texturing height.

The implantation direction of the hydrogen ions and helium ions may be perpendicular to the top surface of the silicon substrate.

(여기서, y는 텍스쳐링 높이이고, x는 텍스쳐링 너비를 나타낸다)으로 정해지는 것을 특징으로 할 수 있다.Further, the pattern size of the hydrogen ion and the helium ion implantation is expressed by the following equation

(Where y is the texturing height and x is the texturing width).

In addition, the crack propagates along the silicon surface of the silicon substrate.

In addition, the crack propagation may occur in a case where bonding energy among the silicon planes of the silicon substrate is small.

In addition, the silicon substrate may be a substrate having a dot pattern.

In addition, the injection may be a point-like shape rather than a continuous shape.

In addition, the silicon substrate may be a crystalline silicon substrate.

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According to the present invention, when helium is injected after injecting hydrogen, internal cracks and / or propagation are uniformly generated, and the present invention can be applied to a relatively large area.

Another advantage of the present invention is that the substrate can be manufactured without causing flaking or blistering.

As a further effect of the present invention, the manufacturing cost of a c-Si (crystalline silicon) solar cell module using a silicon substrate is 30% for polysilicon, 25% for a substrate, 20% Of the total area of the substrate, which can reduce the cost of the silicon raw material as the substrate can be manufactured without occurrence of flaking or blistering, .

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating a phenomenon in which bubbles generated by injected hydrogen are generally diffused in a lateral direction in a silicon. FIG.
FIG. 2 is a diagram illustrating a phenomenon in which bubbles generated by injected hydrogen generally diffuse in a longitudinal direction through a weak spot inside the silicon. FIG.
3 is a flow chart illustrating the process of performing texturing using hydrogen helium implantation according to one embodiment of the present invention.
FIG. 4 is a conceptual diagram according to the hydrogen injection step (S320) shown in FIG.
5 is a conceptual diagram showing an arrangement of bubbles generated by the hydrogen implantation (implantation) shown in FIG.
FIG. 6 is a conceptual diagram showing the propagation direction of micro cracks due to the bubbles generated by the hydrogen implantation shown in FIG.
FIG. 7 is a conceptual view showing texturing according to the propagation of micro cracks shown in FIG. 3. FIG.
FIG. 8 is a conceptual diagram showing a texturing state according to the pyramid shape generation step (S340) shown in FIG.
9 is a conceptual diagram showing the size of an implantation pattern according to a general height.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Like reference numerals are used for similar elements in describing each drawing.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. The term "and / or" includes any combination of a plurality of related listed items or any of a plurality of related listed items.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the meaning in the context of the relevant art and are to be construed as ideal or overly formal in meaning unless explicitly defined in the present application Should not.

Hereinafter, a method of manufacturing a thin silicon substrate by hydrogen helium implantation according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

In general, a solar cell is a device that converts solar energy into electrical energy. It has a junction form of a p-type semiconductor and an n-type semiconductor, and the basic structure is the same as a diode.

Most of the solar cells consist of large-area pn junction diodes. The basic requirement for the photovoltaic energy conversion of the solar cell is that the p-type semiconductor region has a small electron density and a large hole density hole density, and the n-type semiconductor region has a large electron density and a small hole density, electrons must exist asymmetrically within the semiconductor structure.

Therefore, in a diode formed of a junction of a p-type semiconductor and an n-type semiconductor in a thermal equilibrium state, a charge is unbalanced due to a diffusion due to a concentration gradient of a carrier and an electric field is thereby formed So that diffusion of abnormal carriers does not occur.

When light above a band gap energy, which is an energy difference between a conduction band and a valence band of the material, is applied to the above-described pn junction diode, electrons, which receive light energy, . ≪ / RTI > At this time, the electrons excited by the conduction band are allowed to move freely, and electrons are generated in the valence band. This is referred to as an excess carrier, and the excess carrier is diffused by a concentration difference in a conduction band or a valence band.

At this time, the electrons excited in the p-type semiconductor and the holes formed in the n-type semiconductor are called minority carriers, and carriers in the p-type semiconductor or the n-type semiconductor before the junction (that is, holes in the p- Type semiconductor is referred to as a majority carrier by distinguishing it from a minority carrier. The majority carriers are subject to flow interruption due to the energy barrier created by the electric field, but electrons, which are minority carriers of the p-type semiconductor, can migrate toward the n-type semiconductor.

The diffusion of the minority carriers causes a potential drop in the pn junction diode, and when the electromotive force generated at the positive terminal of the pn junction diode is connected to an external circuit, it acts as a solar cell.

A texturing process according to an embodiment of the present invention in the process of manufacturing such a solar cell will be described with reference to FIGS. 1 to 9. FIG.

FIG. 1 is a view for explaining a phenomenon in which bubbles generated by injected hydrogen are diffused in the lateral direction in the inside of silicon, and FIG. 2 is a view for explaining a phenomenon in which bubbles generated by injected hydrogen are weak inside a silicon ) And spread in the longitudinal direction. 1, bubbles are diffused in both directions inside the silicon of the silicon substrate. In the case of FIG. 2, both ends of the bubble are diffused into a weak spot in the silicon of the silicon substrate.

Generally, the semiconductor substrate is composed of a backside electrode layer (not shown), a backside front layer (not shown), a base layer (not shown), an emitter layer (not shown), and an insulation layer (not shown).

In addition, the emitter layers, which are the second impurity portions, are provided above and below the base layer, which is the first impurity, respectively. The emitter layer is located at the top of the base layer located on the side where the light is incident.

An insulating layer may be disposed on the emitter layer, and the insulating layer may be an antireflection film layer, a passivation layer, a dielectric, or the like.

A back surface field (BSF) is sequentially formed on the lower layer of the base layer, which is a first impurity located on a surface opposite to the front surface (hereinafter, referred to as a 'rear surface' Layer, a rear electrode layer, and the like.

The base layer is located on a semiconductor substrate of a first conductivity type, for example, p-type conductivity type silicon, and contains a first impurity of the first conductivity type. At this time, the base layer may contain an impurity of a trivalent element such as boron (B), gallium (Ga), indium (In) or the like.

Silicon is crystalline silicon such as single crystal silicon or polycrystalline silicon or amorphous silicon. Alternatively, the semiconductor substrate may be of the n-type conductivity type, in which case the base layer may contain impurities of pentavalent elements such as phosphorus (P), arsenic (As), antimony (Sb)

Further, in another embodiment, the semiconductor substrate may be made of a semiconductor material other than silicon.

3 is a flow chart illustrating the process of performing texturing using hydrogen helium implantation according to one embodiment of the present invention. Referring to FIG. 3, a silicon substrate is prepared (S310), a hydrogen ion is implanted into a prepared silicon substrate (S320), a helium ion is implanted after implanting hydrogen ions (S330) A step S350 of heat treating the implanted silicon substrate, a step S350 of generating a plurality of bubbles in the silicon substrate by the heat treatment, and propagating microcracks in a specific direction from the generated bubbles, And a pyramid shape is formed on the upper surface of the semiconductor substrate by propagated micro cracks to finish texturing (S360, S370).

4 is a conceptual diagram according to the steps of injecting hydrogen and helium (S320, S330) shown in FIG. Referring to FIG. 4, hydrogen ion and helium ion implantation (implantation) is performed on the silicon substrate 410. The implantation direction 420 is perpendicular to the top surface of the silicon substrate 410. In addition, the injection is not a continuous form but a dot form.

Hydrogen bubbles having a certain pattern are formed in the silicon of the silicon substrate 410 by the hydrogen ion and helium ion implantation (implantation) in such a point shape and / or a predetermined pattern, and when hydrogen bubbles crack propagate, Silicon falls off along a certain plane of the interior.

FIG. 5 is a conceptual diagram showing the arrangement of bubbles generated by hydrogen ion and helium ion implantation (implantation) shown in FIG. 3. FIG. Referring to FIG. 5, a plurality of bubbles 501 are generated when heat treatment is performed after hydrogen ions and helium ions are implanted (implanted).

Fig. 6 is a conceptual diagram showing the propagation direction of microcracks due to the bubbles generated by hydrogen ion and helium ion co-implantation (implantation) shown in Fig. 3; Referring to FIG. 6, the first silicon surface direction 610, the second silicon surface direction 611, and the third silicon surface direction 613 (see FIG. 3) may be removed from the bubble 501 as the heat treatment progresses in the heat treatment step The crack propagates.

This crack propagation is caused because the bonding energy of the silicon surface in the second silicon surface direction 611 and the third silicon surface direction 613 is smaller than the bonding energy of the silicon surface in the first silicon surface direction 610 to be. That is, cracks are generated in the second silicon face direction 611 and the silicon face direction in the third silicon face direction 613 where the binding energy is small, and the generated crack propagates.

In particular, if the silicon substrate 410 is a substrate having a dot pattern, there is an advantage that a crack can be encountered with each other, and a substrate having pyramid shapes arranged at regular intervals can be obtained.

The bonding energy along the silicon surface direction is smaller in the second silicon surface direction 611 and the third silicon surface direction 613 than in the first silicon surface direction 610, Crack propagation occurs on the surface of the third silicon surface direction 613.

If defects exist in the shape of a dot, the crack propagation due to the defect will follow the second silicon face direction 611 and the third silicon face direction 613 having small energy. If there is a dot pattern of the same size, the second silicon planar direction 611 and the third silicon planar direction 613 are propagated and the generated pattern is uniformly emitted.

FIG. 7 is a conceptual view showing texturing according to the propagation of micro cracks shown in FIG. 3. FIG. Referring to Fig. 7, this is an example showing the propagation of micro cracks. That is, when the cracked radio wave 710 is generated from the plurality of bubbles 501, the silicon at the overlapping portion of the cracked radio wave 710 is separated. FIG. 8 shows a pyramid shape generated through this process.

FIG. 8 is a conceptual diagram showing a texturing state according to the pyramid shape generation step (S340) shown in FIG. Referring to FIG. 8, a recess 810 is repeatedly formed on the upper surface of the silicon substrate 410 to form a pyramid shape. That is, the front surface of the silicon substrate 410 is textured to have a textured surface which is an uneven surface.

In FIG. 8, only the edge portion of the silicon substrate 410 is shown as a texturing surface for convenience. However, the entire front surface of the silicon substrate 410 substantially has a texturing surface, so that an insulating layer (also referred to as an antireflection film or the like) located on the front surface of the silicon substrate 410 also has an uneven surface. Alternatively, the silicon substrate 410 may have a texturing surface on the front side as well as on the back side.

Due to the texturing surface, the surface area of the silicon substrate 410 increases and the amount of light reflected by the silicon substrate 410 decreases, thereby increasing the amount of incident light.

9 is a conceptual diagram showing the size of an implantation pattern according to a general height. Referring to FIG. 9, the size of the implantation pattern is defined by the following equation.

Where y is the texturing height and x is the texturing width. The texturing width is equal to the implantation interval.

Also, an angle of about 54.7 degrees is the angle between the silicon planes, as follows:

Here, (h ₁ k- ₁ l ₁ ) and (h ₂ k ₂ l ₂ ) represent the silicon surface, and the used silicon surface is the surface of the first silicon surface direction 610, the surface of the second silicon surface direction 611, Is the surface of the third silicon surface direction 613.

Therefore, the size of the silicon (implantation) pattern according to the required height is shown in the following table.

x (탆) y (m) y (m) x (탆) One 1.752841 One 0.570502 2 3.505682 2 1.141005 3 5.258524 3 1.711507 4 7.011365 4 2.282009 5 8.764206 5 2.852512 6 10.51705 6 3.423014 7 12.26989 7 3.993516 8 14.02273 8 4.564019 9 15.77557 9 5.134521 10 17.52841 10 5.705023

410: silicon substrate
420: direction of hydrogen ion implantation
610, 611, 613, 710: direction of crack propagation
501: Bubble
810: Groove

Claims (10)

A method of manufacturing a thin silicon substrate through hydrogen helium co-
Preparing a silicon substrate;
Implanting hydrogen ions into the silicon substrate;
Implanting helium ions after implanting the hydrogen ions;
Heat treating the silicon substrate into which the hydrogen ions and helium ions are implanted;
Forming a plurality of bubbles in the silicon substrate by the heat treatment;
Propagating microcracks in a specific direction from the plurality of bubbles; And
Forming a pyramid shape on an upper surface of the silicon substrate by the micro crack;
≪ / RTI > wherein the hydrogen helium is implanted.
The method according to claim 1,
Wherein the implantation of hydrogen ions and helium ions determines the pattern size of the implant according to the texturing height. The method according to claim 1,
Wherein the implantation direction of the hydrogen ions and helium ions is perpendicular to the top surface of the silicon substrate.
3. The method of claim 2,
The pattern size of the hydrogen ion and helium ion implantation is given by the equation

(Where y is the texturing height and x is the texturing width). ≪ Desc / Clms Page number 20 >
The method according to claim 1,
Wherein the crack propagates along the silicon surface of the silicon substrate. ≪ RTI ID = 0.0 > 11. < / RTI >
The method according to claim 1,
Wherein the crack propagation occurs at a lower bonding energy among the silicon planes of the silicon substrate.
The method according to claim 1,
Wherein the silicon substrate is a substrate having a dot pattern. ≪ RTI ID = 0.0 > 8. < / RTI >
The method according to claim 1,
Wherein the implant is in point form rather than in a continuous form. ≪ RTI ID = 0.0 > 11. < / RTI >
[Claim 9 is abandoned upon payment of registration fee.] The method according to claim 1,
Wherein the silicon substrate is a crystalline silicon substrate. ≪ RTI ID = 0.0 > 11. < / RTI >
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