KR101778779B1 - 3d image display device and driving method thereof - Google Patents

Abstract

 A display panel including a plurality of pixels each having an organic light emitting diode and displaying the left eye image data and the right eye image data in a time-division manner; A liquid crystal shutter glasses in which a left-eye shutter and a right-eye shutter are alternately opened and closed in synchronism with the display panel; Eye image data and right eye image data for the left eye image data and the right eye image data for the right eye image data to a first period and controlling a time required for the left eye image data or the right eye image data to be completely addressed to the pixels To a second period shorter than the first period and controlling a period for emitting the pixels to a third period shorter than the first period and longer than the second period.

Description

TECHNICAL FIELD [0001] The present invention relates to a stereoscopic image display device,

The present invention relates to a stereoscopic image display device capable of realizing a three-dimensional stereoscopic image (hereinafter, referred to as '3D image') and a driving method thereof.

The stereoscopic image display device implements a 3D image using a stereoscopic technique or an autostereoscopic technique.

The binocular parallax method uses parallax images of right and left eyes with large stereoscopic effect, and both glasses and non-glasses are used, and both methods are practically used. In the non-eyeglass system, an optical plate such as a parallax barrier for separating the optical axis of left and right parallax images is installed in front of or behind the display screen. In the spectacle method, left and right parallax images having different polarization directions are displayed on a liquid crystal display panel, and stereoscopic images are implemented using polarizing glasses or liquid crystal shutter glasses.

The spectacle method is largely divided into a first polarizing filter method using a pattern retarder film and polarized glasses, a second polarizing filter method using a switching liquid crystal layer and polarizing glasses, and a liquid crystal shutter glasses method. In the first and second polarizing filter systems, the transmittance of the 3D image is low due to the pattern retarder film or the switching liquid crystal layer disposed on the liquid crystal display panel to serve as a polarizing filter.

In the liquid crystal shutter glasses system, a left-eye image and a right-eye image are alternately displayed on a display unit in frame units, and a left-eye and right-eye shutter of the liquid crystal shutter glasses is opened and closed in synchronization with the display timing. The liquid crystal shutter glasses open the left eye shutter only during the n-th frame period in which the left eye image is displayed and only the right eye shutter is opened during the (n + 1) -th frame in which the right eye image is displayed.

The stereoscopic image display device may include a hold type display device such as a liquid crystal display (LCD). The liquid crystal display keeps the data filled in the previous frame until just before new data is written on the liquid crystal holding property.

However, since the liquid crystals of the liquid crystal display device are slow in response speed and sequentially driven in accordance with the addressing order of the data, the time allocated to the liquid crystal response decreases from the top of the panel to the bottom of the panel. Here, the time allocated to the liquid crystal response can be defined to be just before the liquid crystal shutter glasses are opened after the addressing of the data. Due to the time difference allocated to the liquid crystal response, ghost-type 3D crosstalk occurs at the time of switching from the left eye image to the right eye image or from the right eye image to the left eye image.

In order to reduce such 3D crosstalk, a stereoscopic image display device including a liquid crystal display device as a display device recently adopts a high-speed driving method as shown in Fig. Referring to FIG. 1, in order to secure sufficient time for the liquid crystal to react, regardless of the position in the panel, in consideration of the liquid crystal response speed of the display device, Thereby speeding up data addressing. In other words, in the high-speed driving method, the left eye image data L is addressed to the display element for the (n + 1) th frame Fn + 1 as much as the 1/4 f time, +2), the left eye image data L is once again addressed to the display element, and then the left eye shutter STL of the liquid crystal shutter eyeglasses is turned on after a sufficient time has elapsed. The viewer views the left eye image for a short period of time in the (n + 2) -th frame (Fn + 2). Further, in the high-speed driving method, the right eye image data R is addressed to the display element during the (n + 3) th frame Fn + 3 for 1 / 4f time, 4), the right-eye shutter (STR) of the liquid crystal shutter glasses is opened (ON) after a sufficient time has elapsed after addressing the same right-eye image data R to the display element once more. The viewer views the right eye image for a short period of time in the (n + 4) th frame (Fn + 4).

However, in the stereoscopic image display apparatus including a liquid crystal display device as a display element, even if a high-speed driving method is adopted, a sufficient opening time of the left / right eye shutters STL and STR is ensured due to the slow response speed of the liquid crystal It is difficult to reduce the luminance when realizing 3D image.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a stereoscopic image display device and a method of driving the stereoscopic image display device in which luminance reduction can be minimized while reducing 3D crosstalk.

According to an aspect of the present invention, there is provided a stereoscopic image display apparatus comprising: a display panel including a plurality of pixels each having an organic light emitting diode, the display panel displaying time-divisionally the left eye image data and the right eye image data; A liquid crystal shutter glasses in which a left-eye shutter and a right-eye shutter are alternately opened and closed in synchronism with the display panel; Eye image data and right eye image data for the left eye image data and the right eye image data for the right eye image data to a first period and controlling a time required for the left eye image data or the right eye image data to be completely addressed to the pixels To a second period shorter than the first period and controlling a period for emitting the pixels to a third period shorter than the first period and longer than the second period.

A data driver driving data lines of the display panel; A gate driver for supplying a gate pulse to gate lines of the display panel; And an emission driver for supplying an emission pulse to the emission lines of the display panel.

Wherein the control circuit controls the gate driver to sequentially scan the gate pulses during the second period corresponding to the first half of the first period and to control the data driver to output the left or right eye image Sequentially addressing the data to the pixels during the second period; The emission control unit controls the emission driving unit to emit the emission pulses at a turn-on level at the same time when the left-eye or right-eye image data is completely filled in the pixels, To the third period; Controls the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controls the opening of the right eye shutter by overlapping with the third period of the right eye frame; The third period has a substantially same temporal length as the second period, and the opening and closing timings of the left and right eye shutters are performed within the second period.

Wherein the control circuit controls the gate driver to sequentially scan the gate pulses during the second period corresponding to the first half of the first period and to control the data driver to output the left or right eye image Sequentially addressing the data to the pixels during the second period; Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, To the third period overlapping with the second half of the period and extending to the second half of the first period; Controls the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controls the opening of the right eye shutter by overlapping with the third period of the right eye frame; The third period is longer than the second period, and the opening and closing points of the left and right eye shutters are made in the first half of the second period.

Wherein the control circuit controls the gate driver to sequentially scan the gate pulses during the second period corresponding to two-thirds of the first period, and controls the data driver to control the left / Sequentially addressing the right eye image data to the pixels during the second period; Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, To the third period overlapping with the second half of the period and extending to the back third of the first period; Controls the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controls the opening of the right eye shutter by overlapping with the third period of the right eye frame; The third period has a substantially same temporal length as the second period, and the opening and closing timings of the left and right eye shutters are performed in the first half of the second period.

A method of driving a stereoscopic image display according to an exemplary embodiment of the present invention includes the steps of: (A) displaying time-divisionally displaying left eye image data and right eye image data through a display panel including a plurality of pixels each having an organic light emitting diode; (B) synchronizing the liquid crystal shutter glasses with the display panel; And (C) controlling the time allocated to the left eye frame for the left eye image data and the right eye frame for the right eye image data to a first period, and the left eye image data or the right eye image data is addressed to the pixels Controlling the time required for the second period to be shorter than the first period and controlling the period for emitting the pixels to a third period shorter than the first period and longer than the second period.

The stereoscopic image display apparatus and the driving method thereof according to the present invention control the time allocated to the left eye frame for the left eye image data and the right eye frame for the right eye image data to the first period, By controlling the time required to complete the addressing of the data to be a second period shorter than the first period and controlling the period for emitting the pixels to a third period shorter than the first period and longer than the second period to reduce the 3D crosstalk The reduction in luminance can be minimized.

1 is a view showing an opening time of a shutter in a stereoscopic image display apparatus including a conventional liquid crystal display device as a display element.
2 and 3 are views showing a stereoscopic image display apparatus according to an embodiment of the present invention.
Fig. 4 is a detailed circuit diagram of the control circuit of Fig. 2; Fig.
5 is a detailed view of the data control unit of FIG. 4;
6 is a diagram illustrating a first driving example of a stereoscopic image display apparatus according to an embodiment of the present invention.
7 is a diagram illustrating a second driving example of a stereoscopic image display apparatus according to an embodiment of the present invention.
8 is a diagram illustrating a third driving example of a stereoscopic image display apparatus according to an embodiment of the present invention.
9 is a diagram showing a relationship between a time required for addressing data (scanning of gate pulses) and a light emission period.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 2 to 9. FIG.

2 and 3 show a stereoscopic image display apparatus according to an embodiment of the present invention.

2 and 3, the stereoscopic image display apparatus according to the embodiment of the present invention employs an organic light emitting diode display device as a display device. The stereoscopic image display apparatus includes a display panel 10 including an organic light emitting diode (OLED), a control circuit 11, a display panel driving circuit 12, a shutter control signal transmitter 13, A shutter control signal receiving unit 14, and a liquid crystal shutter glasses 15. [

A plurality of data lines 16, gate lines 17 and emission lines 18 are intersected with each other on the display panel 10 and pixels P are arranged for each of the intersection areas. Each of the pixels P includes an OLED which emits light by a driving current.

The pixel P is implemented by 3T1C (three transistors and one capacitor) including, for example, an OLED, a switch TFT ST, a drive TFT DT, an emission TFT ET and a storage capacitor Cst . Furthermore, the pixel P may further include a compensation circuit capable of compensating the threshold voltage of the driving TFT DT. This structure is only an example of the pixel P, so the technical idea of the present invention is not limited to this, and the structure for controlling the light emission time point of the pixel P using the emission TFT ET may be applied to any case It is possible. Here, the switch TFT (ST), the driver TFT (DT), and the emission TFT (ET) may be implemented by an N-type metal-oxide semiconductor field effect transistor (MOSFET).

The OLED has an organic compound layer formed between the anode electrode and the cathode electrode. The OLED is connected between the high potential driving voltage source (VDD) and the emission TFT (ET) and emits light by the current flowing between the high potential driving voltage source (VDD) and the ground voltage source (GND). The driving TFT DT is connected between the emission TFT ET and the ground voltage source GND and controls the amount of current flowing in the OLED in accordance with its gate-source voltage. The switch TFT ST switches the current path between the gate of the drive TFT DT and the data line 16 in accordance with the gate pulse SCAN from the gate line 17. The data voltage Vdata from the data line 16 is applied to the gate of the driving TFT DT during the on-time period of the switch TFT (ST). The storage capacitor Cst is connected between the gate and the source of the driving TFT DT and holds the data voltage Vdata charged in the gate of the driving TFT DT for a predetermined period of time. The emission TFT (ET) is connected between the drain of the driving TFT (DT) and the OLED. The emission TFT (ET) is switched in response to an emission pulse (EM) from the emission line (18) to determine the light emitting time point of the OLED.

The display panel drive circuit 12 includes a data driver 121, a gate driver 122, and an emission driver 123. The data driver 121 converts the left eye image data L and the right eye image data R inputted from the control circuit 11 into analog data voltages Vdata in response to the data control signals DDC and outputs them to the data lines 16). The gate driver 122 sequentially supplies a gate pulse SCAN synchronized with the data voltage Vdata to the gate lines 17 in response to the gate control signal GDC. The emission driving unit 123 applies an emission pulse EM for controlling the light emitting time point of the pixels P in response to the emission control signal EDC to the charged pixels P simultaneously Or sequentially supplies them to the pixels P that are being charged as shown in FIGS. 7 and 8. The gate driver 122 and the emission driver 123 may be embedded in the display panel 10 according to a GIP (Gate In Panel) scheme.

The liquid crystal shutter glasses 15 are provided with an electrically controlled left eye shutter STL and a right eye shutter STR. Each of the left-eye shutter STL and the right-eye shutter STR includes a first transparent substrate, a first transparent electrode formed on the first transparent substrate, a second transparent substrate, a second transparent electrode formed on the second transparent substrate, And a liquid crystal layer formed between the second transparent substrates. A reference voltage is supplied to the first transparent electrode and an ON / OFF voltage is supplied to the second transparent electrode. Each of the left eye shutter STL and the right eye shutter STR transmits light from the display panel 10 when the ON voltage is supplied to the second transparent electrode in response to the shutter control signal CST, The light from the display panel 10 is cut off.

The shutter control signal transmitting section 13 is connected to the control circuit 11 and transmits the shutter control signal CST inputted from the control circuit 11 to the shutter control signal receiving section 14 via the wire / wireless interface. The shutter control signal receiving unit 14 is provided in the liquid crystal shutter glasses 15 and receives the shutter control signal CST via the wired / wireless interface. The shutter control signal receiving unit 14 receives the shutter control signal CST, (STL) and the right-eye shutter (STR) are alternately opened and closed. When the shutter control signal CST is input to the shutter control signal receiving unit 14 as the first logical value, the ON voltage is supplied to the second transparent electrode of the left eye shutter STL, while the second voltage is applied to the second transparent electrode of the right eye shutter STR OFF voltage is supplied to the transparent electrode. When the shutter control signal CST is input to the shutter control signal receiving unit 14 as the second logic value, the OFF voltage is supplied to the second transparent electrode of the left eye shutter STL, while the OFF voltage is supplied to the second transparent electrode of the right eye shutter STR ON voltage is supplied to the transparent electrode. Therefore, the left eye shutter STL of the liquid crystal shutter glasses 15 is opened when the shutter control signal CST is generated as the first logic value, and the right eye shutter STR of the liquid crystal shutter glasses 15 is opened when the shutter control signal CST CST) is generated with the second logical value.

The control circuit 11 receives timing signals and digital video data from a video source (not shown). The timing signals include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a dot clock DCLK, and the like. The control circuit 11 separates the digital video data input from the video source into the left eye image data L and the right eye image data R and then outputs the left eye and right eye image data L and R to the data driver 121 Supply. The control circuit 11 controls the time allocated to the left eye frame for the left eye image data L and the time allocated to the right eye frame for the right eye image data R to be the first period, The time required for addressing the left eye image data L or the right eye image data R is controlled to be a second period shorter than the first period and the time for emitting the pixels P is controlled to be shorter than the first period And a third period of more than two periods. To this end, the control circuit 11 multiplies the frame frequency by N (N is a positive integer of 2 or more) of the input frame frequency, multiplies the display panel control signal CDIS and the shutter control signal CST by the N-times frame frequency, . Here, the input frame frequency is 50 Hz in the PAL (Phase Alternate Line) method and 60 Hz in the NTSC (National Television Standards Committee) method.

The display panel control signal CDIS includes a data control signal DDC for controlling the operation timing of the data driver 121, a gate control signal GDC for controlling the operation timing of the gate driver 122, And an emission control signal (EDC) for controlling the operation timing of the driving unit 123. The data control signal DDC and the gate control signal GDC are controlled to a predetermined speed so that the addressing of the data can be completed within the second period. The emission control signal EDC is set such that the pixels P are not overlapped with the left eye image and the right eye image at the time of switching from the left eye image to the right eye image or from the right eye image to the left eye image, And is controlled at a predetermined speed. The liquid crystal shutter control signal CST is transmitted to the shutter control signal transmitting section 13 and alternately opens and closes the left eye shutter STL and the right eye shutter STR of the liquid crystal shutter glasses 15 periodically for the first period.

Figures 4 and 5 show the control circuit 11 of Figure 2 in detail.

Referring to FIG. 4, the control circuit 11 includes a control signal generation unit 111, a data separation unit 112, and a data control unit 113.

The control signal generation unit 111 synchronizes the left eye frame and the right eye frame to the 2x-speed frame frequency 2f, respectively. The control signal generating section 111 synchronizes the data and gate control signals DDC and GDC with the triple speed frame frequency 3f or the quadruple speed frame frequency 4f in each of the left eye and right eye frames, EDC) to the 6x speed frame frequency 6f or the 8x speed frame frequency 8f. Then, the control signal generator 111 synchronizes the liquid crystal shutter control signal CST with the double-speed frame frequency 2f.

The data separating unit 112 separates the left eye image data L and the right eye image data R by separating the digital video data synchronized with the input frame frequency f into the left eye image data L and the right eye image data R, To the double speed frame frequency 2f.

The data control section 113 outputs the left and right eye image data L and R inputted in synchronism with the 2x speed frame frequency 2f to the data driving section 121 at the 3x speed frame frequency 3f or the 4x speed frame frequency 4f Adjust the addressing rate of the data so that it can be supplied.

To this end, the data control unit 113 includes a phase locked loop (PLL) circuit 113A, a memory controller, a memory, and a selection circuit 113H as shown in FIG. The PLL circuit 113A adjusts the clock frequency to generate an addressing clock faster than the dot clock (DCLK). The memory controller controls the memory at the triple speed frame frequency (3f) or the quadruple speed frame frequency (4f) in response to the addressing clock and the data enable signal (DE). The memory controller includes a first controller 113B that generates a write enable control signal (Write enable ctr.), A second controller 113C that generates a write address control signal (Write address ctr.), A third controller 113D for generating a read address ctr. And a selector 113E for selectively outputting a write address control signal and a read address control signal in response to a write enable control signal (Write enable ctr.) . The memory includes a first line memory 113F and a second line memory 113G that perform read / write operations in units of lines inversely. (L and R (3f / 4f)) are output from the second line memory 113G when the data (L, R (2f)) is written in the first line memory 113F, (L, R (3f / 4f)) from the first line memory 113F when the data (L, R (2f) The selection circuit 113H selectively outputs the data L and R (3f / 4f) from the first and second line memories 113F and 113G in response to the write enable control signal (Write enable ctr. .

6 shows a first driving example of a stereoscopic image display apparatus according to an embodiment of the present invention.

Referring to FIG. 6, the control circuit 11 controls the time allocated to the right eye frame for the left eye image data L and the right eye image for the right eye image data R in the first period T1, respectively. When the input frame frequency f is 60 Hz, the first period T1 is approximately 8.3 ms (1s / 120).

The control circuit 11 controls the gate driver to sequentially scan the gate pulse SCAN during the second period T2 corresponding to the first half of the first period T1 and to control the data driver to generate the gate pulse SCAN, Eye image data L / R synchronized with the left eye or right eye image data to the pixels during the second period T2. When the input frame frequency f is 60 Hz, the second period T2 is approximately 4.17 ms (1 s / 240).

The control circuit 11 controls the emission driving unit from the time when the left eye or right eye image data (L / R) is completely charged to the pixels to generate the emission pulse EM simultaneously at the turn-on level, And the third period T3 corresponding to the second half of the first period T1. The third period T3 has a substantially same temporal length as the second period T2.

The control circuit 11 overlaps the third period T3 of the left eye frame to open control the left eye shutter STL and controls the right eye shutter STR to overlap with the third period T3 of the right eye frame. The control circuit 11 controls the opening and closing timings of the left and right eye shutters STL and STR in the second period T2 through the liquid crystal shutter control signal CST.

As described above, the stereoscopic image display apparatus according to an exemplary embodiment of the present invention can correspond to the 4x-speed frame frequency 4f in a second period T2 required for sequential addressing of data (sequential scanning of gate pulses) The opening time of the left / right eye shutter STL (STR) can be sufficiently secured by emitting light for a third period T3 having the same temporal length as the second period T2, have. In addition, the 3D crosstalk can be drastically reduced by non-overlapping the left eye image and the right eye image at the time of switching from the left eye image to the right eye image or the time from the right eye image to the left eye image during the second period T2 .

7 shows a second driving example of the stereoscopic image display apparatus according to the embodiment of the present invention.

7, the control circuit 11 controls the time allocated to the right eye frame for the left eye image data L and the right eye image for the right eye image data R in the first period T1, respectively. When the input frame frequency f is 60 Hz, the first period T1 is approximately 8.3 ms (1s / 120).

The control circuit 11 controls the gate driver to sequentially scan the gate pulse SCAN during the second period T2 corresponding to the first half of the first period T1 and to control the data driver to generate the gate pulse SCAN, Eye image data L / R synchronized with the left eye or right eye image data to the pixels during the second period T2. When the input frame frequency f is 60 Hz, the second period T2 is approximately 4.17 ms (1 s / 240).

The control circuit 11 controls the light emission period of the pixels to the third period T3 which overlaps the second half of the second period T2 and extends to the second half of the first period T1. When the input frame frequency f is 60 Hz, the third period T2 is 6.25 ms (3s / 480). At this time, the control circuit 11 controls the emission driving section so that the left and right eye images are not mixed with each other at the time when the left and right eye images are changed, (EM) are sequentially scanned. That is, the control circuit 11 starts the scanning of the emission pulse EM from the middle point of the second period T2 and finishes the scanning of the emission pulse EM at the end point of the second period T2 .

The control circuit 11 overlaps the third period T3 of the left eye frame to open control the left eye shutter STL and controls the right eye shutter STR to overlap with the third period T3 of the right eye frame. The control circuit 11 controls the opening and closing timings of the left and right eye shutters STL and STR in the first half of the second period T2 through the liquid crystal shutter control signal CST.

As described above, the stereoscopic image display apparatus according to another exemplary embodiment of the present invention is configured to correspond to the quadruple-rate frame frequency 4f in a second period T2 required for sequential addressing of data (sequential scanning of gate pulses) By matching the time required for sequential scanning of the sequential pulses to the 8x-speed frame frequency 8f, the emission period can be extended for the pixels as shown in Fig. 6, thereby further reducing the luminance reduction in 3D image realization. By completing the scanning of the emission pulse within the overlapping period of the second period T2 and the third period T3, it is possible to obtain a time lag from the left eye image to the right eye image or from the right eye image to the left eye image, It is possible to dramatically reduce the 3D crosstalk by preventing overlapping of the right eye image.

FIG. 8 shows a third driving example of the stereoscopic image display device according to the embodiment of the present invention.

Referring to FIG. 8, the control circuit 11 controls the time allocated to the right eye frame for the left eye image data L and the right eye image data R for the first period T1, respectively. When the input frame frequency f is 60 Hz, the first period T1 is approximately 8.3 ms (1s / 120).

The control circuit 11 controls the gate driver to sequentially scan the gate pulse SCAN during the second period T2 corresponding to the preceding two-thirds of the first period T1, Left image or right eye image data (L / R) synchronized with the scan signal SCAN is sequentially addressed to the pixels during the second period T2. When the input frame frequency f is 60 Hz, the second period T2 is approximately 5.56 ms (1 s / 180).

The control circuit 11 controls the light emission period of the pixels to the third period T3 which overlaps with the second half of the second period T2 and extends to the back 1/3 of the first period T1. The third period T3 has a substantially same temporal length as the second period T2. At this time, the control circuit 11 controls the emission driving section so that the left and right eye images are not mixed with each other at the time when the left and right eye images are changed, (EM) are sequentially scanned. That is, the control circuit 11 starts the scanning of the emission pulse EM from the middle point of the second period T2 and finishes the scanning of the emission pulse EM at the end point of the second period T2 .

The control circuit 11 overlaps the third period T3 of the left eye frame to open control the left eye shutter STL and controls the right eye shutter STR to overlap with the third period T3 of the right eye frame. The control circuit 11 controls the opening and closing timings of the left and right eye shutters STL and STR in the first half of the second period T2 through the liquid crystal shutter control signal CST.

As described above, the stereoscopic image display device according to another embodiment of the present invention is configured to correspond to the 3x-speed frame frequency 3f in the second period T2 required for sequential addressing of data (sequential scanning of gate pulses) By matching the time required for sequential scanning of the sequential pulses to the 6x-speed frame frequency 6f, it is possible to increase the emission period of the pixels as shown in Fig. 6, thereby further reducing the luminance reduction in 3D image realization. By completing the scanning of the emission pulse within the overlapping period of the second period T2 and the third period T3, it is possible to obtain a time lag from the left eye image to the right eye image or from the right eye image to the left eye image, It is possible to prevent overlapping of the right eye image and reduce the 3D crosstalk. Furthermore, the stereoscopic image display apparatus according to another exemplary embodiment of the present invention may further include a second period T2 required for sequential addressing of data (sequential scanning of gate pulses) to correspond to a lower frame frequency as compared to FIGS. 6 and 7 , Uncharging of data due to high-speed driving, insufficient threshold voltage sensing time of the driving TFT, and increase in circuit cost can be reduced.

FIG. 9 shows the relationship between the time required for addressing data (scanning of gate pulses) and the light emission period.

Referring to FIG. 9, the stereoscopic image display apparatus according to an embodiment of the present invention may set a time (Tadd) required for addressing data (scanning a gate pulse) differently as needed. The longer the time (Tadd) required for the addressing of the data (scanning the gate pulse), the less the burden of high-speed driving, but the luminescence period (Tem) is reduced and the luminance is somewhat reduced. On the other hand, as the time (Tadd) required for addressing the data (scanning the gate pulse) is set shorter, the light emission period (Tem) is increased and the luminance is increased although there is a burden due to high-speed driving. When the input frame frequency f is 60 Hz, the time Tadd required for the addressing of the data (scanning of the gate pulse) can be set to be shorter than about 8.3 ms (1s / 120) It can be set to be about 4.17 ms (1s / 240) or more and shorter than 8.3 ms (1s / 120).

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the present invention should not be limited to the details described in the detailed description, but should be defined by the claims.

10: display panel 11: control circuit
12: display panel driving circuit 13: shutter control signal transmitter
14: shutter control signal receiving unit 15: liquid crystal shutter glasses

Claims (12)

A display panel for displaying the left eye image data and the right eye image data by time division including a plurality of pixels each having an organic light emitting diode;
A liquid crystal shutter glasses in which a left-eye shutter and a right-eye shutter are alternately opened and closed in synchronism with the display panel;
A data driver driving data lines of the display panel;
A gate driver for supplying a gate pulse to gate lines of the display panel;
An emission driver for supplying an emission pulse to the emission lines of the display panel; And
Eye image data and right eye image data for the left eye image data and the right eye image frame for the right eye image data to a first period and controls the time required for the left eye image data or the right eye image data to be completely addressed to the pixels And a control circuit controlling the light emitting period of the pixels to a second period shorter than the first period and controlling the light emitting period of the pixels to a third period shorter than the first period,
The control circuit comprising:
Wherein the controller controls the gate driver to sequentially scan the gate pulses and sequentially address the left eye image data or the right eye image data synchronized with the gate pulse by controlling the data driver to control the emission driver, Scanning the sequential pulses sequentially to the addressed lines,
The third period being partially overlapped with the second period and partially overlapping with the second half of the first period,
Wherein the third period includes a predetermined period that does not overlap the second period within the first period. delete The method according to claim 1,
In the third period,
And the second period is the same as the second period or longer than the second period. The method according to claim 1,
The control circuit comprising:
Controlling the gate driver to sequentially scan the gate pulses during the second period corresponding to the first half of the first period and to control the data driver to apply the left or right eye image data synchronized with the gate pulse to the second Sequentially addressing the pixels during a period;
Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, To the third period overlapping with the second half of the period and extending to the second half of the first period;
Controls the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controls the opening of the right eye shutter by overlapping with the third period of the right eye frame;
Wherein the third period is longer than the second period and the opening and closing times of the left and right eye shutters are made in the first half of the second period. The method according to claim 1,
The control circuit comprising:
Controlling the gate driver to sequentially scan gate pulses during the second period corresponding to 2/3 of the first period, and controlling the data driver to output the left or right eye image data synchronized with the gate pulse, Sequentially addressing the pixels during a second period;
Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, To the third period overlapping with the second half of the period and extending to the back 1/3 of the first period;
Controls the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controls the opening of the right eye shutter by overlapping with the third period of the right eye frame;
Wherein the third period has the same temporal length as the second period and the opening and closing times of the left and right eye shutters are made in the first half of the second period. (A) displaying the left eye image data and the right eye image data by time division through a display panel including a plurality of pixels each having an organic light emitting diode;
(B) synchronizing the opening and closing of the left and right eye shutters of the liquid crystal shutter glasses with the display panel;
(C) driving data lines of the display panel through a data driver;
(D) supplying a gate pulse to gate lines of the display panel through a gate driver;
(E) supplying an emission pulse to the emission lines of the display panel through an emission driving unit; And
(F) controlling the time allocated to the left eye frame for the left eye image data and the right eye frame for the right eye image data to a first period, and for the left eye image data or the right eye image data to be completely addressed And controlling the emission time of the pixels to a third period shorter than the first period by controlling the period of the first period to a second period shorter than the first period,
The step (F)
Wherein the controller controls the gate driver to sequentially scan the gate pulses and sequentially address the left eye image data or the right eye image data synchronized with the gate pulse by controlling the data driver and controls the emission driver, The pulse is sequentially scanned on the addressed lines,
The third period being partially overlapped with the second period and partially overlapping with the second half of the first period,
Wherein the third period includes a predetermined period that is not overlapped with the second period within the first period. delete The method according to claim 6,
The step (F)
And the third period is controlled to be equal to or longer than the second period. The method according to claim 6,
The step (F)
Controlling the gate driver to sequentially scan the gate pulses during the second period corresponding to the first half of the first period and to control the data driver to apply the left or right eye image data synchronized with the gate pulse to the second Sequentially addressing the pixels during a period of time;
Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, To the third period overlapping with the second half of the period and extending to the second half of the first period; And
Controlling the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controlling the opening of the right eye shutter by overlapping with a third period of the right eye frame;
Wherein the third period is longer than the second period and the opening and closing times of the left and right eye shutters are made in the first half of the second period. The method according to claim 6,
The step (F)
Controlling the gate driver to sequentially scan gate pulses during the second period corresponding to 2/3 of the first period, and controlling the data driver to output the left or right eye image data synchronized with the gate pulse, Sequentially addressing the pixels during a second period;
Wherein the control unit controls the emission driving unit to start scanning of the emission pulse from an intermediate point of the second period and to complete scanning of the emission pulse at an end of the second period, The third period overlapping with the second half of the period and extending to the rear one-third of the first period; And
Controlling the opening of the left eye shutter by overlapping with a third period of the left eye frame, and controlling the opening of the right eye shutter by overlapping with a third period of the right eye frame;
Wherein the third period has the same temporal length as the second period and the opening and closing times of the left and right eye shutters are made in the first half of the second period. The method according to claim 1,
The control circuit comprising:
And controls scanning of the emission pulse within an overlapping period of the second period and the third period. The method according to claim 6,
The step (F)
And the scanning of the emission pulse is completed within an overlapping period of the second period and the third period.

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