KR101689342B1 - Semiconductor light emitting device and method of manufacturing the same - Google Patents

Semiconductor light emitting device and method of manufacturing the same Download PDF

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Publication number
KR101689342B1
KR101689342B1 KR1020150046926A KR20150046926A KR101689342B1 KR 101689342 B1 KR101689342 B1 KR 101689342B1 KR 1020150046926 A KR1020150046926 A KR 1020150046926A KR 20150046926 A KR20150046926 A KR 20150046926A KR 101689342 B1 KR101689342 B1 KR 101689342B1
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South Korea
Prior art keywords
light emitting
encapsulant
semiconductor light
wall
emitting chip
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KR1020150046926A
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Korean (ko)
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KR20160119313A (en
Inventor
전수근
백승호
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주식회사 세미콘라이트
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Priority to KR1020150046926A priority Critical patent/KR101689342B1/en
Priority to PCT/KR2016/001805 priority patent/WO2016137227A1/en
Publication of KR20160119313A publication Critical patent/KR20160119313A/en
Application granted granted Critical
Publication of KR101689342B1 publication Critical patent/KR101689342B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The present disclosure relates to a semiconductor light emitting device comprising: a semiconductor light emitting chip having a plurality of semiconductor layers which generate light by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers; A wall positioned around a semiconductor light emitting chip, comprising: a wall having an upper surface elevated by surface tension; A first encapsulant formed in a cavity formed by the top of the cover wall to cover the semiconductor light emitting chip; And a second encapsulation material interposed between at least the wall and the semiconductor light emitting chip, and a method of manufacturing the semiconductor light emitting device.

Description

Technical Field [0001] The present invention relates to a semiconductor light emitting device and a method of manufacturing the same,

The present disclosure relates generally to a semiconductor light emitting device and a manufacturing method thereof, and more particularly, to a semiconductor light emitting device with reduced light absorption loss and a manufacturing method thereof.

As the semiconductor light emitting element, a Group III nitride semiconductor light emitting element is exemplified. The Group III nitride semiconductor is made of a compound of Al (x) Ga (y) In (1-x-y) N (0? X? 1, 0? Y? 1, 0? X + y? A GaAs-based semiconductor light-emitting element used for red light emission, and the like.

Herein, the background art relating to the present disclosure is provided, and these are not necessarily meant to be known arts.

1 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 7,262,436. The semiconductor light emitting device includes a substrate 100, an n-type The active layer 400 formed on the semiconductor layer 300, the n-type semiconductor layer 300, the p-type semiconductor layer 500 grown on the active layer 400 and the p-type semiconductor layer 500 Electrodes 901, 902 and 903 and an n-side bonding pad 800 formed on the n-type semiconductor layer 300 exposed by etching.

A chip having such a structure, that is, a chip in which both the electrodes 901, 902, 903 and the electrode 800 are formed on one side of the substrate 100 and the electrodes 901, 902, 903 function as a reflection film is called a flip chip . Electrodes 901,902 and 903 may be formed of a highly reflective electrode 901 (e.g., Ag), an electrode 903 (e.g., Au) for bonding, and an electrode 902 (not shown) to prevent diffusion between the electrode 901 material and the electrode 903 material. For example, Ni). Such a metal reflection film structure has a high reflectance and an advantage of current diffusion, but has a disadvantage of light absorption by a metal.

FIG. 2 is a view showing an example of an LED shown in U.S. Patent No. 6,650,044. In the LED, a plurality of semiconductor layers 300, 400, and 500 are sequentially deposited on a growth substrate 100. A metal reflection film 950 is formed on the second semiconductor layer 500 and an electrode 800 is formed on the exposed first semiconductor layer 300. The encapsulant 1000 contains a phosphor and is formed so as to surround the growth substrate 100 and the semiconductor layers 300, 400 and 500. The LEDs are bonded to the substrate 1200 having the electrical contacts 820 and 960 by conductive adhesives 830 and 970.

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, there is provided a semiconductor light emitting device comprising: a plurality of semiconductor layers which generate light by recombination of electrons and holes, and a plurality of semiconductor layers which are electrically connected to the plurality of semiconductor layers A semiconductor light emitting chip having electrodes; A wall positioned around a semiconductor light emitting chip, comprising: a wall having an upper surface elevated by surface tension; A first encapsulant formed in a cavity formed by the top of the cover wall to cover the semiconductor light emitting chip; And a second encapsulant interposed between at least the wall and the semiconductor light emitting chip.

According to another aspect of the present disclosure, there is provided a semiconductor light emitting device having a plurality of semiconductor layers and electrodes electrically connected to a plurality of semiconductor layers on a base exposed by a dam and an opening formed on the base, A semiconductor light emitting device comprising a semiconductor light emitting chip and formed by forming a wall having an upper end raised by surface tension between a side surface of a dam and a semiconductor light emitting chip, A semiconductor light emitting chip having electrodes electrically connected to the plurality of semiconductor layers; An encapsulating material formed between the wall and the semiconductor light emitting chip, and an upper surface of the semiconductor light emitting chip; And an additional encapsulant formed integrally with the encapsulant at the opposite side of the electrode, the encapsulant having a side joined to the encapsulant. The outer side of the side surface of the side surface of the sealing material is higher than the electrode side. The side surface is formed along the shape of the top of the wall elevated by the surface tension and has a convex side And an encapsulating material of the semiconductor light emitting device.

According to still another aspect of the present disclosure, there is provided a method of manufacturing a semiconductor light emitting device, comprising: forming a semiconductor light emitting chip on a base exposed through a dam and an opening formed on a base; The method comprising: providing a semiconductor light emitting chip in an opening, the semiconductor light emitting chip having a plurality of semiconductor layers for generating light by recombination of electrons and holes; and an electrode electrically connected to the plurality of semiconductor layers; Forming a wall between the side of the dam and the semiconductor light emitting chip due to the opening, wherein the top of the wall is elevated along the side of the dam by surface tension, Forming a wall; And forming a first encapsulant in a cavity formed by the top of the cover to cover the semiconductor light emitting chip.

This will be described later in the Specification for Implementation of the Invention.

1 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 7,262,436,
2 is a view showing an example of an LED shown in U.S. Patent No. 6,650,044,
3 is a view for explaining examples of the semiconductor light emitting device according to the present disclosure,
4 is a view for explaining other examples of the semiconductor light emitting device according to the present disclosure,
5 is a view for explaining an example of the shape of the top of the wall and the relationship of light extraction,
6 and 7 are views for explaining an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure,
8 and 9 are views for explaining another example of the method of manufacturing the semiconductor light emitting device according to the present disclosure,
10 and 11 are views for explaining an example of a method of providing a semiconductor light emitting chip on a base using a dam,
12 is a view for explaining still another example of the semiconductor light emitting device according to the present disclosure,
13 is a view for explaining still another example of the semiconductor light emitting device according to the present disclosure,
14 is a view for explaining another example of the semiconductor light emitting device according to the present disclosure;

The present disclosure will now be described in detail with reference to the accompanying drawings.

3 is a view for explaining examples of a semiconductor light emitting device according to the present disclosure. The semiconductor light emitting device 100 includes a semiconductor light emitting chip 101, a wall 170, a first encapsulant 180, and a second encapsulant 190. The semiconductor light emitting chip 101 includes a plurality of semiconductor layers 30, 40 and 50 (see FIG. 5D) that generate light by recombination of electrons and holes, and a plurality of semiconductor layers 30, And at least one electrode (80, 70). The semiconductor light emitting chip 101 may be a blue semiconductor light emitting chip (for example, 450 nm), a NUV semiconductor light emitting chip, a green semiconductor light emitting chip, or a red semiconductor light emitting chip. The wall 170 is located around the semiconductor light emitting chip 101 and has a top 173 that is elevated by surface tension. The first encapsulant 180 is formed in a cavity 175 (see FIG. 7B) formed by the upper end 173 of the wall 170 and is formed to cover the semiconductor light emitting chip 101. The second encapsulant 190 is formed to be interposed at least between the wall 170 and the semiconductor light emitting chip 101.

3, the second encapsulant 190 surrounds the semiconductor light emitting chip 101 so as to expose the electrodes 80 and 70, and the first encapsulant 180 encapsulates the second encapsulant 100, And is formed so as to cover the semiconductor light emitting chip 101 on the sealing material 190. The second encapsulant 190 does not cover the opposite side of the electrodes 80 and 70 of the semiconductor light emitting chip 101 (the upper surface of the semiconductor light emitting chip) 101 of the first and second electrodes 80 and 70 while covering the opposite sides of the electrodes 80 and 70. In this example, at least one of the first encapsulant 180 and the second encapsulant 190 is made of a transparent material (e.g., silicon or the like) containing no phosphor. For example, the first encapsulant 180 and the second encapsulant 190 may be made of a material having excellent translucency (e.g., silicone, resin, etc.) without containing a phosphor, And may be a semiconductor light emitting chip 101. The refractive index of the first encapsulant 180 may be different from the refractive index of the second encapsulant 190. For example, the refractive index of the first encapsulant may be 1.4 and the refractive index of the second encapsulant may be 1.5. Alternatively, the first encapsulant 180 and the second encapsulant 190 may be formed of the same material, or may have the same refractive index.

The wall 170 is preferably formed of a low light transmissive material or a non-transmissive material (e.g., a light reflective material). The upper end 173 of the wall 170 is formed to have a higher outer edge 173b than the edge 173a of the second encapsulant 190 and the upper end 173 of the wall 170 is formed on the wall 170, respectively. The wall 170 contacts the second encapsulant 190 and has an inner side 173a and an inner side 172 which adjoins the upper end 173 of the wall 170. The inner side surface 172 may be parallel to the side surface of the semiconductor light emitting chip 101 (see FIG. 3A). Or the distance from the inner edge 173a of the upper end 173 of the wall 170 to the semiconductor light emitting chip 101 is greater than the distance from the inner edge of the lower end of the wall 170 to the semiconductor light emitting chip 101, 170 may be formed. The wall 170 is preferably formed to cover the bottom surface (the surface of the semiconductor light emitting chip around the electrode) of the second encapsulant 190 to prevent leakage of light, (See Figs. 3A and 3B). The semiconductor light emitting chip 101 is formed to cover the bottom surface of the semiconductor light emitting chip 101 except for the light emitting diodes 70 and 70. The lower surface of the semiconductor light emitting chip 101 excluding the electrodes 80 and 70 can be covered with the second encapsulant 190 and covered with the wall 190. [ The lower surface of the semiconductor light emitting chip 101 excluding the electrodes 80 and 70 may be covered by the wall 190 without being covered by the second encapsulant 190. [ Meanwhile, an example in which a separate reflective film 130 is provided on the lower surface of the second encapsulant 190 (see FIG. 3C)

Fig. 4 is a view for explaining another example of the semiconductor light emitting device according to the present disclosure, and it is also possible to take into consideration examples in which the wall does not cover the bottom surface of the second encapsulant, as shown in Fig.

FIG. 5 is a view for explaining an example of the shape of the upper end of the wall and the relationship of light extraction. Referring to FIG. 5D, the semiconductor light emitting chip 101 includes a growth substrate 10, The semiconductor layer 30, 40, and 50, the light reflection layer R, the first electrode 80, and the second electrode 70. In the present disclosure, the semiconductor light emitting chip 101 is not limited to such a flip chip, and a lateral chip or a vertical chip can be applied.

As an example of the III-nitride semiconductor light emitting device, sapphire, SiC, Si, GaN or the like is mainly used as the growth substrate 10, and the growth substrate 10 may be finally removed. The plurality of semiconductor layers 30, 40, and 50 may include a buffer layer (not shown) formed on the growth substrate 10, a first semiconductor layer 30 having a first conductivity (e.g., Si-doped GaN) A second semiconductor layer 50 (e.g., Mg-doped GaN) having another second conductivity, and a second semiconductor layer 50 interposed between the first semiconductor layer 30 and the second semiconductor layer 50 to generate light through recombination of electrons and holes. An active layer 40 (e.g., InGaN / (In) GaN multiple quantum well structure). Each of the plurality of semiconductor layers 30, 40, and 50 may have a multi-layer structure, and the buffer layer may be omitted. The positions of the first semiconductor layer 30 and the second semiconductor layer 50 may be changed, and they are mainly composed of GaN in the III-nitride semiconductor light emitting device.

The first electrode 80 is in electrical communication with the first semiconductor layer 30 through an electrical connection 81 to supply electrons. The second electrode 70 is electrically connected to the second semiconductor layer 50 through the electrical connection 71 to supply holes. A light reflection layer R may be interposed between the second semiconductor layer 50 and the electrodes 70 and 80 and a light transmissive conductive film 60 may be interposed between the second semiconductor layer 50 and the light reflection layer R. [ . The light reflection layer R may have a multilayer structure including an insulating layer such as SiO 2 , a DBR (Distributed Bragg Reflector), or an ODR (Omni-Directional Reflector). Alternatively, a metal reflection film may be provided on the second semiconductor layer 50, a second electrode 70 may be provided on the metal reflection film, and the first semiconductor layer 30 exposed by mesa etching may be connected to the first electrode 80 .

5B, the side surface 172 of the wall 170 and the semiconductor light emitting chip 101 are formed so as to be in contact with each other, and the fluorescent material 181 is contained in the sealing material 180. Therefore, light emitted from the side surface of the semiconductor light emitting chip 101 is partially absorbed by the wall 170 and partially reflected. The reflected light extinguishes again in the semiconductor light emitting chip 101 or comes out to the sealing material 180 side. The fluorescent material 181 contained in the encapsulant 180 is excited by light (e.g., blue light) from the semiconductor light emitting chip 101 to emit light whose wavelength has been changed in all directions. A portion of the light emitted from the phosphor 181 exits the encapsulant 180 and another portion of the light is reflected and absorbed at the top 173 of the wall 170.

5A, a second encapsulant 190 is interposed between the side surface 172 of the wall 170 and the semiconductor light emitting chip 101. In the example shown in FIG. A part of the light emitted from the side of the semiconductor light emitting chip 101 enters the first encapsulant 180 without reflection by the wall 170 and a part is reflected and absorbed by the wall 170. [ A part of the light reflected by the wall 170 enters the first encapsulant 180 and a part of the light enters the semiconductor light emitting chip 101. Therefore, the amount of light that is lost compared to the example shown in FIG. 5B can be reduced. In addition, in the example shown in FIG. 5A, the first encapsulant 180 and the second encapsulant 190 do not contain a light-scattering agent such as the phosphor 181, so light is not scattered in all directions. Thus, the amount of light impinging on the wall 170 is relatively small, so that absorption loss by the wall 170 can be reduced. On the other hand, referring to FIG. 5C, in this example, the upper end 173 of the wall 170 rises by the surface tension and has the shape as described above. V11 and V12 reflected vertically from the upper surface of the sealing material 180 are compared with the reflection of light by the upper surface 173 of the wall 170 and the reflection of light by the vertical surfaces V11 and V12. The reflected light L2 may be continuously reflected by the internal reflection to increase the loss. On the other hand, light L1 reflected at the top 173 of the wall 170 may be better emitted from the first encapsulant 180, as shown in FIG. 5C.

6 and 7 are views for explaining an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure. Referring to FIG. 6, first, a dam 301 having an opening 305 on a base 201, Or a mask, and the semiconductor light emitting chip 101 is placed on the base 201 exposed with the opening 305 (see Fig. 6A). Thereafter, the second encapsulant 190 is formed in the opening 305 (see FIG. 6B). The second encapsulant 190 is cured and the semiconductor light emitting chip 101 on which the second encapsulant 190 is formed is separated from the dam 301 (see FIG. 6C). The semiconductor light emitting chip 101 can be pulled out of the dam 301 by being pushed by the uneven plate 1005 or the rod. As a result, a combined body including the semiconductor light emitting chip 101 and the first encapsulant 180 that exposes the first electrode 80 and the second electrode 70 and surrounds the semiconductor light emitting chip 101 is formed.

The second encapsulant 190 may be made of a light-transmissive resin or a material that seals and transmits light, such as silicon. When the second encapsulant 190 is formed in the opening 305 of the dam 301 and the lower encapsulant 190 of the second encapsulant 190 and the base 190 of the second encapsulant 190, A slight gap may be formed between the first sealing member 201 and the second sealing member 190 so that the side surfaces of the electrodes 70 and 80 are slightly exposed without completely covering the side surfaces of the electrodes 70 and 80 Reference).

Alternatively, if the viscosity of the second encapsulant 190 is too low to completely fill the corner of the opening 305, or even if there is a slight gap as shown in FIG. 6B, the second encapsulant 190 The etched bottom surface 192 of the second encapsulant 190 can be formed by etching or brushing the bottom surface to thereby remove the contamination and sufficiently expose the electrodes 70 and 80 6D). A combination of the semiconductor light emitting chip 101 and the second encapsulant 190 shown in Fig. 6C or 6D can be used in the subsequent process. As another example, a process of separately forming the reflective film 130 on the lower surfaces 191 and 192 of the second encapsulant 190 described in FIG. 6B or 6D may be added.

Thereafter, as shown in Fig. 7, the dam 301 and the coupling are placed on a base 201 different from or identical to the base 201 described in Fig. The side surface 307 due to the opening 305 of the dam 301 may be an inclined surface inclined with respect to the base 201. [ Thereafter, a wall 170 is formed between the side surface 307 of the dam 301 and the semiconductor light emitting chip 101. Preferably, the dispenser supplies the opening 305 with a material with low light transmittance, or a non-transparent material (such as a light reflecting material), such that the non-transparent material is disposed between the side 307 of the dam 301 and the second encapsulant 190 to form a wall 170 while naturally spreading into the opening 305. When a combination of the semiconductor light emitting chip 101 and the second encapsulant 190 is used as described with reference to FIG. 6B or 6D, a gap between the bottom of the base 201 and the second encapsulant 190 is non- The material enters and is formed as shown in FIG. 7B. As the material of the wall 170, a variety of materials such as a resin (silicone, epoxy, etc.) may be used. When the reflectance of the material is 50% or more, the wall 170 may be used as a reflector. Meanwhile, the wall 170 may be made of an electro-magnetic compatibility (EMC) material to prevent electromagnetic interference. It is not excluded that the material of the wall 170 is translucent.

The wall 170 is formed such that the top 173 is elevated along the side surface 307 of the dam 301 by surface tension and at least the top 173 of the wall 170 is separated from the semiconductor light emitting chip 101 . The wall 170 is formed between the side surface 307 of the dam 301 and the second encapsulant 190 and the second encapsulant 190 covers the semiconductor light emitting chip 101, 170 rises due to surface tension along the side surface 307 of the dam 301 and the second sealing material 190. Since the side surface 307 of the dam 301 is an inclined surface, the upper end 173b (the outer upper end of the wall) of the sidewall 170 of the side surface 307 of the dam 301 is located on the side of the second sealing material 190 side wall 170 And is formed higher than the upper end 173a (the inner upper end of the wall). The upper end 173 of the wall 170 is concave toward the lower end. In order to increase the surface tension, the non-light-transmitting substance may be selected as a material having a low viscosity. When the viscosity of the non-light-transmitting material is low, the gap between the base 201 and the bottom surface 191 of the second encapsulant 190 (see FIG. 6) or the semiconductor light emitting chip 101 excluding the electrodes 70 and 80 of the semiconductor light- It is advantageous to form the non-permeable material to penetrate or cover the lower surface of the substrate 101.

The top surface 173 of the wall 170 may have an elevated shape due to the surface tension even if the side surface 307 of the dam 301 is not a slope but a vertical surface to the base 201. [ However, if the side surface 307 of the dam 301 is a sloped surface and the viscosity of the non-light-permeable material is selected appropriately, it will be more advantageous to form the top 173 of the wall 170 as described above. The top 173 of the wall 170 may have the dotted line shape shown in FIG. 7B.

The first encapsulant 180 is applied to the cavity 175 formed by the upper end 173 of the wall 170 so that the first encapsulant 180 covers the semiconductor light emitting chip 101 . For example, after the resin used as the wall 170 is soft cured or cured, the upper end 173 of the wall 170, and the cavity formed by the second encapsulant 190, Or the first encapsulant 180 is formed in such a manner that the silicone is dotted or printed.

The first encapsulant 180 is formed on the second encapsulant 190 and is separated from the semiconductor encapsulant chip 101 by the semiconductor light emitting chip 101 101). The first encapsulant 180 may be formed to cover the semiconductor light emitting chip 101 while being in contact with the semiconductor light emitting chip 101, ). Then, the assembly made up of the semiconductor light emitting chip 101, the first encapsulant 180, and the second encapsulant 190 is separated from the dam 301. A method may be employed in which the semiconductor light emitting device 100 is pushed out from the electrodes 80 and 70 side by a bar or the semiconductor light emitting device 100 is pushed out with a plate having a relief pattern formed thereon. A release coating layer may be formed on the side surface 307 of the dam 301 to facilitate separation.

At least one of the first encapsulant 180 and the second encapsulant 190 may be made of a transparent material (for example, silicone, resin or the like) containing no phosphor and the refractive index of the first encapsulant 180 may be 2 encapsulant 190 may be different. Of course, the refractive index of the first encapsulant 180 and the refractive index of the second encapsulant 190 may be the same or the first encapsulant 180 and the second encapsulant 190 may be made of the same material.

According to the semiconductor light emitting device 100 and the method of manufacturing the semiconductor light emitting device 100, the semiconductor light emitting device 100 has a very advantageous structure for reducing the size thereof, The wall 170 can be formed compactly so that it can be a substantially chip scale package (CSP), which is not significantly larger than the semiconductor light emitting chip 101. The semiconductor light emitting device 100 may include a surface mount device (SMD) that directly exposes the first electrode 80 and the second electrode 70 to the lower side and directly mounts (e.g., COB) It has a very efficient structure.

8 and 9 are views for explaining another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure. Referring to FIG. 8, a dam 301 is placed on a base 201, 101 are placed on the base 201 exposed to the openings 305 of the dam 301. The side surface 307 due to the opening 305 of the dam 301 is an inclined surface inclined with respect to the base 201. The inclined surface may be flat, but the inclined surface is concave in this example. After the second encapsulant 190 is formed and cured in the opening 305, the assembly of the semiconductor light emitting chip 101 and the second encapsulant 190 is separated from the dam 301 and the base 201 Separated. Since the side surface of the second encapsulant 190 is formed along the shape of the side surface 307 of the dam 301, it is formed to be slightly convex as shown in Fig. 8D.

9, a dam 301 is provided on the base 201 again, and the coupling body is placed in the opening 305 of the dam 301. As shown in Fig. White resin or a light reflecting material is supplied between the side surface 307 of the dam 301 and the first encapsulant 180 to form the wall 170. The upper end 173 of the wall 170 has a shape raised by surface tension. Thereafter, the wall 170 is cured, and the first encapsulant 180 is formed in the cavity formed by the upper end 173 of the wall 170 and the second encapsulant 190. Next, a combination of the semiconductor light emitting chip 101, the first encapsulant 180, and the second encapsulant 190 is separated from the dam 301. The inner surface 172 of the wall 170 may be concave because it contacts the side surface of the second encapsulant 190. Therefore, the side surface 172 and the top surface 173 of the wall 170 have a shape favorable for upward reflection of light, and the light reflected internally in the first encapsulant 180 and the second encapsulant 190 This can be better escaped to the outside.

10 and 11 are diagrams for explaining an example of a method of providing a semiconductor light emitting chip on a base using a dam. In the method of manufacturing a semiconductor light emitting device, first, an opening 305 is formed on a base 201 And a dam 301 (mask) formed thereon. The base 201 may be a flexible tape, a film, or a rigid plate. The dam 301 may be made of Al, Cu, Ag, Cu-Al alloy, Cu-Ag alloy, Cu-Au alloy or SUS (stainless steel) It is possible. The dam 301 may be a non-metal, for example, plastic may be used, and various colors or light reflectance may be selected. The openings 305 formed in the dam 301 can be variously changed. The opening 305 may be formed as a square having no substantial difference in width and height, as shown in FIG. 10A, or may be formed long as shown in FIG. 10B. 10C, the semiconductor light emitting chips 101 may be placed one by one in each opening 305, or a plurality of semiconductor light emitting chips 101 may be provided in one opening 305 as shown in FIGS. 10B and 10D Can be placed. When the semiconductor light emitting chip 101 is placed on the base 201, a hole 309 may be formed in the dam 301 to guide the position of the semiconductor light emitting chip 101 (see FIGS. 10B and 10D).

The base 201 itself can be adhered to the dam 301 as a tape having adhesiveness or adhesiveness. Alternatively, as shown in Figs. 11A and 11B, the base 201 and the dam 301 can be easily brought into contact with and separated from each other by an external force by using the clamp 503.

11C, the element transferring apparatus 501 picks up each semiconductor light emitting chip 101 on the fixing portion 13 (e.g., tape) by electro-absorption or vacuum adsorption, up onto the base 201 exposed to the opening 305 of the dam 301, as shown in Fig. 11D. The element transferring apparatus 501 can recognize the vacant space 14 and pick up the semiconductor light emitting chip 101 at the next position. As an example of the device transferring apparatus 501, a device capable of recognizing a pattern or a shape and correcting the position to be transferred or the angle of the object, similar to the die bonder, may be used irrespective of the name.

For example, the base 201 and the dam 301 may be made of a material or a color or may be processed so as to have a difference in light reflectance, and the element transferring apparatus 501 may be constructed using a camera or an optical sensor, It is possible to detect the difference in light and darkness between the dam 301 and the base 201 and the difference in light reflectance or the difference in reflected light or to detect the pattern (e.g., electrode separation line), the opening 305 and / 309 can be recognized. This allows the element transferring apparatus 501 to correct the position or angle on the base 201 exposed to the opening 305 as shown in Fig. 10C or Fig. 10D, and the dam 301, due to the opening 305, The semiconductor light emitting chip 101 may be placed at a position on the base 201 corresponding to the distance or coordinate indicated from at least one of the face, edge, and point.

12 is a view for explaining still another example of the semiconductor light emitting device according to the present disclosure, in which the second encapsulant 190 contains a phosphor and the first encapsulant 180 contains no fluorescent material 12a, 12b) can be considered. When the semiconductor light emitting chip 101 is a blue chip, the phosphor can be selected to produce white light. White light can enter the first encapsulant 180 due to the fluorescent material in the second encapsulant 190 and light is emitted without scattering of light by the fluorescent material in the first encapsulant 180. In FIG. The amount of light extraction can be improved due to the special shape of the top 173 of the wall 170 as described. On the other hand, an example in which the first encapsulant 180 contains a fluorescent substance and the second encapsulant 190 does not contain a fluorescent substance (see Figs. 12C and 12D) can be considered. In this case, there is no light scattering due to the phosphor near the side surface 172 of the wall 170 close to the semiconductor light emitting chip 101, so that light absorption loss due to the wall 170 is reduced. Of course, the first encapsulant 180 and the second encapsulant 190 both contain fluorescent materials.

As another example, the first conductive portion 141 and the second conductive portion 142, which are in contact with the exposed first electrode 80 and the second electrode 70, respectively, may contact the second encapsulant 190 and / (See FIG. 12E), or the joining portion 145 separated from the first electrode 80 and the second electrode 70 is formed on the lower surface of the wall 170, (See Fig. 12F).

Fig. 13 is a view for explaining still another example of the semiconductor light emitting device according to the present disclosure. As shown in Fig. 13A, a flip chip type functional device 401 is provided between a dam 301 and a semiconductor light emitting chip 101, And a wall 170 may be formed. It is also possible to consider an example in which the electrode of the functional element 401 is exposed and the functional element 401 is embedded in the wall 170. The functional element 401 is a protecting element (e.g., zener diode) that protects the semiconductor light emitting chip 101 from, for example, ESD (Electro Static Discharge) and / or EOS (Electrical Over-Stress). On the other hand, as shown in Fig. 13B, it is also possible to consider an example in which the cut dam 301 is stuck to the wall 170. Fig. 13C and 13D, the upper end 173 of the wall 170 is formed by surface tension. Depending on the material of the wall 170 and the material of the dam 301 and the material of the sealing material, It is also possible for the upper end 173 of the wall 170 to have a convex shape. In Fig. 13C wall 170 is cut so that the example shown in Fig. 13D can be manufactured. As another example, an example in which the wall 170 is removed (see Figs. 13E and 13F) can also be considered. For example, the wall 170 remains in the dam 301 when detached from the dam 301, and the semiconductor light emitting chip 101, the first encapsulant 180, and the second encapsulant 190, Can be separated from the wall 170. The boundary between the first encapsulant 180 and the second encapsulant 190 may be eliminated when the first encapsulant 180 and the second encapsulant 190 are the same material (see FIG. 13E). On the other hand, the reflective film 130 can be further formed on the side surface of the first encapsulant 180, the side surface and the bottom surface of the second encapsulant 190, and the lower surface of the semiconductor light emitting chip 101 (see FIG. 13F)

Fig. 14 is a view for explaining another example of the semiconductor light emitting device according to the present disclosure. For example, a plurality of semiconductor light emitting chips 101 are arranged in an opening 305 of a dam 301 as shown in Fig. And each semiconductor light emitting chip 101 is surrounded by the second encapsulant 190. Thereafter, a wall 170 is formed and after the first encapsulant 180 is formed, the base 201 is removed and the conductive parts 141 and 142 (see Fig. 14A) or the joint 145 (Figs. 14B and 14C) . Thereafter, the semiconductor light emitting device 100 is pulled out from the dam 301 (see Fig. 6C) or the wall 170 is cut as shown in Fig. 14B, whereby the semiconductor light emitting device 100 shown in Fig. 14C can be manufactured. The semiconductor light emitting device 100 can be manufactured by bonding the conductive portions 141 and 142 to the conductive patterns 511 and 512 formed on the substrate 500 Respectively, to the conductive patterns 511 and 512 and the fixing portion 513 of the base 200 by eutectic bonding or the like (see FIG. 14C).

Various embodiments of the present disclosure will be described below.

(1) A semiconductor light emitting device comprising: a semiconductor light emitting chip having a plurality of semiconductor layers which generate light by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers; A wall positioned around a semiconductor light emitting chip, comprising: a wall having an upper surface elevated by surface tension; A first encapsulant formed in a cavity formed by the top of the cover wall to cover the semiconductor light emitting chip; And a second encapsulant interposed between at least the wall and the semiconductor light emitting chip.

(2) The semiconductor light emitting device according to (1), wherein at least one of the first encapsulant and the second encapsulant is made of a transparent material containing no phosphor.

(3) The semiconductor light emitting device according to (1), wherein the refractive index of the first encapsulant is different from the refractive index of the second encapsulant.

(4) The second encapsulant is formed so as to cover at least the upper surface facing the lower surface of the semiconductor light emitting chip with the electrode formed thereon, and the side surface of the semiconductor light emitting chip, and the first encapsulant is formed in the cavity formed by the upper end of the wall and the second encapsulant Wherein the semiconductor light emitting device is a semiconductor light emitting device.

(5) the plurality of semiconductor layers include: a first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; And an active layer interposed between the first semiconductor layer and the second semiconductor layer and generating light by recombination of electrons and holes, and further includes an electrode, and the electrode and the additional electrode are formed of a plurality of semiconductor layers Wherein one of the electrode and one of the additional electrodes supplies one of electrons and holes to the first semiconductor layer and the other one of the electrodes and the additional electrode is located on the opposite side of the first semiconductor layer with respect to the first semiconductor layer, And the second encapsulant surrounds the semiconductor light emitting chip so as to expose the electrode and the additional electrode.

The electrode corresponds to the first electrode in the above description, and the additional electrode may correspond to the second electrode in the above description. Conversely, the electrode corresponds to the second electrode in the above description, and the additional electrode may correspond to the first electrode in the above description.

(6) The upper end of the wall is higher in height at the outer end than at the side of the second encapsulant.

(7) The wall is formed so as to cover the lower surface of the second encapsulant in the vicinity of the electrode.

(8) The wall is formed so as to cover the bottom surface of the semiconductor light emitting chip excluding the electrode and the additional electrode, and the lower surface of the second sealing material.

(9) A semiconductor light emitting chip having a plurality of semiconductor layers and electrodes electrically connected to a plurality of semiconductor layers on a base exposed by a dam and an opening formed on a base, A semiconductor light emitting device manufactured by forming a wall having an upper end raised by a tensile force, the semiconductor light emitting device comprising: a plurality of semiconductor layers that generate light by recombination of electrons and holes; and a semiconductor light emitting device having electrodes electrically connected to the plurality of semiconductor layers A semiconductor light emitting chip; An encapsulating material formed between the wall and the semiconductor light emitting chip, and an upper surface of the semiconductor light emitting chip; And an additional encapsulant formed integrally with the encapsulant at the opposite side of the electrode, the encapsulant having a side joined to the encapsulant. The outer side of the side surface of the side surface of the sealing material is higher than the electrode side. The side surface is formed along the shape of the top of the wall elevated by the surface tension and has a convex side And an encapsulating material of the semiconductor light emitting device.

The sealing material corresponds to the second sealing material in the above description, and the additional sealing material can correspond to the first sealing material in the above description.

(10) The semiconductor light emitting device according to (10), wherein the upper end of the side surface of the sealing material is formed to be farther from the semiconductor light emitting chip than the lower end of the side surface of the sealing material.

(11) A method of manufacturing a semiconductor light emitting device, comprising: providing a semiconductor light emitting chip on a base exposed through a dam and an opening, the semiconductor light emitting device comprising: a plurality of semiconductor layers And a semiconductor light emitting chip having an electrode electrically connected to the plurality of semiconductor layers; Forming a wall between the side of the dam and the semiconductor light emitting chip, wherein the top of the wall is elevated along the side of the dam by surface tension, and at least the top of the wall forms a wall away from the semiconductor light emitting chip ; And forming a first encapsulant in a cavity formed by the top of the cover to cover the semiconductor light emitting chip.

(12) In the step of providing the semiconductor light emitting chip in the opening, the semiconductor light emitting chip having the second sealing material surrounding the semiconductor light emitting chip is provided in the opening. In the step of forming the wall, And the second electrode is formed between the first electrode and the second electrode.

(13) A method of manufacturing a semiconductor light emitting device, wherein at least one of the first encapsulant and the second encapsulant is made of a transparent material containing no phosphor.

(14) the plurality of semiconductor layers include: a first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; And an active layer interposed between the first semiconductor layer and the second semiconductor layer and generating light by recombination of electrons and holes, and further includes an electrode, and the electrode and the additional electrode are formed of a plurality of semiconductor layers Wherein one of the electrode and one of the additional electrodes supplies one of electrons and holes to the first semiconductor layer and the other one of the electrodes and the additional electrode is located on the opposite side of the first semiconductor layer with respect to the first semiconductor layer, Wherein the step of supplying the remaining one of the holes and the step of providing the semiconductor light emitting chip in the opening comprises placing the electrode and the additional electrode facing the base.

(15) In the step of forming the wall, a wall is formed so as to cover the lower surface of the second encapsulant, the material forming the wall extending between the base and the lower surface of the second encapsulant.

(16) In the step of forming the wall, the top of the wall rises by the surface tension along the side of the dam and the second sealing material, and the wall is formed so that the outer end of the wall is higher in height than the side of the second sealing material Wherein the semiconductor light emitting device is a semiconductor light emitting device.

(17) Before the step of providing the semiconductor light emitting chip to the opening, the semiconductor light emitting chip is provided on the additional base, with the additional dam formed with the opening and the additional base exposed with the opening; Forming a second encapsulant in the opening of the further dam to cover the semiconductor light emitting chip; And separating the semiconductor light emitting chip and the second encapsulant from the additional dam and the base.

(18) a step of removing the base and forming a reflective film on the lower surface of the second encapsulant before the step of forming the second encapsulant; Removing the base and partially etching the lower surface of the second encapsulant; And at least one of the first electrode and the second electrode.

(19) A method of manufacturing a semiconductor light emitting device, comprising: separating a semiconductor light emitting chip, a first encapsulant, a wall, and a second encapsulant from a dam with a sieve.

(20) separating the semiconductor light emitting chip, the first encapsulant, and the second encapsulant from the wall and the dam with a sieve coupled thereto.

According to one semiconductor light emitting device and a method of manufacturing the same according to the present disclosure, an encapsulation material is interposed between the semiconductor light emitting chip and the wall to reduce light absorption loss, and the light extraction efficiency is improved due to the special shape of the upper end of the wall.

According to another semiconductor light emitting device and a method of manufacturing the same according to the present disclosure, at least one of the first encapsulation part and the second encapsulation part does not contain a fluorescent material, so that light absorption loss due to the wall can be reduced.

100: Semiconductor light emitting device 101: Semiconductor light emitting chip 170: Wall
180: first encapsulant 190: second encapsulant 80, 70: electrode

Claims (20)

In the semiconductor light emitting device,
A semiconductor light emitting chip having a plurality of semiconductor layers which generate light by recombination of electrons and holes and electrodes electrically connected to the plurality of semiconductor layers, the semiconductor light emitting chip being a flip chip, ;
A wall positioned around a semiconductor light emitting chip, comprising: a wall having an upper surface elevated by surface tension;
A first encapsulant formed in a cavity formed by the top of the cover wall to cover the semiconductor light emitting chip; And
And a second encapsulant interposed between at least the wall and the semiconductor light emitting chip,
Wherein the first encapsulant is formed in the cavity formed by the upper end of the wall and the second encapsulant.
The method according to claim 1,
Wherein at least one of the first encapsulant and the second encapsulant is made of a transparent material containing no phosphor.
The method according to claim 1,
Wherein the refractive index of the first encapsulant is different from the refractive index of the second encapsulant.
The method according to claim 1,
Wherein the second encapsulant is formed so as to cover at least an upper surface opposite to a lower surface of the semiconductor light emitting chip where the electrode is formed, and a side surface of the semiconductor light emitting chip.
The method according to claim 1,
The plurality of semiconductor layers include:
A first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; And an active layer interposed between the first semiconductor layer and the second semiconductor layer and generating light by recombination of electrons and holes,
Wherein the electrode and the further electrode are located on the opposite side of the first encapsulant with respect to the plurality of semiconductor layers,
One of the electrode and the additional electrode supplies one of electrons and holes to the first semiconductor layer and the other of the electrode and the additional electrode supplies the other of the electrons and holes to the second semiconductor layer,
And the second encapsulant surrounds the semiconductor light emitting chip so as to expose the electrode and the additional electrode.
The method according to claim 1,
Wherein an upper end of the wall is higher in height than an end of the second encapsulant.
The method according to claim 1,
And the wall is formed so as to cover the lower surface of the second encapsulant in the vicinity of the electrode.
The method of claim 5,
Wherein the wall is formed so as to cover the bottom surface of the semiconductor light emitting chip excluding the electrode and the additional electrode, and the bottom surface of the second encapsulant.
And a semiconductor light emitting chip having a plurality of semiconductor layers and an electrode electrically connected to the plurality of semiconductor layers on a base exposed by the opening, wherein the semiconductor light emitting chip is provided between the side surface of the dam and the semiconductor light emitting chip by surface tension A semiconductor light emitting device manufactured by forming a wall having a raised upper end,
A semiconductor light emitting chip having a plurality of semiconductor layers which generate light by recombination of electrons and holes, and electrodes electrically connected to the plurality of semiconductor layers;
An encapsulating material formed between the wall and the semiconductor light emitting chip, and an upper surface of the semiconductor light emitting chip; And
An additional encapsulant formed integrally with the encapsulant at an opposite side of the electrode, the encapsulant having a side joined to the encapsulant. The outer side of the side surface of the side surface of the sealing material is higher than the electrode side. The side surface is formed along the shape of the top of the wall elevated by the surface tension, And an encapsulating material of the semiconductor light emitting device.
The method of claim 9,
And the upper end of the side surface of the encapsulant is formed to be farther from the semiconductor light emitting chip than the lower end of the side surface of the encapsulant.
A method of manufacturing a semiconductor light emitting device,
A method of manufacturing a semiconductor light emitting device, the method comprising: providing a semiconductor light emitting chip, which is a flip chip, on a base exposed through a dam and an opening formed on a base, the semiconductor light emitting chip including a plurality of semiconductor layers that generate light by recombination of electrons and holes, Providing a semiconductor light emitting chip in the opening having an electrode electrically connected to the layer;
Forming a wall between the side of the dam and the semiconductor light emitting chip, wherein the top of the wall is elevated along the side of the dam by surface tension, and at least the top of the wall forms a wall away from the semiconductor light emitting chip ; And
And forming a first encapsulant in a cavity formed by the top of the cover wall to cover the semiconductor light emitting chip,
In the step of providing the semiconductor light emitting chip to the opening,
A semiconductor light emitting chip having a second encapsulation material surrounding the semiconductor light emitting chip is provided in the opening,
Wherein the first encapsulant is formed in the cavity formed by the upper end of the wall and the second encapsulant.
The method of claim 11,
Wherein the wall is formed between the side surface of the dam and the second encapsulation material in the step of forming the wall.
The method of claim 12,
Wherein at least one of the first encapsulant and the second encapsulant is made of a transparent material containing no phosphor.
The method of claim 11,
The plurality of semiconductor layers include:
A first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; And an active layer interposed between the first semiconductor layer and the second semiconductor layer and generating light by recombination of electrons and holes,
Wherein the electrode and the further electrode are located on the opposite side of the first encapsulant with respect to the plurality of semiconductor layers,
One of the electrode and the additional electrode supplies one of electrons and holes to the first semiconductor layer and the other of the electrode and the additional electrode supplies the other of the electrons and holes to the second semiconductor layer,
Wherein the step of providing the semiconductor light emitting chip in the opening comprises placing the electrode and the additional electrode facing the base.
The method of claim 12,
In the step of forming the wall,
Wherein a wall is formed so as to fill the space between the base and the lower surface of the second encapsulant and to cover the lower surface of the second encapsulant.
The method of claim 12,
In the step of forming the wall,
Wherein the top of the wall is raised by the surface tension along the sides of the dam and the second encapsulant and the wall is formed so that the outer end of the wall is higher in height than the side of the second encapsulant.
The method of claim 12,
Before the step of providing the semiconductor light emitting chip to the opening,
Providing a semiconductor light emitting chip on an additional base, with an additional dam formed with an opening, and an additional base exposed with the opening;
Forming a second encapsulant in the opening of the further dam to cover the semiconductor light emitting chip; And
And separating the semiconductor light emitting chip and the second encapsulant from the additional dam and the base.
18. The method of claim 17,
After the step of forming the second encapsulant, before the separating step,
Removing the base and forming a reflective film on the lower surface of the second encapsulant; And
Removing the base and partially etching the lower surface of the second encapsulant; And at least one of the first electrode and the second electrode.
The method of claim 12,
And separating the semiconductor light emitting chip, the first encapsulant, the wall, and the second encapsulant from the dam with a sieve.
The method of claim 12,
And separating the semiconductor light emitting chip, the first encapsulation material, and the second encapsulation material from the dam, the wall, and the sieve.
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