KR101684801B1 - Method AND APPARATUS for SIGMA-TRACKING EYE-OPENING MONITOR FOR BER-OPTIMAL BACKGROUND ADAPTIVE EQUALIZATION - Google Patents

Method AND APPARATUS for SIGMA-TRACKING EYE-OPENING MONITOR FOR BER-OPTIMAL BACKGROUND ADAPTIVE EQUALIZATION Download PDF

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KR101684801B1
KR101684801B1 KR1020150141418A KR20150141418A KR101684801B1 KR 101684801 B1 KR101684801 B1 KR 101684801B1 KR 1020150141418 A KR1020150141418 A KR 1020150141418A KR 20150141418 A KR20150141418 A KR 20150141418A KR 101684801 B1 KR101684801 B1 KR 101684801B1
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eye diagram
sigma
rti
sampler
decision
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KR1020150141418A
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Korean (ko)
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배현민
원효섭
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한국과학기술원
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03267—Operation with other circuitry for removing intersymbol interference with decision feedback equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception

Abstract

A sigma tracking eye diagram monitoring method is presented. The sigma tracking eye diagram monitoring method proposed in the present invention finds decision thresholds of two different positions that are separated by standard deviation with respect to voltage levels at two different positions using a feedback loop, Determining an optimal sampling clock phase using a difference between decision thresholds at the two different positions for each sampling phase; and determining the optimal sampling clock phase using the sigma tracking eye diagram monitoring method When the reference sampler is operated in a data sampler, generates a phase update information on behalf of a data sampler for a predetermined period of time, the reference sampler senses an amount of change of an optimum sampling point in real time in the background, To the data sampler Minus comprises a step.

Figure R1020150141418

Description

METHOD AND APPARATUS FOR MONITORING SIGMA TRACKING EYE-OPENING MONITOR FOR SIGMA TRACKING EYE DIAGRAM FOR DETERMINING OPTIMAL BIT ERROR RATE AND REAL-TIME ADAPTIVE EQUALIZATION

The present invention relates to a sigma tracking eye diagram monitoring method and apparatus for optimal bit error rate and real time adaptive equalization.

Frequency dependent loss due to dielectric loss and skin effect in the conductor channel induces inter-symbol interference (ISI). Adaptive equalizers based on CTLE (Continuous Time Linear Equalizer) or DFE (Decision Feedback Equalizer) are mainly used for compensation of frequency dependent loss in RX. Among the methods of the adaptive equalizer, the sign-sign least mean square (LMS) algorithm is mainly used because of its simple implementation. However, this algorithm has problems with potential instability and inaccurate convergence values due to non-idealities and modeling deficiencies that exist in actual implementation. As an example of an improved sign-sign LMS algorithm, a bit error rate (BER) -based coefficient adaptation is performed using a method of maximizing the voltage margin. However, this algorithm has a problem that can not be applied to adapt the coefficients of the loop-unrolled DFE. The histogram method is also a coefficient adaptation method based on an eye-opening monitor (EOM), but an optimum sampling point for minimizing a bit error rate (BER) can not be determined. The method of finding the maximum margin point can minimize the BER, but the memory size is too large to implement on a chip.

SUMMARY OF THE INVENTION The present invention is directed to a sigma-tracking eye-opening monitor (SSEOM) for optimal bit error rate and real-time adaptive equalization that can be implemented on a chip. , A coefficient of each continuous time linear equalizer (CTLE) and a decision feedback equalizer (DFE), and a method for finding an optimum sample point.

In one aspect, a sigma tracking eye diagram monitoring method proposed by the present invention finds decision thresholds at two different positions that are separated by standard deviation with respect to voltage levels at two different positions using feedback loops, Determining an optimum sampling clock phase using a difference between decision thresholds at the two different positions for each sampling phase, determining an optimal sampling clock phase for each of the sampling phases, When the eye diagram monitoring method is operated in the data sampler, the reference sampler generates phase update information on behalf of the data sampler for a period of time, the reference sampler senses the change amount of the optimum sampling point in real time in the background, To the current operating state To the data sampler.

Wherein the optimal decision threshold is determined by decision thresholds of the two different positions and a probability distribution function of the input data, and a clock phase at which the difference between the decision thresholds at the two different positions is the maximum, Clock phase.

And corrects the analog front-end, the data sampler, the reference sampler, and the DC offset using the optimal decision threshold.

And corrects the mismatch of the multi-phase clock using the optimum sampling clock phase.

According to another aspect of the present invention, there is provided a method for monitoring a sigma tracking eye diagram in which a feedback loop is used to calculate a determination threshold value of two different pairs of positions separated by standard deviations based on voltage levels of two different pairs of positions Finding the intermediate point of the decision thresholds of each of the two different pairs of positions as optimal decision thresholds, using the difference of the decision thresholds of the two different pairs of positions for each sampling phase Determining the best sampling clock phases, generating a phase update information on behalf of the data sampler for a period of time when the sigma tracking eye diagram monitoring method is operated in a data sampler, determining, using the feedback loop, Applying a feedback equalizer adaptation method, Real-time, based on the sampler to detect the amount of change of the optimal sampling point, and a step of reflecting the detected amount of change in the currently active data sampler.

Wherein applying the decision feedback equalizer adaptation method using the feedback loop comprises determining an optimal decision threshold and a decision feedback equalizer efficiency of the two samplers and using a sigma tracking eye diagram monitor that takes into account all the taps in case of two- And applies the decision feedback equalizer adaptation method.

According to another aspect of the present invention, a method for monitoring a sigma tracking eye diagram according to the present invention is characterized by using a feedback loop to find decision thresholds at two different positions that are separated by a standard deviation based on voltage levels at two different positions, Determining an intermediate point of decision thresholds at two different positions as an optimal decision threshold, determining an optimal sampling clock phase using a difference between decision thresholds at two different positions for each sampling phase, Applying a continuous time linear equalizer adaptation method using the feedback loop when the reference sampler generates phase update information on behalf of a data sampler for a period of time when the sigma tracking eye diagram monitoring method is operated in a data sampler, Baseline samples in real time in the background Detecting an amount of change in the optimum sampling point, and a step of reflecting the detected amount of change in the currently active data sampler.

In applying the continuous-time linear equalizer adaptation method using the feedback loop, the size of the eye diagram obtained in each sampling clock phase step is accumulated to obtain an equivalent eye diagram area.

The continuous time linear equalizer boosting gain that maximizes the equivalent eye diagram area is determined as the optimal boosting gain.

When there is a crystal decision feedback equalizer at the rear end of the continuous time linear equalizer, the continuous time linear equalizer gain maximizing the eye diagram area of the pattern filtered eye diagram is determined as the optimum boosting gain.

In another aspect, the sigma tracking eye diagram monitoring apparatus proposed in the present invention finds decision thresholds at two different positions that are separated by standard deviation with respect to voltage levels at two different positions using a feedback loop, A decision threshold decision unit for deciding an optimal decision threshold value at an intermediate point between decision thresholds at two different positions; an optimum sampling clock phase using a difference between decision thresholds at the two different positions for each sampling phase A reference sampler for generating phase update information on behalf of the data sampler for a predetermined period when the data sampler of the sigma tracking eye diagram monitoring apparatus operates; Equalizer to apply adaptive method, back And an update unit for sensing the variation of the optimum sampling point in the ground in real time and reflecting the detected variation to the currently operating data sampler.

Wherein the decision threshold value determiner determines the optimum decision threshold value by using decision thresholds of the two different positions and a probability distribution function of the input data, and by using the optimum decision threshold value, The data sampler, the reference sampler and the DC offset.

Wherein the sampling clock phase determination section determines the clock phase at which the difference between the decision thresholds at the two different positions is the maximum at the optimum sampling clock phase and uses the optimum sampling clock phase to determine a mismatch of the multi- .

The equalizer determines the optimal decision threshold of two samplers and the decision feedback equalizer efficiency and applies the decision feedback equalizer adaptation method using a sigma tracking eye diagram monitor that takes into account all the taps in case of two or more taps.

The equalizer accumulates all sizes of the eye diagram obtained in each sampling clock phase to obtain an equivalent eye diagram area, and determines a continuous time linear equalizer boosting gain that maximizes the equivalent eye diagram area as an optimal boosting gain.

The equalizer determines a continuous time linear equalizer gain that maximizes an eye diagram area of a pattern filtered eye diagram as an optimal boosting gain when a crystal decision feedback equalizer is provided at the rear end of the equalizer.

According to embodiments of the present invention, additional samplers are used to detect changes in temperature and supply, and the variation is applied to each data sampler to enable real-time tracking. Due to the high computational efficiency of SSEOM itself, it can be implemented in a small area on the chip, and there is no need for an additional microcontroller, and it has a very short operation time.

1 is a diagram illustrating an algorithm of an SSEOM according to an embodiment of the present invention.
2 is a diagram illustrating a feedback loop of SSEOM according to an embodiment of the present invention.
3 is a flowchart illustrating a sigma tracking eye diagram monitoring method according to an exemplary embodiment of the present invention.
4 is a diagram illustrating a configuration of a sigma tracking eye diagram monitoring system according to an exemplary embodiment of the present invention.
5 is a diagram illustrating an algorithm measurement result of SSEOM according to an embodiment of the present invention.
6 is a diagram illustrating an SSEOM algorithm for DFE adaptation according to an embodiment of the present invention.
7 is a diagram illustrating a feedback loop of SSEOM for DFE adaptation according to an embodiment of the present invention.
FIG. 8 is a diagram illustrating a result of SSEOM algorithm measurement for DFE adaptation according to an embodiment of the present invention.
9 is a diagram illustrating an SSEOM algorithm applied to a PAM 4 according to an embodiment of the present invention.
10 is a diagram illustrating an SSEOM algorithm for DFE adaptation of PAM4 according to an embodiment of the present invention.
11 is a diagram illustrating CTLE adaptation using SSEOM according to an embodiment of the present invention.
12 is a diagram illustrating an RX architecture in accordance with one embodiment of the present invention.
13 is a diagram illustrating a background calibration according to an embodiment of the present invention.
FIG. 14 is a view showing a CTLE adaptive measurement result according to an embodiment of the present invention.
FIG. 15 is a diagram showing a CTLE adaptive measurement result according to an embodiment of the present invention. FIG.

The present invention relates to a sigma-tracking eye-opening monitor (SSEOM) for an optimal bit error rate and real-time adaptive equalization that can be implemented on a chip, continuous time linear equalizer (DFE) and decision feedback equalizer (DFE), and finds the optimal sample point. Additional samplers are used to detect changes in temperature and supply, and apply the variation to each data sampler to enable real-time tracking. Due to the high computational efficiency of SSEOM itself, it can be implemented in a small area on the chip, and there is no need for an additional microcontroller, and it has a very short operation time. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating an algorithm of an SSEOM according to an embodiment of the present invention.

The voltage levels of '1 (111)' and '0 (112)' of the binary data are set to +1 and -1 respectively and the appearance probability of '1 (111)' and '0 It is assumed that an AWGN (Additive White Gaussian Noise) with exactly the same value and a mean value of 0 and a variance of σ 2 is added. Then, a PDF (probability distribution function) 120 and a cumulative distribution function (CDF) 130 of the binary data as shown in FIG. 1 can be drawn. In the DC guaranteed link, since the appearance probabilities of binary data '1 (111)' and '0 (112)' are the same, in each situation where the decision threshold is optimal, (111) 'and' 0 (112) 'are all the same. Therefore, when the target bit error rate (BER) is very low, there is a problem of counting a very large number of samples in order to find the optimal decision threshold.

The proposed SSM (sigma-tracking eye-opening monitor) method finds two positions (B 1 and B 0 ) that are separated by a standard deviation 기준 based on the voltage level +1 and -1, The optimal decision threshold is set as a threshold value. For example, at these two positions, the BER is about 7.9E-2, and the probability of '1' is about 0.42 and 0.58, respectively. If these decision threshold positions are B 1 and B 0 , then W = B 1 -B 0 is the effective size W of the current input signal eye-opening, B 1 + B 0 ) / 2 can be defined as an optimal decision threshold. Also, the area A of the equivalent eye-opening can be obtained by accumulating all of the effective size W obtained by sweeping the sampling clock phase and obtaining each phase. In addition, the optimal sampling clock phase Φ can be determined using the W value obtained for each phase. In the simplest method, the clock phase at which W becomes maximum can be defined as the optimal clock phase.

2 is a diagram illustrating a feedback loop of SSEOM according to an embodiment of the present invention.

The algorithm for finding the positions of B1 and B0 can be configured as a feedback loop simply as shown in FIG. A comparator 210 accumulates the output value obtained by sampling input data on the basis of the current decision threshold value N S times in the counter 220 and outputs the number of 1's If it is obtained, the probability of '1' is known. If it is higher than the predetermined reference probability value of 0.42, the decision threshold shifts upward. If it is lower than 0.42, it moves to the opposite side. When this method is repeated, the decision threshold eventually converges to B 1 . The position of B 0 can be found by changing the reference probability value to 0.58 in the same way.

3 is a flowchart illustrating a sigma tracking eye diagram monitoring method according to an exemplary embodiment of the present invention.

The sigma tracking eye diagram monitoring method uses a feedback loop to find decision thresholds at two different positions that are separated by standard deviations based on the voltage levels at two different positions and determine the midpoints of the decision thresholds at the two different positions Determining (310) an optimal determination threshold value for each sampling phase, determining (320) an optimal sampling clock phase using a difference between the determination thresholds of the two different positions for each sampling phase, (330) for generating a phase update information on behalf of a data sampler for a period of time when the method is operating in a data sampler, wherein the reference sampler senses the amount of change of the best sampling point in real time in the background, To the data sampler currently operating It may include a system 340.

Step 310 finds decision thresholds at two different positions that are separated by a standard deviation based on voltage levels at two different positions using a feedback loop and determines the midpoint of the decision thresholds at the two different positions as optimal It is determined as a decision threshold value.

B 0 and B 1 refer to positions separated by a standard deviation σ based on the voltage levels at two different positions (for example, a probability of 0.42 / 0.58). Or 0.5σ (0.35 / 0.65 probability), 2σ (0.49 / 0.51 probability), and accordingly there is a trade-off of run time / accuracy. B 0 and B 1 can be found using the proposed feedback loop.

And, the equivalent eye-opening size W can be determined by B 1 , B 0 (for example, W = B 1 -B 0 ). The optimal decision threshold α can be determined by PDF of input data B 1 and B 0 (for example, α = (B 1 + B 0 ) / 2 for AWGN) to be).

In step 320, the optimal sampling clock phase is determined for each sampling phase using the difference of the decision thresholds at the two different positions.

The optimal sampling clock phase Φ can be determined using the Wi's obtained per clock phase (eg, the clock phase at the point where the maximum W i is Φ ).

The proposed method is applicable to communication for all pulse amplitude modulation (NRZ, PAM4, PAM8, etc.). The DC offset of the analog front-end and the sampler is also corrected by obtaining an optimal decision threshold alpha. The mismatch of the multi-phase clock is also corrected by obtaining the optimal sampling clock phase Φ.

In step 330, when the sigma tracking eye diagram monitoring method is operated in the data sampler, the reference sampler generates phase update information on behalf of the data sampler for a period of time. In other words, when the SSEOM is operated in a data sampler, the reference sampler temporarily stores the phase update information on behalf of the data sampler to prevent phase lock fail of the PLL. (phase update information).

In step 340, the reference sampler senses the variation of the optimal sampling point in the background in real time, and reflects the sensed variation to the currently operating data sampler.

The reference sampler senses the amount of change Δ of the optimal sampling point (voltage and time domain) in real time in the background and outputs this amount to the currently operating data sampler (Data sampler).

In another aspect, a sigma tracking eye diagram monitoring method includes: using a feedback loop to find decision thresholds of two different pairs of positions that are separated by a standard deviation based on voltage levels of two different pairs of positions, Determining an intermediate point between decision thresholds of each of the other two pairs of positions as optimal decision thresholds, determining an optimal sampling clock phase using the difference of the decision thresholds of the two different pairs of positions for each sampling phase Wherein the reference sampler generates phase update information on behalf of a data sampler for a period of time when the sigma tracking eye diagram monitoring method is operated in a data sampler, and wherein the feedback loop equalizer adaptation method Applied steps and criteria in real time in the background The plug is detected, the change in the optimum sampling point, and the detected amount of change may include the step of reflecting the data sampler currently active.

Here, the voltage levels at two pairs of positions mean four voltage levels. 5, if the impulse response of the channel is spread over two symbols, the voltage level in the eye-diagram of the binary data is four ('00 ( 514) ',' 10 (513) ', '01 (512)', '11 (511) '). In 'xy', x refers to the post-tap and y refers to the main-tap. 00 514 ', '10 513', '01 512', '11 511 'is exactly the same as each of the occurrence probability, and an average of 0 (mean) value and the change amount of the α 2 (variance ), It is possible to draw the PDF 520 and the CDF 530 of the binary data including the ISI as shown in FIG. 1-tap loop unrolled For DFE coefficient adaptation, we need to find sigma values that are pattern filtered for two different samplers. The eye-opening size and the optimal decision threshold are determined when the post-tap is '0' and when the 'post-tap' is '0'. If the decision threshold positions where the probability that the post-tap is '0' and the probability that the main-tap is '1' is 0.42 and 0.58 are B 01 and B 00 , It is possible to define α 0 = (B 01 + B 00 ) / 2 as the optimal decision threshold of the post-tap '0'. B 11 , B 10 , and α 1 are also defined when the post-tap is '1'.

The step of applying a decision feedback equalizer adaptation method using the feedback loop determines an optimal decision threshold of two samplers and a decision feedback equalizer efficiency. And, in case of 2-tap or more, the decision feedback equalizer adaptation method can be applied using a sigma tracking eye diagram monitor considering all taps.

In another aspect, a sigma tracking eye diagram monitoring method uses a feedback loop to find decision thresholds at two different positions that are separated by a standard deviation based on voltage levels at two different positions, Determining an optimal sampling clock phase using a difference between decision thresholds at the two different positions for each sampling phase, determining an optimal sampling clock phase for each of the sampling phases, Applying a continuous time linear equalizer adaptation method using the feedback loop when the monitoring method is operating in a data sampler, generating phase update information on behalf of the data sampler for a period of time, applying a continuous time linear equalizer adaptation method using the feedback loop, The sampler is the optimal sampling Detecting a change in the tree, and the detected amount of change may include the step of reflecting the data sampler currently active.

In applying the continuous-time linear equalizer adaptation method using the feedback loop, the size of the eye diagram obtained in each sampling clock phase step is accumulated to obtain an equivalent eye diagram area.

The continuous time linear equalizer boosting gain that maximizes the equivalent eye diagram area is determined as the optimal boosting gain.

When there is a crystal decision feedback equalizer at the rear end of the continuous time linear equalizer, the continuous time linear equalizer gain that maximizes the eye diagram area of the pattern filtered eye diagram is determined as the optimum boosting gain. The sigma tracking eye diagram monitoring method proposed by referring to Figs. 4 to 14 will be described in more detail.

4 is a diagram illustrating a configuration of a sigma tracking eye diagram monitoring system according to an exemplary embodiment of the present invention.

The sigma tracking eye diagram monitoring system 400 according to the present embodiment may include a processor 410, a bus 420, a network interface 430, a memory 440 and a database 450. The memory 440 may include an operating system 441 and a sigma tracking eye diagram monitoring routine 442. The processor 410 may include a decision threshold value determiner 411, a sampling clock phase determiner 412, a reference sampler 413, an equalizer 414, and an update unit 415. In other embodiments, the sigma tracking eye diagram monitor system 400 may include more components than the components of FIG. However, there is no need to clearly illustrate most prior art components. For example, the sigma tracking eye diagram monitor system 400 may include other components such as a display or a transceiver.

The memory 440 may be a computer-readable recording medium and may include a permanent mass storage device such as a random access memory (RAM), a read only memory (ROM), and a disk drive. The memory 440 may also store program code for the operating system 441 and the sigma tracking eye diagram monitoring routine 442. [ These software components may be loaded from a computer readable recording medium separate from the memory 440 using a drive mechanism (not shown). Such a computer-readable recording medium may include a computer-readable recording medium (not shown) such as a floppy drive, a disk, a tape, a DVD / CD-ROM drive, or a memory card. In other embodiments, the software components may be loaded into the memory 440 via the network interface 430 rather than from a computer readable recording medium.

The bus 420 may enable communication and data transfer between components of the sigma tracking eye diagram monitor system 400. [ The bus 420 may be configured using a high-speed serial bus, a parallel bus, a Storage Area Network (SAN), and / or any other suitable communication technology.

The network interface 430 may be a computer hardware component for connecting the sigma tracking eye diagram monitor system 400 to a computer network. The network interface 430 may connect the sigma tracking eye diagram monitor system 400 to a computer network via a wireless or wired connection.

The database 450 may be responsible for storing and maintaining all information required for sigma tracking eye diagram monitoring. In FIG. 4, the database 450 is built in the sigma tracking eye diagram monitor system 400. However, the present invention is not limited thereto and may be omitted depending on the system implementation method or environment, It is also possible that the database exists as an external database built on a separate, separate system.

The processor 410 may be configured to process instructions of a computer program by performing input / output operations of a basic arithmetic, logic, and sigma tracking eye diagram monitor system 400. The instructions may be provided by the memory 440 or network interface 430 and to the processor 410 via the bus 420. The processor 410 may be configured to execute program codes for the decision threshold value determiner 411, the sampling clock phase determiner 412, the reference sampler 413, the equalizer 414, and the update unit 415 . Such program code may be stored in a recording device, such as memory 440. [

The decision threshold value determiner 411, the sampling clock phase determiner 412, the reference sampler 413, the equalizer 414 and the update unit 415 are configured to perform the steps 310 to 340 of FIG. .

The sigma tracking eye diagram monitoring system 400 may include a decision threshold value determiner 411, a sampling clock phase determiner 412, a reference sampler 413, an equalizer 414, and an update unit 415.

The decision threshold value determiner 411 finds decision thresholds at two different positions that are separated by a standard deviation based on voltage levels at two different positions using a feedback loop, The point is determined as the optimal decision threshold.

The decision threshold value determiner 411 determines the optimum decision threshold value based on the decision thresholds of the two different positions and the probability distribution function of the input data. Then, the analog front-end, the data sampler, the reference sampler, and the DC offset are corrected using the optimal decision threshold value.

The sampling clock phase determination unit 412 determines the optimal sampling clock phase using the difference between the decision thresholds at the two different positions for each sampling phase.

The sampling clock phase determination unit 412 determines the clock phase at which the difference between the decision thresholds at two different positions becomes the maximum as the optimum sampling clock phase. Then, the mismatch of the multi-phase clock is corrected using the optimum sampling clock phase.

The proposed system is applicable to communication for all pulse amplitude modulation (NRZ, PAM4, PAM8, etc.). The DC offset of the analog front-end and the sampler is also corrected by obtaining an optimal decision threshold alpha. The mismatch of the multi-phase clock is also corrected by obtaining the optimal sampling clock phase Φ.

The reference sampler 413 generates phase update information on behalf of the data sampler for a period of time when the data sampler of the sigma tracking eye diagram monitoring system operates.

In other words, when the SSEOM is operated in a data sampler, the reference sampler temporarily stores the phase update information on behalf of the data sampler to prevent phase lock fail of the PLL. (phase update information).

Equalizer 414 applies a continuous time linear equalizer adaptation method using the feedback loop.

The equalizer 414 determines the optimal decision threshold of two samplers and the decision feedback equalizer efficiency and applies the decision feedback equalizer adaptation method using a sigma tracking eye diagram monitor that takes into account all taps in case of two or more taps.

The equalizer 414 accumulates all sizes of the eye diagram obtained in each sampling clock phase to obtain an equivalent eye diagram area and determines a continuous time linear equalizer boosting gain that maximizes the equivalent eye diagram area as an optimal boosting gain do.

When there is a crystal decision feedback equalizer at the rear end of the equalizer 414, the continuous time linear equalizer gain that maximizes the eye diagram area of the pattern filtered eye diagram is determined as the optimal boosting gain.

The update unit 415 detects the change amount of the optimum sampling point in the background in real time in the background, and reflects the detected change amount to the currently operating data sampler.

5 is a diagram illustrating an algorithm measurement result of SSEOM according to an embodiment of the present invention.

This is the result of the SSEOM using the feedback loop. 5 (a) is a diagram showing an eye diagram of the SSEOM algorithm measurement result. FIG. 5 (b) shows an equivalent eye-opening effective size Wi and an optimal sampling clock phase? In each sampling clock phase. 5C is a diagram showing a transient response of the feedback loop in an optimum sampling clock phase phi. FIG. 5 (d) is a graph showing a histogram of the optimal sampling point found after 1000 runs. At this time, N S was set to 2048. The resolution of the DC offset DAC and PI (phase interpolator) of the sampler is 7-bit each. The root-mean-square error (RMSE) of the converged B 1 and B 0 is 0.78 LSB. The RMSE of the voltage and time axes are 0.24 LSB and 1.46 LSB, respectively.

6 is a diagram illustrating an SSEOM algorithm for decision feedback equalizer (DFE) adaptation according to an embodiment of the present invention.

If the impulse response of the channel is spread over two symbols, the voltage level in the eye-diagram of the binary data is 4 cases ('00 (614)', '10 (613) ), '01 (612)', and '11 (611)'). In 'xy', x refers to the post-tap and y refers to the main-tap. 00 614 ', '10 613', '01 612', '11 611 'is exactly the same as each of the occurrence probability, and the amount of change in the average (mean) value of 0 and α 2 (variance ), The PDF 620 and the CDF 630 of the binary data including the ISI as shown in FIG. 6 can be drawn. 1-tap loop unrolled In order to adapt the coefficients of the DFE, we need to find the sig- nal of pattern filtered values for two different samplers. The eye-opening size and the optimal decision threshold are determined when the post-tap is '0' and when the 'post-tap' is '0'. If the decision threshold positions where the probability that the post-tap is '0' and the probability that the main-tap is '1' is 0.42 and 0.58 are B 01 and B 00 , It is possible to define α 0 = (B 01 + B 00 ) / 2 as the optimal decision threshold of the post-tap '0'. B 11 , B 10 , and α 1 are also defined when the post-tap is '1'.

7 is a diagram illustrating a feedback loop of SSEOM for DFE adaptation according to an embodiment of the present invention.

The decision thresholds B 00 , B 01 , B 10 , B 11 and α 0 and α 1 can be obtained by using the above-mentioned algorithm, and through the feedback loop configuration as shown in FIG. 7 It is easy to implement. 1-tap loop unrolled When utilizing the DFE structure, two comparators are used to pre-sample for post-tap '0' and '1'. At this time, setting the decision threshold of each comparator to α 0 and α 1 , which performs the optimal sampling, the DFE adaptation is completed, and additionally, an effective eye diagram the eye-opening size can also be obtained. SSEOM is also applicable to the direct feedback DFE scheme. The DFE Coefficient is (α 1 -α 0 ) / 2, since the α 1 -α 0 eventually represents the post-tap ISI amount of the current input signal, and the decision threshold of the sampler Decision threshold is (alpha 1 + alpha 0 ) / 2. In addition, SSEOM is scalable to DFE adaptation beyond 2-tap.

FIG. 8 is a diagram illustrating a result of SSEOM algorithm measurement for DFE adaptation according to an embodiment of the present invention.

FIG. 8 shows the results of the SSEOM measurement using the feedback loop. 8 (a) is an eye diagram of the SSEOM algorithm measurement result for DFE adaptation. 8 (b) is a diagram showing an equivalent eye diagram effective size Wi in each sampling clock phase and an optimum clock phase phi found. 8 (c) and 8 (d) are diagrams showing the pattern-filtered eye diagrams of the post-taps '0' and '1', respectively. Figures 8 (e) and 8 (f) are diagrams showing the transient response of the feedback loop at the optimal sampling clock phase Φ for each of the post-taps '0' and '1'.

The optimal sampling point corresponding to the two samplers of the DFE is obtained and the root mean-square error (RMSE) of the converged B 00 / B 01 / B 10 / B 11 is 0.78 LSB . Unlike the existing sign-sign LMS, the proposed SSEOM is a probability-based algorithm, so it can be operated very stably even if the post-tap value is high during the initial adaptation. Simulation results show that when the post-tap BER increases from 0 to 10 -2 , the mean value and variance of the optimal decision threshold are 0.5% and 2 % Of the total amount of water.

9 is a diagram illustrating an SSEOM algorithm applied to a PAM 4 according to an embodiment of the present invention.

The proposed SSEOM algorithm can be applied to PAM (Pulse Amplitude Modulation) such as PAM4 / PAM8. When the voltage levels are +1, +1/3, -1/3, and -1, respectively, when the binary data is defined as '10', '11', '01', and '00' The PDF and the CDF of FIG. Since the appearance probability of binary data '00', '01', '11', and '10' is the same in a DC balance guaranteed link, in a situation where a decision threshold is optimal, 00 ',' 01 ',' 11 ', and' 10 'are all the same. B 00 , B 01 , B 10 , B 11 , B 20 , and B 21, which indicate σ of each data, can be found by changing the reference probability using the feedback loop as shown in FIG. Corresponding equivalent eye-opening sizes W 0 , W 1 , W 2 and optimal decision thresholds α 0 , α 1 , α 2 can also be calculated.

10 is a diagram illustrating an SSEOM algorithm for DFE adaptation of PAM4 according to an embodiment of the present invention.

When the impulse response of the channel is spread over two symbols, the PDF of the received signal is as shown in FIG. 10, and the optimal decision threshold value α 00,0 , ... , α 10,2 can be found in the same way, respectively.

11 is a diagram illustrating a continuous time linear equalizer (CTLE) adaptation using SSEOM according to an embodiment of the present invention.

In general, CTLE adaptation is a method of finding the optimal boosting gain that maximizes the eye-opening area. The equivalent eye-opening area can be obtained by accumulating the eye-opening size W by moving the histogram method or the sampling clock phase. However, if there is a downstream DFE, the optimal boosting gain should be the gain taking this DFE into account and the area of the pattern filtered eye-opening seen in the DFE position You have to find the maximum gain. 11 is a diagram showing an area of an equivalent eye-opening, which is considered only when the post-tap is '0', for each boosting gain case. As can be seen from Fig. 11, it can be seen that the area of the eye-diagram which is not sufficiently compensated is larger than when the area of the eye-diagram is completely compensated. The remaining ISI can be fully compensated by the back DFE.

12 is a diagram illustrating an RX architecture in accordance with an embodiment of the present invention.

It shows the entire 28Gb / s RX architecture. It consists of quad-rate phase rotator based PLL, 2-stage CTLE, 1-tap loop unrolled DFE, 7bit PI, 8bit DAC and digitally synthesized SSEOM adaptation block. CTLE is a resistive and capacitive degeneration structure that allows for digital adjustment of DC gain and zero frequency. The sampler consists of 8-data, 1-edge, 1-reference comparators. A PI with 7-bit resolution and a DAC with 8-bit resolution are added for each comparator for each comparator. When the IC is turned on, the clock phase is locked by the PLL of the input signal, followed by the CTLE adaptation. A reference comparator determines the eye-opening area for each CTLE boosting gain step. After finding the optimal CTLE gain, each of the eight data samplers successively finds the optimal sampling phase and decision threshold with the SSEOM algorithm.

When the data samplers make corrections, incorrect values are output, which may result in erroneous phase update information and may cause unstable phase locking of the PLL. Therefore, in order to avoid such a disadvantage, the phase update information can be temporarily generated using a reference sampler instead of an existing data sampler. In basic operation, the phase update information (phase update information) are the DA 0 / Edge / DA 90 bang-bang using logic (Bang-bang logic) makes the up / down (UP / Down). At this stage, if you are going to calibrate DA 0 's sampler, you can create phase update information with Ref / Edge / DA 90 instead of outputting DA 0 .

13 is a diagram illustrating a background calibration according to an embodiment of the present invention.

Since the proposed CTLE / DFE adaptation method is a one-shot operation, the optimum sampling point (optimal) for the change of the IC environment such as the temperature and the supply in the process of receiving the real data after the adaptation operation is completed sampling point can move. A background calibration method is needed to continuously detect the optimal sampling point. The method proposed by the present invention is shown in FIG. In the first step, the optimal sampling points D P and R P of data samplers and reference samplers are found, respectively. Next, when the reference sampler senses the optimal sampling point R N in the voltage and time domain in the background, the R P calculating the difference in Δ between to obtain a new data sampler is D N = D P + Δ = D P + (R N -R P) the optimal sampling point (optimal sampling point) of (data sampler). This value is repeatedly applied to the operating data samplers to perform a background calibration.

The equivalent eye-opening area of the input signal can be obtained by accumulating the eye-opening sizes W obtained in each clock phase. In general, the optimal CTLE coefficient value is defined as maximizing the eye-margin. If there is a 1-tap DFE on the back edge, the eye-opening size of the pattern filtered eye diagram should be measured and determined. FIG. 13 shows an equivalent eye-opening area only for the pattern when the post-tap is '0' with respect to the eye diagram according to the coefficient values of various CTLEs.

FIG. 14 is a view showing a CTLE adaptive measurement result according to an embodiment of the present invention.

All measurement results were measured using the PRBS31 pattern at 28.0 Gb / s. 14 is an internal eye monitor result for each CTLE boosting gain step for four lossy channels. The red box indicates the optimal boosting gain selected by the SSEOM. In the measured eye-opening area graph according to the boosting gain, it can be seen that there is an optimal boosting gain that maximizes the eye-opening area. have.

FIG. 15 is a diagram showing a CTLE adaptive measurement result according to an embodiment of the present invention. FIG.

FIG. 15 shows the pattern-filtered eye monitor output (measured at each data sampler) for a signal passed through a CTLE with a lossy channel of -16.4 dB and a boosting gain of 7.2 dB; (pattern-filtered eye-monitor output), and the optimal sampling point found by SSEOM is also indicated by a red dot. As shown in the BER graph results obtained by sweeping the voltage and time offset for the 270 ° data sampler, SSEOM finds the optimal CTLE and DFE gain, as well as each data sampler, It can be seen that an optimal sampling point has been found for all the samples.

The apparatus described above may be implemented as a hardware component, a software component, and / or a combination of hardware components and software components. For example, the apparatus and components described in the embodiments may be implemented within a computer system, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA) A programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to execution of the software. For ease of understanding, the processing apparatus may be described as being used singly, but those skilled in the art will recognize that the processing apparatus may have a plurality of processing elements and / As shown in FIG. For example, the processing unit may comprise a plurality of processors or one processor and one controller. Other processing configurations are also possible, such as a parallel processor.

The software may include a computer program, code, instructions, or a combination of one or more of the foregoing, and may be configured to configure the processing device to operate as desired or to process it collectively or collectively Device can be commanded. The software and / or data may be in the form of any type of machine, component, physical device, virtual equipment, computer storage media, or device , Or may be permanently or temporarily embodied in a transmitted signal wave. The software may be distributed over a networked computer system and stored or executed in a distributed manner. The software and data may be stored on one or more computer readable recording media.

The method according to an embodiment may be implemented in the form of a program command that can be executed through various computer means and recorded in a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions to be recorded on the medium may be those specially designed and configured for the embodiments or may be available to those skilled in the art of computer software. Examples of computer-readable media include magnetic media such as hard disks, floppy disks and magnetic tape, optical media such as CD-ROMs and DVDs, magnetic media such as floppy disks, Includes hardware devices that are specially configured to store and execute magneto-optimal media and program instructions such as ROM, RAM, flash memory, and the like. Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. For example, it is to be understood that the techniques described may be performed in a different order than the described methods, and / or that components of the described systems, structures, devices, circuits, Lt; / RTI > or equivalents, even if it is replaced or replaced.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

Claims (18)

A sigma tracking eye diagram monitoring method comprising:
The determination thresholds of two different positions separated by the standard deviation based on the voltage levels of two different positions are found by using the feedback loop and the intermediate point of the determination thresholds of the two different positions is determined as the optimal determination threshold value ; And
Determining an optimal sampling clock phase using a difference between decision thresholds of the two different positions for each sampling phase
/ RTI > A method of monitoring a sigma-tracking eye diagram, the method comprising: The method according to claim 1,
When the sigma tracking eye diagram monitoring method is operated in a data sampler, the reference sampler generates phase update information on behalf of the data sampler for a period of time; And
Wherein the reference sampler senses a variation amount of an optimum sampling point in real time in the background and reflects the detected variation amount to the data sampler currently operating
The method comprising the steps of: The method according to claim 1,
Determining the optimal decision threshold by decision thresholds of the two different positions and a probability distribution function of the input data,
And determining a clock phase at which the difference between the decision thresholds at the two different positions is the maximum at the optimum sampling clock phase
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > 3. The method of claim 2,
And correcting the analog front-end, the data sampler, the reference sampler and the DC offset using the optimal decision threshold
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > The method according to claim 1,
Correcting the mismatch of the multi-phase clock using the optimum sampling clock phase
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > The method according to claim 1,
When the sigma tracking eye diagram monitoring method is operated in a data sampler, the reference sampler generates phase update information on behalf of the data sampler for a period of time;
Applying a decision feedback equalizer adaptation method using the feedback loop; And
The reference sampler senses the variation of the optimum sampling point in real time in the background and reflects the detected variation to the currently operating data sampler
The method comprising the steps of: The method according to claim 6,
Wherein applying the decision feedback equalizer adaptation method using the feedback loop comprises:
Determining the optimum decision threshold of two samplers and the decision feedback equalizer efficiency and applying the decision feedback equalizer adaptation method using a sigma tracking eye diagram monitor that takes into account all taps in case of two or more taps
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > The method according to claim 1,
When the sigma tracking eye diagram monitoring method is operated in a data sampler, the reference sampler generates phase update information on behalf of the data sampler for a period of time;
Applying a continuous time linear equalizer adaptation method using the feedback loop; And
The reference sampler senses the variation of the optimum sampling point in real time in the background and reflects the detected variation to the currently operating data sampler
The method comprising the steps of: 9. The method of claim 8,
Wherein applying the continuous time linear equalizer adaptation method using the feedback loop comprises:
Accumulating all sizes of the eye diagram obtained in each sampling clock phase step to obtain the equivalent eye diagram area
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > 10. The method of claim 9,
Determining the continuous-time linear equalizer boosting gain that maximizes the equivalent eye diagram area as the optimal boosting gain
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > 9. The method of claim 8,
Determining a continuous time linear equalizer gain that maximizes an eye diagram area of the pattern filtered eye diagram as an optimum boosting gain when the continuous decision linear equalizer has a crystal decision feedback equalizer at its rear end
/ RTI > The method of claim < RTI ID = 0.0 > 1, < / RTI > 1. A sigma tracking eye diagram monitor device,
The determination thresholds of two different positions separated by the standard deviation based on the voltage levels of two different positions are found by using the feedback loop and the intermediate point of the determination thresholds of the two different positions is determined as the optimal determination threshold value A determination threshold value determination unit; And
A sampling clock phase determiner for determining an optimal sampling clock phase using a difference between decision thresholds of the two different positions for each sampling phase,
The sigma tracking eye diagram monitor device comprising: 13. The method of claim 12,
A reference sampler for generating phase update information on behalf of the data sampler for a predetermined period of time when the data sampler of the sigma tracking eye diagram monitor apparatus operates;
An equalizer applying a continuous time linear equalizer adaptation method using the feedback loop; And
Wherein the reference sampler senses an amount of change of an optimum sampling point in real time in the background and reflects the detected amount of change to the data sampler currently operating,
The sigma tracking eye diagram monitoring device further comprising: 14. The method of claim 13,
Wherein the decision threshold value determiner determines,
Determining the optimal decision threshold by decision thresholds of the two different positions and a probability distribution function of the input data,
And correcting the analog front-end, the data sampler, the reference sampler and the DC offset using the optimal decision threshold
The sigma tracking eye diagram monitor device comprising: 13. The method of claim 12,
Wherein the sampling clock phase determination unit comprises:
Determines a clock phase at which the difference between the decision thresholds at the two different positions is the maximum, as the optimum sampling clock phase,
Correcting the mismatch of the multi-phase clock using the optimum sampling clock phase
The sigma tracking eye diagram monitor device comprising: 14. The method of claim 13,
The equalizer includes:
Determining the optimum decision threshold of two samplers and the decision feedback equalizer efficiency and applying the decision feedback equalizer adaptation method using a sigma tracking eye diagram monitor that takes into account all taps in case of two or more taps
The sigma tracking eye diagram monitor device comprising: 14. The method of claim 13,
The equalizer includes:
Accumulating all sizes of the eye diagram obtained from each sampling clock phase to obtain an equivalent eye diagram area and determining a continuous time linear equalizer boosting gain that maximizes the equivalent eye diagram area as an optimal boosting gain
The sigma tracking eye diagram monitor device comprising: 14. The method of claim 13,
The equalizer includes:
Determining a continuous time linear equalizer gain that maximizes an eye diagram area of the pattern filtered eye diagram as an optimal boosting gain when the crystal decision feedback equalizer is provided at the rear end of the equalizer
The sigma tracking eye diagram monitor device comprising:
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