KR101642105B1 - 셰이더 코어 상에서 서로 다른 타입의 태스크들의 비동기 동시 디스패치를 가능하게 해주는 복수의 버퍼들을 구비한 커맨드 프로세서를 포함하는 그래픽 처리 유닛 - Google Patents

셰이더 코어 상에서 서로 다른 타입의 태스크들의 비동기 동시 디스패치를 가능하게 해주는 복수의 버퍼들을 구비한 커맨드 프로세서를 포함하는 그래픽 처리 유닛 Download PDF

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KR101642105B1
KR101642105B1 KR1020127008414A KR20127008414A KR101642105B1 KR 101642105 B1 KR101642105 B1 KR 101642105B1 KR 1020127008414 A KR1020127008414 A KR 1020127008414A KR 20127008414 A KR20127008414 A KR 20127008414A KR 101642105 B1 KR101642105 B1 KR 101642105B1
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tasks
shader core
processing
engines
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KR20120064097A (ko
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마이클 맨토
렉스 맥라리
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5017—Task decomposition

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  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
KR1020127008414A 2009-09-03 2010-09-03 셰이더 코어 상에서 서로 다른 타입의 태스크들의 비동기 동시 디스패치를 가능하게 해주는 복수의 버퍼들을 구비한 커맨드 프로세서를 포함하는 그래픽 처리 유닛 Active KR101642105B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US23971209P 2009-09-03 2009-09-03
US61/239,712 2009-09-03
US12/874,134 US8854381B2 (en) 2009-09-03 2010-09-01 Processing unit that enables asynchronous task dispatch
US12/874,134 2010-09-01

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KR20120064097A KR20120064097A (ko) 2012-06-18
KR101642105B1 true KR101642105B1 (ko) 2016-07-22

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US (1) US8854381B2 (enExample)
EP (1) EP2473920B8 (enExample)
JP (1) JP5791608B2 (enExample)
KR (1) KR101642105B1 (enExample)
CN (1) CN102640115B (enExample)
IN (1) IN2012DN02726A (enExample)
WO (1) WO2011028986A2 (enExample)

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US20130311548A1 (en) * 2012-05-15 2013-11-21 Nvidia Corporation Virtualized graphics processing for remote display
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US9424079B2 (en) 2013-06-27 2016-08-23 Microsoft Technology Licensing, Llc Iteration support in a heterogeneous dataflow engine
WO2015047302A1 (en) * 2013-09-27 2015-04-02 Hewlett-Packard Development Company, L.P. Processing a hybrid flow associated with a service class
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JP6523298B2 (ja) * 2014-01-06 2019-05-29 ジョンソン コントロールズ テクノロジー カンパニーＪｏｈｎｓｏｎ Ｃｏｎｔｒｏｌｓ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏｍｐａｎｙ コンピュータシステムと車両インターフェースシステム
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KR102263326B1 (ko) 2014-09-18 2021-06-09 삼성전자주식회사 그래픽 프로세싱 유닛 및 이를 이용한 그래픽 데이터 처리 방법
US10423414B2 (en) * 2014-11-12 2019-09-24 Texas Instruments Incorporated Parallel processing in hardware accelerators communicably coupled with a processor
US10210655B2 (en) * 2015-09-25 2019-02-19 Intel Corporation Position only shader context submission through a render command streamer
CN106598705B (zh) * 2015-10-15 2020-08-11 菜鸟智能物流控股有限公司 一种异步任务的调度方法、装置、系统以及电子设备
US9830678B2 (en) * 2016-03-03 2017-11-28 International Business Machines Corporation Graphics processing unit resource sharing
KR102577184B1 (ko) * 2016-05-24 2023-09-11 삼성전자주식회사 전자 장치 및 그의 동작 방법
US20180033114A1 (en) * 2016-07-26 2018-02-01 Mediatek Inc. Graphics Pipeline That Supports Multiple Concurrent Processes
CN106648551A (zh) * 2016-12-12 2017-05-10 中国航空工业集团公司西安航空计算技术研究所 一种混合图形处理器指令处理系统
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US8854381B2 (en) 2014-10-07
US20110115802A1 (en) 2011-05-19
CN102640115B (zh) 2015-03-25
EP2473920B1 (en) 2018-03-14
CN102640115A (zh) 2012-08-15
WO2011028986A3 (en) 2011-11-24
EP2473920A2 (en) 2012-07-11
IN2012DN02726A (enExample) 2015-09-11
JP2013504131A (ja) 2013-02-04
JP5791608B2 (ja) 2015-10-07
EP2473920B8 (en) 2018-05-16
KR20120064097A (ko) 2012-06-18
WO2011028986A2 (en) 2011-03-10

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