KR101637190B1 - Analog-Digital converter calibration method and Analog-Digital converter with self-calibration function - Google Patents

Abstract

Disclosed is an ADC calibration method which can optimize the value of a weight (w) of one set used for a digital calibration engine by using a bisection algorithm in an ADC including a pipeline stage unit and the digital calibration engine. The ADC calibration method comprises a bisection algorithm performing step of performing a convex feasibility determination step of solving a convex feasibility problem which determines whether the value of the weight (w) of one set which minimizes the NAD (error due to noise and distortion) of the ADC in each iteration step of the bisection algorithm. An expected optimal value and an upper boundary value (u) or a lower boundary value (l) used in the bisection algorithm are updated according to whether the solution of the convex feasibility problem exists or not.

Description

[0001] The present invention relates to an analog-to-digital converter calibration method and a self-calibrating analog-to-digital converter,

The present invention relates to a self-calibration method for high-resolution analog-to-digital converters and analog-to-digital converters capable of self-calibration.

Digital - domain calibration techniques for pipelined A / D converters are an active area of research. Of these, foreground and backgroud correction techniques have been extensively studied. This background approach has the advantage of correcting inaccurate errors in the analog-domain without interfering with nominal data conversions, and is able to continuously correct errors via adaptive techniques, even with various environmental changes. However, design issues, including convergence time and sufficient signal activity or signal range reduction, remain a challenge. On the other hand, foreground access is a technique for statically correcting the inaccuracies of analog circuits and is free from signal range reduction and input-signal statistics needs. However, because the foreground calibration is a static method, it is ideally used in applications where intermittent calibrations are allowed when the system is not running or when environmental changes are detected.

Examples of conventional papers on foreground correction methods include the following papers.

[1] A. N. Karnicolas, H.-S. Lee, and K. L. Barcrania, "A 15-b 1-Msample / s digitally self-calibrated pipeline ADC," IEEE J. Solid-State Circuits, vol. 28, no. 12, pp. 1207.1215, Dec. 1993.

[2] A. Verma and B. Razavi, "A 10-bit 500-MS / s 55-mW CMOS ADC," IEEE J. Solid-State Circuits, vol. 44, no. 11, pp. 3039.3049, Nov. 2009.

[3] B. Sahoo and B. Razavi, "A 12-bit 200-MHz CMOS ADC," IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2366.2380, Sep. 2009. [10] K. D. Poulton, R. M. R. Neff, M. S. Holcomb, and J. Kang, "A Method of Calibrating an Analog-to-Digital Converter and a Circuit Implementing the Same," U.S. Pat. Patent 6 720 895, Apr. 13, 2004.

[4] X. Dai, D. Chen, and R. Geiger, "A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCs," in Proc. IEEE Int. Symp. Circuits Syst., May 2005, pp. 4831.4834.

[5] Y. Chiu, C. W. Tsang, B. Nikolic, and P. R. Gray, "Least mean square adaptive digital background calibration of pipelined analog-to-digital converters," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 38.46, Jan. 2004.

Figures 1 and 2 illustrate the internal structure of an ADC that can be used in the present invention. The structure itself shown in Figs. 1 and 2 is a known structure.

The present invention provides a technique for optimizing an ADC including a pipeline stage unit and a digital calibration engine.

The method proposed by the present invention belongs to the category of foreground correction, but is different from the previous methods because of the following three points. 1) Complete information is not required for calibration input. 2) Requires fewer calibration data samples. 3) Calibration parameters are found through convex optimization. The calibration method presented in the present invention does not correct higher order nonlinearity errors arising from amplifier nonlinearity. However, it can be operated at high speed with low power consumption, which is still of practical importance in high-speed ADCs with sampling rates of 2-300 MHz.

The present invention performs near-based calibration in terms of convex optimization. 1, a general model of a pipelined ADC including a pipeline stage portion 10 having an arbitrary number of 1.5-bit stages and a digital calibration engine (digital-calibration block) 20 is shown. The raw digital bits output at each stage select the stage weight or radix and the stage weight is added along the pipeline in the digital block to produce a calibrated ADC output.

Each of the 1.5 bit stages shown in the block diagram of FIG. 2 performs coarse quantization in the subADC and delivers the remaining analog information to the following stage using a residual signal amplifier. In real ADC design, a variety of non-ideal phenomena contribute to the non-linearity of the ADC. A commonly accepted model approach in the prior literature is linear non-memory error, a weak nonlinear function with no memory, taking into account other error sources such as subADC offset, finite op amp gain, and capacitor mismatch, It is to approximate the behavior of the signal amplifier.

Under this assumption, the mathematical model for the transfer function of the I-th stage can be presented concisely as the following equation (1) as a polynomial of the subADC output and input with three parameters.

Equation (1)

Where Vref is the reference voltage and Vin, i is Vout, i, di denote the input, output, and subADC output of the ith stage, respectively. The parameters G1 and G2 represent the linear gain, and G3 the weak nonlinear characteristic of the residual signal amplifier. 2, the subADC output di may have {-1, 0, 1}.

Reconstructing the digital representation of the ADC input is accomplished by a linear combination of subADC outputs. In the normalized expression, the relationship between the pipeline ADC outputs of the m stages in linear combination with the analog input voltage can be given as Equation (2).

Equation (2)

Where e _q means a quantization error and w i means the radix of the ith stage in the pipeline. As is evident from equation (2), the common goal of pipeline ADC calibration is to find w i, which is the radix of all stages that minimize e _q . Mathematically, for a known sample of the ADC input length n y∈ R ^n, and outputs matrix subADC D∈ R ^{n * m} corresponding thereto, the calibration problem is that the formula (3) as to minimize L2- norm (norm) problems, such as Lt; / RTI > Where D _ij represents the subADC output of the j-th stage for the i-th input y i.

Equation (3)

Where w is a variable (w ∈ R ^m ).

The problem of Eq. (3) can be solved through the pseudo-inverse method as a convex optimization problem or a least squares problem. In the present invention, the former method is used.

SNDR Maximization Calibration and Semi-Blind Calibration for Semi-Blind Foreground Calibration.

First, the method of maximizing the SNDR is described.

The calibration problem of equation (3) minimizes the error between the digital representation of the input signal and the input signal in terms of the LMS. In terms of ADC performance measures, this is equivalent to minimizing errors due to noise and distortion (NAD).

NAD

Where n denotes the number of data samples, and x [i] and x '[i] denote the optimal fit for the ith data and the ith data, respectively. In order to maximize the SNDR, both the NAD and the signal power must be considered at the same time, so that an optimization problem such as Eq. (4) can be defined.

Equation (4)

Where w is a variable (w ∈ R ^m ).

Equation (4) is a form of optimization that minimizes the proportion of affine functions due to the form of linear-fractional optimization. Equation (4) is not strictly a convex optimization problem, but it can find an optimal solution by using a bivensection algorithm with a pseudo convex optimization problem and an appropriate initial lower bound and boundary boundary values.

The specific application of the bi-section algorithm is as follows. Let p * be the reciprocal of the estimated optimal SNDR of Eq. (4). Then, the solution can be solved using the convexity problem of equation (5). Where w is a variable (w ∈ R ^m ).

Equation (5)

By solving equation (5), we can find the optimal w, or we can verify that equation (5) does not exist for a given p *. To apply the bimanth algorithm to find the optimal w, we start by setting p * to the median of the possible range of SNDR. The initial upper boundary value of the SNDR range shown as u shown in Figure 3 is derived from the ADC's ideal resolution and the initial lower boundary value of the SNDR range, denoted as l shown in Figure 3, is derived by the uncalibrated SNDR or rough estimation . The initial lower bound threshold value is not necessarily accurate if it is sufficiently small. The problem of equation (5) is then solved to determine if the optimal value is above or below the half of the initial range of the SNDR and the range is updated in the next iteration according to the result of the optimization . This process is repeated until the total number of iterations reaches a predetermined maximum value.

In the algorithm shown in FIG. 3, Nuncal denotes the number of valid bits (ENOB) of the uncorrected ADC, Nb denotes the ideal resolution of the ADC, and itermax denotes the maximum number of repetitions defined by the user. Since Eq. (4) is a pseudo convex problem, we can find the global optimal Radix vector w by solving it by the previously mentioned vi- section method.

Now we will explain the method of semi-blind calibration.

One limitation of the SNDR optimization problem of Eq. (5) is that this calibration requires prior knowledge of the calibration input y. In practice, it is not always possible to know the exact values of the calibration input samples. Fortunately, the formula for the SNDR maximization problem can be changed for unknown input values if the structure of the signal is known. In the present invention, a dc-ramp signal, which is likely to be generated in comparison with a good sinusoidal signal, can be regarded as a calibration input. At this time, it is possible to consider a case where the dc-lamp calibration input having a recorded length of n and a fixed step size changes from -Vcal, dc to Vcal, dc. The modified convexity problem for the semi-blind frontal correction can be presented as Eq. (6).

Equation (6)

At this time,

The

n is the estimated I-th input, and Vest is the estimated peak value of the dc ramp. Solving equation (6), we can find the optimal Vest as well as w.

To solve the problem of the semi-blind calibration, we use the bisected algorithm shown in Fig. However, instead of the problem of Eq. (5), we use the problem of Eq. (6). It is important to note that both y and w are variables, so it is important to note that semi-blind corrections are not compatible with least-squares methods.

The present specification contains, as a reference, the following articles in which the basic idea of the present invention is recorded.

Jintae Kim and Minjae Lee, "A Semiblind Digital-Domain Calibration of Pipelined A / D Converters via Convex Optimization", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2014 or 2015.

Hereinafter, an ADC calibration method provided according to one aspect of the present invention will be described. The method is an ADC calibration method for optimizing the value of a set of weights w used in the digital calibration engine using a bissing algorithm, in an ADC including a pipeline stage unit and a digital calibration engine. For each iteration of the bimanthine algorithm, the method comprises the steps of: determining whether there is a value of the set of weights w that minimizes the NAD (error due to noise and distortion) of the ADC; (U) or a lower limit boundary value (l) used in the bimanth algorithm, and a step of determining whether the upper limit threshold value And is updated according to whether or not there exists a solution of 'convex existence problem'.

At this time, the 'convexity problem' means a value of NAD (noise and distortion) generated by the ADC; And the expected optimal value (p *) used in the bimanth algorithm; a value of the set of weights w satisfying a predetermined condition exists.

At this time, the predetermined condition is a condition that the value obtained by multiplying the NAD by the expected optimum value (p *) should be smaller than a value (A _rms ) obtained by dividing the total sum of the weights w of the set by root (2) Lt; / RTI >

In this case, the NAD is a value obtained by multiplying the values (y) of the n input samples and the values (y) of the n input samples input to the ADC by the euclidean distance between the n corrected ADC output values Can be defined on the basis of distance. Or the sum of the squares of the Euclidean distances.

The value of the n input samples is an estimated value estimated to be a value sampled from an analog input signal having a structure known as being input to the ADC and the estimated value is an unknown value required to determine the shape of the analog input signal The " convexity problem " is determined by the value of the NAD; And determining whether the value of the one or more parameters exists, as well as the value of the set weight w that causes the expected optimal value p * to satisfy the predetermined condition. have.

The initial value of the upper boundary value u is given by A1 ^ (b1 * N _uncal + c1) in the _bimanth algorithm and the _absolute value of the lower bound value l is given by A2 ^ (b2 * N _b + c2). However, _uncal N is the number of significant bits of the ADC prior to calibration, N _b is the value that represents the ideal resolution of the ADC, A1, A2, b1, b2, c1, c2 is a predetermined constant.

In this case, each repetition step of the bimaning algorithm may include setting the expected optimal value p * as an intermediate value between the upper limit value and the lower limit value; And if there is a solution to the 'convexity problem', replace the lower bound value (1) with the expected optimal value in each iteration step, otherwise, the upper bound value u) to the expected optimal value in each of the iterative steps, wherein, when all the iterative steps of the bivene algorithm are completed, using the value of the weight w obtained in the last iteration step, . ≪ / RTI >

In this case, the pipeline stage unit includes m (natural number) stages cascade-connected with each other, and n (natural number) analog data samples are sequentially passed through the m stages, Wherein each multiplexer is adapted to select and output a weight using a multiplexer select bit output at the corresponding respective stage, wherein the calibrated ADC output value for the analog data sample is an output May be a value obtained by adding the weighted values obtained by the weighting.

According to another aspect of the present invention, an ADC including a pipeline stage unit and a digital calibration engine can be provided. Wherein the ADC is adapted to optimize the value of a set of weights w used in the digital calibration engine using a bissing algorithm and for each iteration of the binsection algorithm the NAD of the ADC Performing a convexity presence determination step of solving a " convex existence problem " which determines whether there is a value of the set weight w that minimizes the error due to distortion And updates the expected optimal value and the upper limit value u or the lower limit value 1 used in the bimanth algorithm according to whether the solution of the 'convex existence problem' exists or not .

At this time, the 'convexity problem' means a value of NAD (noise and distortion) generated by the ADC; And the expected optimal value (p *) used in the bimanth algorithm; a value of the set of weights w satisfying a predetermined condition exists.

At this time, the predetermined condition is a condition that the value obtained by multiplying the NAD by the expected optimum value (p *) should be smaller than a value (A _rms ) obtained by dividing the total sum of the weights w of the set by root (2) Lt; / RTI >

In this case, the NAD is a value obtained by multiplying the values (y) of the n input samples and the values (y) of the n input samples input to the ADC by the euclidean distance between the n corrected ADC output values Can be defined by distance.

The value of the n input samples is an estimated value estimated to be a value sampled from an analog input signal having a structure known as being input to the ADC and the estimated value is an unknown value required to determine the shape of the analog input signal The " convexity problem " is determined by the value of the NAD; And solving whether the value of the one or more parameters exists, as well as the value of the set weight w that causes the expected optimal value p * to satisfy the predetermined condition .

According to the present invention, a technique for optimizing an ADC including a pipeline stage unit and a digital calibration engine can be provided.

1 is a diagram illustrating a structure of an ADC according to an embodiment of the present invention.
2 is a diagram illustrating an internal structure of 'Stage i' of the ADC shown in FIG.
Figure 3 shows an algorithm according to one embodiment of the present invention, relating to a method of optimizing an ADC by combining a convex existence problem with a vise section algorithm.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein, but may be implemented in various other forms. The terminology used herein is for the purpose of understanding the embodiments and is not intended to limit the scope of the present invention. Also, the singular forms as used below include plural forms unless the phrases expressly have the opposite meaning.

≪ Example 1 >

Embodiment 1 of the present invention can be an embodiment in which an analog signal inputted to an analog-to-digital converter (ADC) is known accurately.

1 is a diagram showing a structure of an ADC 1 applicable to an embodiment of the present invention.

The ADC 1 may include a pipelined stage part 10 and a digital proofing engine 20. The pipeline stage section 10 may include m stages. In this case, the first stage 'Stage 1' can output the MSB, and the last stage 'Stage m' can output the LSB. The pipeline stage unit 10 inputs V _in.ADC , which is an analog voltage value, into 'Stage 1', and 'Stage 1' outputs 'V _{out, 1} ' _{, which} is an analog value _, ). Each stage sequentially outputs digital values of, for example, 2 bits while sequentially connecting the stages. For example, Stage i, which is an i-th stage, receives V _{in, i, which} is an analog value _, and outputs an analog value V _{out, i} and outputs a digital value d _i (where i is a natural number ). The digital values may be input to the digital calibration engine 20.

The digital proofing engine 20 may include the same number of multiplexers (MUX) and D flip-flops as the number of stages. At this time, the number of D flip-flops may be one less than the total number of multiplexers. The digital calibration engine 20 can input the digital value output from each stage of the pipeline stage unit 10 to the MUX corresponding to each stage. The MUX provided with the digital value d _i from the i-th stage 'Stage i' may be referred to as 'MUX _i '. Each of the digital values d _i may be a value used as a selection bit of each 'MUX _i '. The 'MUX _i ' used at this time is configured to output one of three values according to the selection bit d _i . For example, 'MUX _i ' can select one of the values of {w _i , 0, -w _i } according to the value of d _i output from Stage i. Each 'MUX _i' the output value output from the treating D replicon flop 'DF _i' as an input and, in the previous stage D replicon flop 'DF _i-1' of the output value and the 'MUX _i' the addition output value of the calibration ADC each output Can be obtained.

In the structure of the ADC shown in FIG. 1, the weight w _i may not be predetermined, and the weight w _i may be determined by the present invention.

2 is a view showing the internal structure of 'Stage i' shown in FIG.

Each stage includes a track / hold section (T / H) 11, one or more comparators 12, a digital / analog converter (DAC) 13, and a residual amplifier 14 .

The i-th stage 'Stage i' can receive the analog value V _{in, i} from the previous stage 'Stage i-1'. At this time, the value of V _{in, i} may be held by the track / hold unit 11 and input to the plurality of comparators 12, respectively. At this time, each comparator 12 receives a reference voltage V _ref (reference voltage) in addition to V _{in, i} .

D _i is generated using the bits of the value output through the comparator 12, and d _i can be converted to a corresponding analog value by the DAC 13. d _i may have a value of, for example, {-1, 0, +1}, and d _i may be represented by two or more bits to express such a value.

The residual signal can be generated by subtracting the converted analog value from the analog value held at the track / hold portion (T / H) 11. The generated residual signal is amplified through the residual signal amplifier 14 to generate an output value V _{out, i which} is an analog value. The output value V _{out, i} may be input to the next stage 'Stage i + 1'.

In the specification of the present invention, V _{in, i} , V _{out, i} , and d _i may be referred to as the input, output, and subADC output of Stage i, respectively.

That is, in the first embodiment, the optimization of the ADC (1) implies optimizing 'w'. The ADC in the pipeline stage portion 10 additionally generates other errors besides the ideal quantization error due to the inaccuracies of various analog circuits. One set of weights (w _i , i, 1 to m). The quantization error (e _q) is a formed between the the data samples of the ADC (1) the analog signal (V _{in, ADC)} input to the calibration ADC output error, the ideal ADC If NAD (Noise And Distortion, noise and distortion) Can be the same as the error by That is, the quantization error (e _q ) is an ideal quantization error and the NAD is an addition of quantization error plus errors of other analog circuits. If there is no error in the analog circuit can be a NAD = e _q.

In the first embodiment, a binsection algorithm can be used to determine whether a set of weights (w _i , i is a natural number from 1 to m) that minimizes the NAD exists and to find its weight value when present have.

The bisection algorithm is a method of setting an upper bound u and a lower bound l, setting a middle value of u and l ((u + l) / 2) (U + l) / 2, and performing a plurality of steps to set (u + l) / 2 to any one of u and l to designate an optimal solution. have. Application examples of the vise section algorithm can be found in various conventional techniques.

The vise section algorithm used in this embodiment may be the one included in the algorithm shown in Fig.

Figure 3 is an algorithm according to one embodiment of the present invention, relating to a method of optimizing an ADC by combining a convexity problem with a vise section algorithm.

It may be repeated ~ until until the upper and lower boundary values u and l are set (line 1) and then the line 2 to the line 8 is repeated a predetermined number of times (iter _max ) as shown in the bimanth algorithm. (5), which defines the 'convex feasibility problem' which must be solved in order to determine the so-called 'convex existence' (Line 4), and if there exists a solution w satisfying equation (5) which is convexity problem, replace p * with l (line 5), and if w does not exist , The above p * can be replaced by u (line 6). When the iteration of a predetermined number of times (iter _max ) is completed, it is possible to determine that the w value obtained in the last iteration step is the optimal solution (line 9).

Equation (5)

In Equation (5), n represents the length of the input sample to be input to the ADC (1), that is, the number of input samples.

In equation (5), y is an n * 1 matrix, and the element y _i of y represents the value of the i-th input sample of the input sample to be input to the ADC (1). Where y is a deterministic value.

In equation (5), D is an n * m matrix, and element D _ij of D may represent the value of d _i which is the 'subADC output' in the jth stage 'stage j' with respect to element yi of y.

In equation (5), w is a 1 * m matrix, and element w _i of w represents a weight value w _i to be selected as the input of 'MUX _i ' shown in digital calibration engine 20 shown in FIG.

≪ Example 2 >

The second embodiment relates to an ADC (1) calibration method, wherein the ADC 1 can include a pipeline stage unit 10 and a digital calibration engine 20. [ In order to calibrate the signal input to the ADC 1, the digital calibration engine 20 can use a set of weights (w _i , where i is a natural number from 1 to m), where an optimal set of weights (w _i , where i is a natural number from 1 to m) can be obtained by using the bimanth algorithm described in the first embodiment. That is, the ADC 1 can be optimized by obtaining an optimum weight (w _i , i is a natural number from 1 to m).

At this time, in the step of performing the bimaning algorithm, the NAD (error due to noise and distortion) of the ADC 1 with respect to a given value (p *) is calculated for each repeated step A so-called " convexity presence determination step " which determines whether or not a value of the set of minimizing w _i , i is a natural number of 1 to m exists is performed.

(P *) or the upper / lower boundary value (u, l) used in the bimanth algorithm is updated according to whether or not the weight value (w _i , i is a natural number of 1 to m) .

For example, if a value of the weight (w _i , i is a natural number of 1 to m) exists, the lower limit boundary value 1 is set to the given value, and the weight w _i , i is a natural number of 1 to m, The upper bound value u may be set to the given value.

≪ Example 3 >

Embodiment 3 may be an embodiment in which the structure of an analog signal input to an analog-to-digital converter (ADC) is known, but the distortion and / or distortion caused by the noise added to the analog signal is not known accurately . That is, the structure of the ADC (1) the analog signal (V _{in, ADC)} input to an analog signal (V _{in, ADC)} is for example an analog signal (V _{in, ADC)} is that the signal of the sine wave (sin), the lamp-type (ramp) signal, and does not know the correct input value. If there is distortion _{in the} analog signal (V _{in, ADC} ) or there is added noise, the correct input value may not be known.

The third embodiment basically performs the same process as the first embodiment, but differs in that the number of solutions to be found in the 'convexity existence problem' increases and the types of solutions are added. In other words, the convex existence problem is defined in a different way.

In the 'convex existence problem' to be solved in the first embodiment, it is only necessary to consider the weight (w) as a variable to find the value. However, in the 'convexity problem' to be solved in the third embodiment, it is necessary to determine not only the weight w but also one or more predetermined parameters that are essential for determining the structure of each signal Further consideration should be given to the optimum value.

For example, if the analog signal (V _{in, ADC} ) input to the ADC 1 is a sine wave signal, the structure of the sine wave signal can be specified by the amplitude A, the frequency f and the phase have. Therefore, in the 'convexity problem' to be solved in the third embodiment, as a parameter to find the value, not only the optimum value of the weight w but also the amplitude (A), the frequency (f), and the phase The optimal value of the parameters should be obtained.

As another example, if the analog signal (V _{in, ADC} ) input to the ADC 1 is a ramp type signal, the structure of this ramp type signal can be specified by the peak value V _est . Therefore, in the 'convexity problem' to be solved in the third embodiment, the optimum value of the parameter of the peak value (V _est ) as well as the optimal value of the weight w must be found as a parameter to find the value. The 'convexity problem' in this case can be defined as the following equation (6).

Equation (6)

In Equation (6), n represents the length of the input sample to be input to the ADC (1), that is, the number of input samples.

In equation (6)

Is an n * 1 matrix,

Element of

Represents the estimated value of the i-th input sample of the input sample to be input to the ADC (1).

In equation (6), D is an n * m matrix, and element D _ij of D

Element of

The value of the 'subADC output, the d _i in the j-th stage, Stage j' can be expressed with respect to the.

In formula (6) w 1 * m as a matrix, the elements of w w _i w _i represents the weight values to be selected as an input to the 'MUX _i' shown in a digital proofing engine 20 shown in FIG.

In the equation (6), if the analog signal (V _{in, ADC} ) input to the ADC (1) is a ramp signal, the structure of the ramp signal indicates a peak value, do. And acts as a condition in the problem defined by equation (6).

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the essential characteristics thereof. The contents of each claim in the claims may be combined with other claims without departing from the scope of the claims.

Claims (13)

CLAIMS What is claimed is: 1. An ADC calibration method for optimizing a set of weight values used in the digital calibration engine using a bissing algorithm, the ADC comprising a pipeline stage portion and a digital calibration engine,
Performing, for each iteration step of the bivene algorithm, a convexity presence determination step of solving a " convexity presence problem " that determines whether a value of the set of weights that minimizes the NAD of the ADC is present, And performing a bimanth algorithm,
Wherein an expected optimal value and an upper bound or a lower bound used in the bivene algorithm are updated according to whether there is a solution of the 'convex existence problem'. The method of claim 1, wherein the 'convexity problem' comprises: a value of NAD generated by the ADC; And the expected optimal value used in the bimanth algorithm; Is defined as a problem of solving whether or not the value of the set of weights satisfying the predetermined condition exists. 3. The ADC calibration method according to claim 2, wherein the predetermined condition is that a value obtained by multiplying the NAD by the expected optimal value is smaller than a value obtained by dividing a total sum of the weights of the one set by root (2). 3. The method of claim 2, wherein the NAD is a sum of the eccentric distance between the n input samples to be input to the ADC and the values of the n input samples, Gt; ADC, < / RTI > 5. The method of claim 4,
Wherein the values of the n input samples are estimates estimated to be sampled from analog input signals having a structure known as being input to the ADC,
Wherein the estimate is determined by one or more unknown parameters needed to determine the shape of the analog input signal,
The 'convexity problem' is a value of the NAD; And the expected optimal value; Is defined as a problem of solving whether or not the value of the one or more parameters as well as the value of the set of weights satisfying the predetermined condition exists,
ADC calibration method. The method according to claim 1,
The initial value of the upper limit boundary value, the in the by-section algorithm is given as _{A1 ^ (b1 * N uncal +} c1) is given as an initial value of the lower limit boundary value _{A2 ^ (b2 * N b +} c2), ADC calibration method. (Where, N is the ADC _uncal the number of significant bits before the correction, N _b is the value that represents the ideal resolution of the ADC, A1, A2, b1, b2, c1, c2 are being predetermined constants.) The method according to claim 1,
Each repetition step of the biventing algorithm comprises:
Setting the expected optimal value as an intermediate value between the upper bound value and the lower bound value; And
If there is a solution to the 'convexity problem', replace the lower bound value with the expected optimal value in each iteration step, otherwise, With the expected optimal value at
/ RTI >
Wherein all of the iterative steps of the vise section algorithm are completed and the ADC is optimized using the weight values obtained in the last iteration step,
ADC calibration method. The method according to claim 1,
Wherein the pipeline stage unit includes m (natural number) stages cascaded with each other, and n (natural number) analog data samples are sequentially passed through the m stages,
Wherein the digital calibration engine comprises m multiplexers,
Wherein each of the multiplexers is adapted to select and output a weight using a multiplexer select bit output from the corresponding stage,
Wherein the calibrated ADC output value for the analog data sample is a sum of the output weights,
ADC calibration method. An ADC comprising a pipeline stage portion and a digital proofing engine,
Wherein the ADC is adapted to optimize a set of weight values used in the digital calibration engine using a bissing algorithm,
Performing, for each iteration step of the bivene algorithm, a convexity presence determination step of solving a " convexity presence problem " that determines whether a value of the set of weights that minimizes the NAD of the ADC is present, And performs the bimanth algorithm execution step,
Wherein the controller is configured to update an expected optimal value and an upper bound value or a lower bound value used in the bivene algorithm according to whether there is a solution of the 'convex existence problem'
ADC. 10. The method of claim 9, wherein the convexity problem is a value of NAD generated by the ADC; And the expected optimal value used in the bimanth algorithm; Is defined as a problem of solving whether or not the value of the set of weights satisfying the predetermined condition exists. 11. The ADC of claim 10, wherein the predetermined condition is that a value obtained by multiplying the NAD by the expected optimal value is less than a value obtained by dividing a total sum of weights of the one set by root (2). 11. The method of claim 10, wherein the NAD is a sum of squared distances between the n input samples to be input to the ADC and the values of the n input samples, Lt; / RTI > 13. The method of claim 12,
Wherein the values of the n input samples are estimates estimated to be sampled from analog input signals having a structure known as being input to the ADC,
Wherein the estimate is determined by one or more unknown parameters needed to determine the shape of the analog input signal,
The 'convexity problem' is a value of the NAD; And the expected optimal value; Is defined as a problem of solving whether or not the value of the one or more parameters as well as the value of the set of weights satisfying the predetermined condition exists,
ADC.

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