KR101627620B1

KR101627620B1 - Uninterruptible Power Supply

Info

Publication number: KR101627620B1
Application number: KR1020150171109A
Authority: KR
Inventors: 이인환
Original assignee: 성신전기공업(주)
Priority date: 2015-12-03
Filing date: 2015-12-03
Publication date: 2016-06-07

Abstract

An uninterruptible power supply having a three-level charge / discharge unit is provided. This device is a three-phase or single-phase transformer-type uninterruptible power supply that converts the power of a battery when an AC input voltage is abnormally or interrupted and supplies the load to a load. The neutral point of the DC link is controlled without connecting a neutral line to the battery Level charge / discharge device and control means, it is possible to improve the efficiency, reduce the cost of installing the neutral side of the battery and the manufacturing cost of the inductor for charging / discharging, and control the neutral point of the DC link, It is possible to minimize the circulating current between the inverters by removing the DC voltage included in the inverter output voltage.

Description

[0001] Uninterruptible Power Supply [0002]

The present invention relates to an uninterruptible power supply, and more particularly to a three-level uninterruptible three-level uninterruptible power supply system comprising a transformerless three-level battery buck-boost switch for boosting a battery voltage during a power failure and supplying the battery voltage to a direct current bus Power supply device.

Uninterruptible power supply (UPS) is a device that supplies stable output power to the load by using battery power when a power failure occurs or a low voltage occurs at the input.

Recently, the market for uninterruptible power supplies has been under intense market competition due to efficiency, price and reliability. In particular, efficiency characteristics among competitive factors are important factors affecting other characteristics.

Specifically, if the efficiency is improved, the temperature inside the device can be lowered, so that the heat dissipation volume can be reduced to achieve miniaturization and lower cost, deterioration due to temperature rise can be reduced, and reliability can be improved. In recent years, three-level circuit systems have been increasingly adopted for rectifiers, inverters, and charge / discharge units to improve the efficiency of uninterruptible power supply units. The 3-level untransformer type uninterruptible power supply has advantages of reducing the volume of the device, reducing the manufacturing cost, decreasing the high efficiency characteristic and reducing the electromagnetic noise although the number of elements is increased in order to make the rectifier and the inverter three-level.

It is well known in the art that the efficiency of the 3-level circuit scheme is improved compared with the conventional 2-level circuit scheme, and therefore, a detailed description thereof will be omitted. In recent years, three-level technology has been applied to rectifiers and inverters as well as battery charge / discharge devices, and three-level circuits and control methods such as split control, batch control and mirror control have been applied to the uninterruptible power supply according to the control method.

1 is a view showing a conventional three-level charge / discharge type split-controlled type.

Referring to FIG. 1, the split-controlled three-level charge / discharge unit independently charges the upper and lower batteries separated by the neutral point of the system and the neutral point in the charge mode, The battery is independently discharged to charge the capacitors C1 and C2 of the direct current bus independently.

The split-controlled three-level charge / discharge unit can control the Vd1 and Vd2 independently in the charge mode and the Vd1 and Vd2 independently in the discharge mode, It is a circuit structure in which the line voltage (DC-) is stabilized at the same size and recovery is quick during transient period. Therefore, it is suitable for parallel type uninterruptible power supply which requires fast control of control. Two independent upper and lower current sensors are required for independent charge / discharge control and it is necessary to control up and down.

2 is a view showing a batch controlled three-level charge / discharge unit according to the prior art.

Referring to FIG. 2, the batch control type 3-level charge / discharge unit charges the battery at the time of charge mode without collecting the neutral point of the system at the neutral point of the battery, discharges the battery at the time of discharge mode, C1, and C2 are collectively charged.

The batch controlled three-level charge / discharge system is a system in which the system charges the battery voltage (Vbat) in a batch mode without dividing the battery voltage (Vbat) in a charge mode and collectively charges the DC bus voltage (Vd) to be. Such a batch controlled 3-level charge / discharge unit is not suitable for DC link unbalance due to charging / discharging algorithm and is suitable for stand-alone uninterruptible power supply which can compensate by control algorithm of other power converter such as inverter. Since the batch control type three-level charge / discharge unit performs batch charge / discharge current mode control, only one battery current sensor is required.

3 is a view showing a prior art mirror controlled three-level charge / discharge device.

Referring to FIG. 3, the mirror-controlled three-level charge / discharge unit charges the upper and lower batteries independently of the neutral point of the system connected to the neutral point of the battery and divided on the basis of the neutral point in the charge mode, And the capacitors C1 and C2 of the direct current bus are independently charged.

The mirror-controlled three-level charge / discharge unit has a structure similar to that of the split-controlled three-level charge / discharge unit, and the control type has characteristics similar to the batch-controlled three-level charge / discharge unit. Since the mirror controlled three-level charge / discharge unit uses half of the split-type controller, it reduces the burden on the controller and eliminates the imbalance of the DC link voltage by adding an offset algorithm. Since there is an advantage that only one battery current sensor is required, It is suitable for small capacity uninterruptible power supply which requires circuit and algorithm.

The characteristics of the three-level charge / discharge units described above are disadvantageous in that the circuit is complicated and the neutral line is connected to the battery.

The batch control method has no burden of installing the neutral wire on the battery side compared with the split control but is simple in control but it can not control the neutral point of the DC link itself and therefore can not be applied to the parallel operation uninterruptible power supply. The size of the discharge inductor becomes large.

The mirror control method has the simplest composition among the three methods, but there is a disadvantage that a neutral wire is connected to the battery side.

On the other hand, when a midline wire is connected to the battery, the following problems occur.

First, when the neutral wire is connected to the battery, the wiring amount of the neutral wire inside the uninterruptible power supply increases, and the number of poles of the battery breaker and the battery input terminal is added, which complicates the circuit and increases the manufacturing cost.

In addition, a neutral line drawn out of the uninterruptible power supply unit is added, and the installation cost is increased due to an increase in the number of poles of the battery circuit breaker installed outside.

However, at the time of commercialization of the 3-level uninterruptible power supply, there is a burden of doubling the number of drivers for driving the switching element and the switching element in order to manufacture the 3-level power supply. In order to avoid exceeding, conditions that must lower the cost of other materials can not be avoided.

Meanwhile, it is well known in the art that the three-level structure of the rectifier and the inverter can reduce the size of the radiator and the housing due to the efficiency characteristics, and reduce the size of the inductor by the frequency multiplication effect.

Therefore, it is necessary to minimize the number of switching elements and to reduce the manufacturing cost of the inductor by the frequency multiplication effect in order to reduce the material cost even when the battery charge / discharge device is three-leveled. There is a need for a circuit and a control means capable of eliminating the voltage deviation.

Korean Patent Registration No. 1399120 Korean Patent Registration No. 1556933

SUMMARY OF THE INVENTION It is an object of the present invention to improve the efficiency of a charge / discharge device and reduce the manufacturing cost of an inductor without connecting a neutral line to a battery side in order to reduce the manufacturing cost of a three-level uninterruptible power supply. Level charging / discharging device of an interleaved type capable of controlling the operation of the uninterruptible power supply.

In addition, a small-sized filter capacitor is connected to the battery terminal and the neutral wire in the uninterruptible power supply to reduce the risk of electric shock when a human body is connected to the battery, and a function of removing noise flowing out from the battery, And an uninterruptible power supply unit having a discharge unit.

According to an aspect of the present invention, there is provided an uninterruptible power supply having a three-level charge / discharge unit. The apparatus includes a DC capacitor, a neutral line, a DC parent line, a first capacitor connected between the DC bias line and the neutral line, a second capacitor connected to the neutral line and the DC bias line, A 3-level PWM rectifier connected to the DC common bus, the DC parent line, and the neutral line to convert AC power to DC power from an AC power source; A three-level PWM inverter connected to the DC common bus, the DC parent line, and the neutral line to convert DC power to AC power from a DC power source; And a first discharging part switching element connected in series to the direct current charging line, a first discharging part switching element connected between the first charging part switching element and the heavy line, a second discharging part switching element connected in series to the neutral line, , A second charging section switching element connected in series between the second discharging section switching element and the DC parent line, a connection between the connection point of the first charging section switching element and the battery side (+) terminal A second inductor connected between a connection point of the second discharging part switching element and the battery side (-) terminal of the second discharging part switching element, a connection point between the battery side (+) terminal and the first inductor, And a fourth capacitor connected between the battery side (-) terminal and a connection point of the second inductor and the neutral line, the third capacitor being connected between the negative terminal and the neutral line, It includes.

In the present invention, the operation of the 3-level charge / discharge unit may be based on a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the first capacitor, or a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the second capacitor Level charge / discharge unit of the interleaved type in which the path of charge / discharge mode is automatically changed according to the relationship.

In the charging mode of the three-level charge / discharge unit, when the magnitude of the voltage of each of the first capacitor and the second capacitor is larger than the magnitude of the battery voltage, the first charging unit switching device and the second discharging device switching device The body diode charges the battery using the first capacitor, the body diode of the second charging part switching element and the first discharging part switching element charges the battery using the second capacitor, and the body diode of the first capacitor and the second capacitor A charge control means for charging the battery by using a voltage obtained by summing the first capacitor voltage and the second capacitor voltage at the same time by the first and second charging portion switching devices when the magnitude of each voltage is smaller than the battery voltage, .

The charge control unit includes a first charge / discharge determination unit that determines a value stored in the register dsch_mode at the start of the system, branches to the discharge step if the result is 1, and branches to the battery voltage comparison unit if the result is not 1 If the actual battery voltage Vbat is not greater than the reference battery voltage Vbat_ref, the control unit branches to a first error generator that stores a value (Vbat_ref-Vbat) in the register errror. If the actual battery voltage Vbat is not greater than the reference battery voltage Vbat_ref, (Ibat_ref - Ibat) obtained by subtracting the actual charge current from the charge current, and a second error generator (105) for storing a value (Ibat_ref - Ibat) obtained by subtracting the actual charge current from the charge current. The first error generator And integrating the value stored in the register error, and storing the result in the register bat_Vdc_ctr_state, wherein the register of the error integration step And an integration limiting step of limiting the value stored in the register bat_Vdc_ctr_state so that the value stored in the register bat_Vdc_ctr_state is not saturated and storing a result obtained by multiplying the value stored in the register bat_Vdc_ctr_state by an integral constant Ki in the duty register chrg_duty, If the actual value of the DC link voltage is smaller than 95% DC link voltage, 1 is stored in the register dchg_mode, a zero value is stored in the duty register chrg_duty, and the register dchg_Vdc_ref And a second charge / discharge determination unit for storing the actual DC link voltage Vdc in the register bat_Vdc_ctr_state and for branching to the PWM synthesis unit when the actual value of the DC link voltage is equal to or greater than 95% DC link voltage, The value stored in the register chrg_duty is stored in the register Q1R, and the value of the duty register chrg_dut and stores the value stored in the register Q2R in the register Q2R so that the phase of the PWM generated in the register Q1R is higher than the half of the switching period by the phase of the PWM generated in the register Q2R, And a gate driver electrically isolating the PWM signals Q1 and Q2 to supply the PWM signals Q1 and Q2 to the switching elements.

In the discharge mode of the three-level charge / discharge unit, when the magnitude of the battery voltage is greater than the magnitude of the voltage of each of the first capacitor and the second capacitor, the first discharging unit switching device and the first charging device switching device body The body diode of the diode and the second charging section switching element charges the first capacitor and the second capacitor using a voltage obtained by summing the battery voltage and the second capacitor voltage, and the body diode of the second discharging section switching element and the body diode of the first charging section switching element And the body diode of the second charger switching element charges the first capacitor and the second capacitor using a voltage obtained by summing the battery voltage and the first capacitor voltage and the magnitude of the battery voltage is smaller than the magnitude of each of the first and second capacitors When the voltage is smaller than the magnitude of the voltage, the first discharging portion switching element, the second discharging portion switching element, and the body die of the first charging portion switching element The first diode and the body diode of the second charging unit switching element simultaneously charge the first capacitor and the second capacitor using only the battery voltage and when the voltage of the first capacitor is larger than the voltage of the second capacitor, Wherein an offset value is added to a PWM duty ratio applied to a switching element to control the magnitude of the voltage of the first capacitor and the magnitude of the voltage of the second capacitor to be the same, And an offset value is added to the PWM duty ratio applied to the second discharging portion switching element to make the magnitude of the voltage of the first capacitor equal to the magnitude of the voltage of the second capacitor .

The discharge control means judges the value stored in the register dsch_mode at the start of the system and branches to the softstart step of increasing the value of the discharge reference register dchg_Vdc_ref by 1 when the result value is 1 and stores the value stored in the register dsch_mode And a charge / discharge determination unit for determining whether the result of the soft start is greater than a predetermined value, and for branching to a charge step if the result is not equal to 1, and for limiting the discharge reference register dchg_Vdc_ref value to a minimum value, If the value of the current -Ibat is greater than the discharge limitation current value IBAT_LIMIT (IBAT_LIMT + Ibat), the value is branched to the first error generation unit storing the value in the register error. If the value of the battery discharge current -Ibat is less than the discharge limitation current value IBAT_LIMIT dchg_Vdc_ref - Vdc) is stored in a register error. And a determination unit,

And a low-pass filter unit for removing noise of a value stored in the register error transmitted from the first error generating unit or the second error generating unit. The value stored in the register error removed from the noise is integrated and stored in the register bat_Vdc_ctr_state And integrating the result of the multiplication of the register bat_Vdc_ctr_state by an integral constant Ki and the value stored in the register error, And a duty generating unit for adding the result of multiplying the result of multiplication by the proportional constant Kp to the discharge duty register dchg_vtg, and restricting the value stored in the register dchg_vtg from being saturated, wherein the average voltage avg_Vdc of the DC link If it is 100% Vdc or more, it branches to the secondary discharge stop determination section, A first discharge stop determining unit for branching to an offset voltage calculating unit if the average voltage avg_Vdc value of the arc is less than 100% Vdc and stores zero in a register dchg_mode to declare a discharge stop if the value stored in the register bat_Vdc_ctr_state is zero and a second discharge stop determination unit for branching to an offset voltage calculation unit if the value stored in bat_Vdc_ctr_state is not zero, and calculates an offset voltage Vdcp-Vdcn of the DC link voltage and stores the calculated deviation in the register offset_dc, wherein the offset_dc And an offset code determiner for branching to the first PWM combiner if the sign of the value stored in the discharge duty register dchg_vtg is zero or more and for branching to the second PWM combiner if the sign of the value stored in the register offset_dc is less than zero, Value is added to the value stored in the register offset_dc multiplied by a constant k, And a first PWM combiner for storing the value stored in the discharge duty register dchg_vtg in the register Q3R and for forwarding the value stored in the discharge duty register dchg_vtg to the register Q3R, And a second PWM combiner for subtracting a value stored in the discharge duty register dchg_vtg by a value stored in the register offset_dc by a constant k and storing the result in a register Q4R and proceeding to a phase shifter, The phase of the PWM of the Q3R calculated by the PWM synthesizing unit is higher than the half value of the switching period of the PWM of Q4R, the Q3R is converted into the PWM signal Q3, the Q4R is converted into the PWM signal Q4, And a gate driver that electrically isolates the phase shifter and the PWM signals Q3 and Q4 and supplies the same to the switching element.

In the present invention, the neutral line is connected to the earth ground at the inside or the outside of the UPS, and both terminals of the battery terminal are applied with voltages corresponding to 1/2 times the battery voltage by the third capacitor and the fourth capacitor .

According to the present invention, the disadvantages of the conventional three-level charge / discharge unit of the divisional control system, the batch control system and the mirror control system are complemented, and the charge / discharge operation of the three-level system is performed without installing a neutral line on the battery side By providing the means, the efficiency of the uninterruptible power supply can be improved and the manufacturing cost can be reduced by improving the efficiency of the charge / discharge device while reducing the cost of the neutral wire installation and the cost of the inductor.

Also, the means for performing the charging / discharging operation of the 3-level scheme can minimize the DC voltage included in the inverter output voltage by controlling the magnitude of the first capacitor voltage and the magnitude of the second capacitor voltage in the DC link .

In addition, a small filter capacitor is connected to the battery terminal and the neutral wire in the uninterruptible power supply to provide a function of reducing the risk of electric shock when the human body is connected to the battery, and a function of removing noise flowing out of the battery Respectively.

1 is a view showing a conventional three-level charge / discharge type split-controlled type.
2 is a view showing a batch controlled three-level charge / discharge unit according to the prior art.
3 is a view showing a prior art mirror controlled three-level charge / discharge device.
4A is a diagram illustrating a 3-level uninterruptible power supply including a 3-level charge / discharge unit according to a preferred embodiment of the present invention.
4B is a view showing the 3-level charge / discharge unit of FIG. 4A.
FIG. 5 is a view for explaining a charging mode of the 3-level charge / discharge unit of FIG. 4B.
6 is a view showing a charge control block of a 3-level charge / discharge unit according to a preferred embodiment of the present invention.
FIG. 7 is a view for explaining the discharge mode of the 3-level charge / discharge unit of FIG. 4B.
8 is a view showing a discharge control block of a 3-level charge / discharge unit according to a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, in order that the present invention may be easily understood by those skilled in the art. In the description of the present invention, the same parts are denoted by the same reference numerals, and repetitive description thereof will be omitted.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and should provide a further description of the claimed invention. Reference numerals are shown in detail in the preferred embodiments of the present invention, examples of which are shown in the drawings. Wherever possible, the same reference numbers are used in the description and drawings to refer to the same or like parts.

The present invention may be implemented or applied through other embodiments. In addition, the detailed description may be modified or modified in accordance with the aspects and applications without departing substantially from the scope, spirit and other objects of the invention.

The present invention provides an uninterruptible power supply unit and a control unit provided with an interleaved control type three-level charge / discharge unit.

The three-level charge / discharge unit of the present invention provides interleaved control to reduce the ripple content of the current flowing through the inductor during charging / discharging, thereby reducing manufacturing cost and improving efficiency of the inductor.

In the present invention, the principle that the efficiency of the 3-level charge / discharge unit is improved as compared with the 2-level charge / discharge unit is well known in the art, and a description thereof will be omitted.

In the present invention, the interleaved control 3-level charge / discharge unit provides advantages of reducing manufacturing and installation costs because the neutral line of the system is not connected to the center point of the battery.

The three-level charge / discharge unit of the present invention has a function of reducing the risk of electric shock when connecting a small-sized filter capacitor to a battery terminal and a neutral wire in an uninterruptible power supply and connecting the battery to a human body and a function of removing noise flowing in or out of the battery At the same time.

FIG. 4A illustrates a 3-level uninterruptible power supply having a 3-level charge / discharge unit according to a preferred embodiment of the present invention, and FIG. 4B illustrates a 3-level charge / discharge unit of FIG. 4A.

4A and 4B, the apparatus includes a DC bias line 152, a neutral line 155, a DC bias line 157, a first DC bias line 154 connected between the DC bias line 152 and the neutral line 155, A capacitor C1, a second capacitor C2 connected to the neutral line 155 and the DC parent line 157, the DC common line 152, the DC parent line 157, and the neutral line 155, Level PWM rectifier connected to the DC power supply source and converting the AC power from the AC power supply to DC power and a DC power supply connected to the DC power supply line 152, the DC power supply line 157, and the neutral line 155, And a three-level PWM inverter for converting DC power to AC power.

The uninterruptible power supply of the present invention has an interleaved 3-level charge / discharge unit, wherein the 3-level charge / discharge unit includes a first charging unit switching device (Q1) connected in series to the direct current control line (152) A first discharging part switching device Q3 connected between the charging part switching device Q1 and the middle wire 155, a second discharging part switching device Q4 connected in series to the neutral line, A second charging unit switching device Q2 connected in series between the switching device Q4 and the DC parent line 157 and a connection point between the first charging device switching device Q1 and the first discharging device switching device Q3, (-) terminal connected between the connection point of the second charging section switching device (Q2) and the battery side (-) terminal, a first inductor A second inductor L2 connected between the connection point of the battery side terminal and the first inductor L1 and the neutral line 155, And a fourth capacitor C4 connected between the connection point between the battery terminal (-) terminal and the second inductor (L2) and the neutral line (155).

The operation of the 3-level charge / discharge unit is such that the correlation between the magnitude of the battery voltage (Vbat) and the magnitude of the voltage of the first capacitor (C1) or the magnitude of the battery voltage (Vbat) Level charge / discharge unit in which the path of the charge / discharge mode is changed according to the correlation of the magnitudes of the voltages of the charge / discharge cells C2.

In detail, in the charging mode of the interleaved three-level charge / discharge device of the present invention, when the magnitude of the voltage of each of the first capacitor C1 and the second capacitor C2 is larger than the magnitude of the battery voltage Vbat, The body diode of the first charging part switching device Q1 and the second discharging part switching device Q4 charges the battery using the first capacitor C1 and the second charging part switching device Q2 and the first discharging part switching The body diode of the element Q3 charges the battery using the second capacitor C2. When the magnitude of the voltage of each of the first capacitor C1 and the second capacitor C2 is smaller than the magnitude of the battery voltage Vbat, the first charging section switching element Q1 and the second charging section switching element Q2 And the interleaved charge control for charging the battery using the voltage of the first capacitor C1 and the voltage of the second capacitor C2 at the same time.

In detail, in the discharge mode of the interleaved three-level charge / discharge device according to the present invention, when the magnitude of the battery voltage (Vbat) is larger than the magnitude of the voltage of each of the first capacitor (C1) and the second capacitor (C2) The body diode of the first discharging portion switching device Q3 and the body diode of the first charging portion switching device Q1 and the body diode of the second charging portion switching device Q2 are connected to each other by a voltage obtained by summing the battery voltage Vbat and the voltage of the second capacitor C2 The first diode D1 and the second diode D2 of the first charging unit switching device Q1 and the second charging unit switching device Q2 are charged with the first capacitor C1 and the second capacitor C2, The body diode of the first capacitor C1 charges the first capacitor C1 and the second capacitor C2 using a voltage obtained by summing the battery voltage Vbat and the voltage of the first capacitor C1. When the magnitude of the battery voltage Vbat is smaller than the magnitude of the voltage of each of the first capacitor C1 and the second capacitor C2, the first discharging portion switching element Q3 and the second discharging portion switching element Q4 And the body diode of the first charging unit switching device Q1 and the body diode of the second charging unit switching device Q2 simultaneously charge the first capacitor C1 and the second capacitor C2 using only the battery voltage Vbat Lt; RTI ID = 0.0 > interleaved < / RTI > discharge control.

In addition, the present invention provides a three-level discharge device that reduces the risk of electric shock when a human body touches the battery and removes high frequency noise flowing into or out of the battery.

In FIG. 4B, the neutral line 155 (NEUT) is typically connected to earth ground either inside or outside the uninterruptible power supply.

delete

Accordingly, in FIG. 4B, when a battery installer or a maintenance worker of the uninterruptible power supply unit contacts the battery terminal by mistake, the voltage applied to the human body is half as high as the earth ground, It is possible to lower the cost of the product.

In addition, the third capacitor C3 and the fourth capacitor C4 of FIG. 4B simultaneously provide a function of absorbing high-frequency noise generated when the three-level charge / discharge unit operates.

On the other hand, the third capacitor C3 and the fourth capacitor C4 in FIG. 4B use a small capacitor in the unit of several microfarads, so that the production cost of the uninterruptible power supply is not greatly affected.

Hereinafter, the charging operation of the 3-level charge / discharge unit according to the embodiment of the present invention will be described.

[3-level charging operation]

FIG. 5 is a view for explaining a charging mode of the 3-level charge / discharge unit of FIG. 4B.

Referring to FIG. 5, as shown in (a), in the first interleaved section, the switching element Q1 is switched to charge the battery Vbat. In the second interleaved section, as shown in (c) And charges the battery Vbat.

Specifically, under the condition that the DC link voltage Vd1 is larger than the battery voltage Vbat, the switching element Q1 performs the switching operation in the first interleaved section.

Further, under the condition that the DC link voltage Vd2 is larger than the battery voltage Vbat, the switching element Q2 performs the switching operation in the second interleaved section.

(e), the signals applied to Q1 and Q2 do not overlap in the DC link voltage Vd1 = Vd2> Vbat condition.

(f), the signals applied to Q1 and Q2 overlap in the DC link voltage Vd1 = Vd2 <Vbat condition.

The charging operation of the battery in the first interleaved section will be described.

(a), when the switching element Q1 is turned on under the condition of Vd1 = Vd2> Vbat, the inductor current starts from (+) of Vd1 and goes from Vd1 (+) to Q1, L1, Vbat, Via the body diode Vd1 (-).

(b), if the switching element Q1 is turned off and then turned off under the DC link voltage Vd1> Vbat, the inductor current flows through the body diode of L1 → Vbat → L2 → Q4 → the body diode of Q3 → Vbat .

The charging operation of the battery in the second interleaved section will be described.

(c), when the switching element Q2 is turned on under the DC link voltage Vd2> Vbat, the inductor current starts from (+) of Vd2 and goes to the body diode of Vd2 (+) → Q3 → L1 → Vbat → L2 → Q2.

(d), if the switching element Q2 is turned off and then turned off under the DC link voltage Vd2> Vbat, the inductor current flows through the body diode of L1 → Vbat → L2 → Q4 → the body diode of Q3 → Vbat .

the PWM waveforms of Q1 and Q2 shown in FIG. 6F automatically increase when the amount of charge current increases or the voltage of the battery rises, and when the battery voltage Vbat gradually increases and Vd1 = Vd2 <Vbat, the PWM pulse of Q1 and Q2 At the same time, a redundant section that generates a turn-on signal occurs.

As a result, as shown in (e) and (f), the repetition period of the charging current is the same irrespective of the correlation of the DC link voltages Vd1, Vd2 and Vbat, Is reduced and the switching frequency is doubled.

It is well known in the art that the size of the inductor is proportional to the magnitude of the ripple current and inversely proportional to the switching frequency. Therefore, the ripple current of the 3-level charge / discharge unit of the present invention is reduced by the interleaved effect as described above, and the switching frequency is doubled, thereby reducing the manufacturing cost of the inductor compared with the conventional split control, It provides the advantage of being able to.

Hereinafter, charging control of the 3-level charge / discharge unit according to an embodiment of the present invention will be described.

[3-level charge control]

6 is a view showing a charge control block of a 3-level charge / discharge unit according to a preferred embodiment of the present invention.

Referring to FIG. 6, in the control of the 3-level charger, the first charge / discharge judgment unit 102 judges the value stored in the register dsch_mode in the start step 101 of the system. When the result is 1, 201, and determines the value stored in the register dsch_mode in the start step 101 of the system. If the result is not 1, it branches to the battery voltage ratio allocation unit 104.

If the actual battery voltage Vbat is greater than the reference battery voltage Vbat_ref, the battery voltage ratio distribution unit 104 branches to the first error generator 105 storing the value (Vbat_ref - Vbat) in the register errror, If it is not greater than the battery voltage Vbat_ref, the process branches to the second error generation unit 105 which stores the value (Ibat_ref - Ibat) obtained by subtracting the actual charge current from the reference charge current in the register errror.

And an error integrating step 107 for integrating the value stored in the register error transmitted from the first error generating unit 105 or the second error generating unit 105 and storing the integrated value in the register bat_Vdc_ctr_state.

And an integration limiting step (108) for limiting the value stored in the register bat_Vdc_ctr_state of the error integration step from being saturated.

And a duty cycle generating step (109) for storing a result obtained by multiplying the value stored in the register bat_Vdc_ctr_state by an integral constant Ki in a duty register chrg_duty.

And a duty limiting step (110) for limiting the value stored in the register chrg_duty from being saturated.

If the actual value of the DC link voltage is smaller than the 95% DC link voltage, the charge / discharge judging unit 111 stores 112 in the register dchg_mode, stores a zero value in the duty register chrg_duty 113, and stores the register dchg_Vdc_ref The actual DC link voltage Vdc is stored 114 and a zero value is stored 115 in the register bat_Vdc_ctr_state. When the actual value of the DC link voltage is equal to or greater than 95% DC link voltage, the PWM synthesizer 116 branches.

The PWM synthesis unit 116 stores the value stored in the duty register chrg_duty in the register Q1R, stores the value stored in the duty register chrg_duty in the register Q2R, and outputs the PWM generated in the register Q1R to the register Q2R So that the half value of the switching period is higher than the phase of the generated PWM.

And a gate driver 117 for supplying the PWM signals Q1 and Q2 supplied from the PWM synthesizer 116 to the switching elements IGBT.

Hereinafter, the discharge operation of the 3-level charge / discharge unit according to the embodiment of the present invention will be described.

[3-Level Discharge Operation]

FIG. 7 is a view for explaining the discharge mode of the 3-level charge / discharge unit of FIG. 4B.

Referring to FIG. 7, as shown in (a), the switching device Q3 is switched in the first interleaved section to charge the direct current links Vd1 and Vd2, and in the second interleaved section, And the device Q4 is switched to charge the DC link.

Specifically, under the condition that the battery voltage Vbat is larger than the direct current link Vd2, the switching element Q3 performs the boost converter operation in the first interleaved section.

Further, under the condition that the battery voltage Vbat is larger than the DC link Vd1, the switching element Q4 performs the boost converter operation in the second interleaved section.

the signals applied to Q3 and Q4 do not overlap under the condition of the DC link voltage Vbat> Vd1 = Vd2> as shown in FIG.

there occurs a period in which the signals applied to Q3 and Q4 overlap in the DC link voltage Vbat <Vd1 = Vd2 condition as shown in Fig.

The discharging operation of the battery in the first interleaved section will be described.

(a), when the switching element Q3 is turned on under the DC link voltage Vbat> Vd1 = Vd2, the inductor current starts from (+) Vbat and flows from Vbat (+) to L1 → Q3 → Vd2 → Q2 Via body diode → L2 → Vbat (-).

if the switching element Q3 is turned off and turned off under the DC link voltage Vbat> Vd1 = Vd2 condition, the inductor current flows through the body diode of Vbat (+) → L1 → Q1 → Vd1 → Vd2 → The body diode of Q2 → L2 → Vbat (-).

The discharging operation of the battery in the second interleaved section will be described.

(c), when the switching element Q4 is turned on under the DC link voltage Vbat> Vd1 = Vd2 Vbat, the inductor current starts from the positive (+) of Vbat to the body diode of Vbat (+) → L1 → Q1 → Vd1? Q4? L2? Vbat (-).

(d), if the switching element Q4 is turned off after the DC link voltage Vbat> Vd1 = Vd2, the inductor current flows through the body diode of Vbat (+) → L1 → Q1 → Vd1 → Vd2 → The body diode of Q2 → L2 → Vbat (-).

the PWM waveforms of Q3 and Q4 shown in (e) automatically increase when the discharge current amount increases or the battery voltage decreases, and when the battery voltage Vbat gradually decreases and becomes Vd1 = Vd2> Vbat, the PWM pulses of Q3 and Q4 At the same time, a redundant section that generates a turn-on signal occurs.

the repetitive cycles of the battery discharge current are the same irrespective of the relationship of the DC link voltages Vd1, Vd2 and Vbat as shown in FIGS. 5E and 5F, And twice the individual switching frequency.

It is well known in the art that the size of the inductor is proportional to the magnitude of the ripple current and inversely proportional to the switching frequency.

Therefore, the ripple current of the 3-level charge / discharge unit of the present invention is reduced by the interleaved effect as described above, and the switching frequency is doubled, thereby reducing the manufacturing cost of the inductor compared with the conventional split control, It offers the advantage of being able to.

Meanwhile, in the discharge mode, when the magnitude (Vd1) of the voltage of the first capacitor (C1) in FIG. 4B is larger than the voltage (Vd2) of the second capacitor (C2), the first discharging part is applied to the switching element Controls the magnitude of the voltage of the first capacitor and the magnitude of the voltage of the second capacitor to be the same by adding an offset value to the PWM duty ratio, and when the magnitude of the voltage of the first capacitor is smaller than the voltage of the second capacitor An offset value may be added to the PWM duty ratio applied to the second discharging portion switching element Q4 to control the magnitude of the voltage of the first capacitor and the magnitude of the voltage of the second capacitor to be the same.

[3-level discharge control]

8 is a view showing a discharge control block of a 3-level charge / discharge unit according to a preferred embodiment of the present invention.

8, in the control step of the 3-level discharger, the charge / discharge judgment unit 201 judges the value stored in the register dsch_mode in the start step 201 of the system. When the result is 1, the discharge reference register dchg_Vdc_ref And a soft start step (202) for increasing the value of the discharge reference register (dchg_Vdc_ref) by one, and the soft start step (202) And branches to the determination unit 205.

The charge / discharge judgment unit 201 judges the value stored in the register dsch_mode in the start step 201 of the system, and branches to the charge step 101 if the result value is not 1.

If the value of the battery discharge current -Ibat is greater than the discharge limitation current value IBAT_LIMIT, the discharge current limit determination unit 205 branches to the first error generation unit 206 storing the value (IBAT_LIMT + Ibat) in the register error, If the value of the discharge current -Ibat is less than the discharge limitation current value IBAT_LIMIT, the process branches to the second error generation unit 207 which stores the value (dchg_Vdc_ref - Vdc) in the register error.

The noise of the value stored in the register error transmitted from the first error generator 206 or the second error generator 207 is removed from the low pass filter 208.

The error integrating step 209 for integrating the value stored in the register error removed from the noise and storing it in the register bat_Vdc_ctr_state is performed.

And proceeds to an integration limiting step 210 for limiting the value stored in the register bat_Vdc_ctr_state of the error integration step 209 from being saturated.

The result of multiplying the register bat_Vdc_ctr_state by the integral constant Ki is added to the result of multiplying the value stored in the register error by the proportional constant Kp, and the duty generator 211 stores the result in the discharge duty register dchg_vtg.

A duty limiting step 212 is performed to limit the value stored in the register dchg_vtg from being saturated.

If the average voltage avg_Vdc of the DC link is equal to or more than 100% Vdc, the first discharge stop determination unit 213 branches to the second discharge stop determination unit 214 and the average voltage avg_Vdc of the DC link is less than 100% Vdc And then branches to the offset offset voltage measurement unit 216.

If the value stored in bat_Vdc_ctr_state is zero, the second discharge stop determination unit 214 stores zero in the register dchg_mode to declare a discharge stop and branches to the offset voltage measurement unit 216 if the value stored in bat_Vdc_ctr_state is not zero .

The offset voltage measurement unit 216 calculates a deviation Vdcp-Vdcn of the DC link voltage and stores the calculated deviation in the register offset_dc.

If the sign of the value stored in the register offset_dc is equal to or greater than zero, the offset code determiner 217 branches to the first PWM synthesizer 218. If the sign of the value stored in the register offset_dc is less than zero, 219).

The first PWM synthesis unit 218 adds a value stored in the discharge duty register dchg_vtg to a value stored in the register offset_dc by a constant k and stores the result in the register Q3R and outputs the value stored in the discharge duty register dchg_vtg to the register Q4R And proceeds to the phase shifting unit 220.

The second PWM synthesis unit 219 stores the value stored in the discharge duty register dchg_vtg in the register Q3R and subtracts the value stored in the discharge duty register dchg_vtg by the value stored in the register offset_dc by a constant k to output the result to the register Q4R And proceeds to the phase shifting unit 220. [

The phase shifter 220 may be configured such that the phase of the PWM of the Q3R computed by the first PWM synthesizer 218 or the second PWM synthesizer 218 is higher than the half of the switching period of the phase of the PWM of Q4R, Converts it into a PWM signal Q3, and converts it into a PWM signal Q4 and supplies it to the gate driver 221. [

152: DC bias line 155: Neutral line
157: DC Parent Line

Claims

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A second capacitor connected between the neutral line and the DC parent line; a second capacitor connected between the neutral line and the DC parent line;
A 3-level PWM rectifier connected to the DC common bus, the DC parent line, and the neutral line to convert AC power to DC power from an AC power source;
A three-level PWM inverter connected to the DC common bus, the DC parent line, and the neutral line to convert DC power to AC power from a DC power source; And
A first charging unit switching element connected in series to the DC rectifying line, a first discharging unit switching element connected between the first charging unit switching element and the heavy line, a second discharging unit switching element connected in series to the neutral line, A second charging part switching element connected in series between the second discharging part switching element and the direct current parent line, and a second charging part switching element connected between the connection point of the first charging part switching element and the battery side (+ A second inductor connected between a connection point of the second discharging part switching element and the battery side (-) terminal of the second discharging part switching element, a connection point between the battery side (+) terminal and the first inductor, A third capacitor connected between the neutral line and a third capacitor connected between the battery terminal (-) and a connection point of the second inductor and the neutral line, And also,
The operation of the 3-level charge / discharge unit may be based on a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the first capacitor, or a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the second capacitor. Level charge / discharge unit of the interleaved type in which the path of the charge /
In the charge mode of the 3-level charge / discharge unit,
Wherein when the magnitude of the voltage of each of the first capacitor and the second capacitor is greater than the magnitude of the battery voltage, the body diode of the first charging unit switching device and the second discharging unit switching device charges the battery using the first capacitor The body diode of the second charging part switching element and the first discharging part switching element charges the battery using the second capacitor,
When the magnitude of the voltage of each of the first capacitor and the second capacitor is smaller than the magnitude of the battery voltage, the voltage of the first capacitor switching element and the second capacitor switching element simultaneously, which is the sum of the first capacitor voltage and the second capacitor voltage And a charge control means for charging the battery by using the charge control means.

The method of claim 3,
Wherein the charge control means comprises:
And a first charge / discharge judgment unit for judging a value stored in the register dsch_mode at the start of the system and branching to a discharge step if the result is 1, and branching to a battery voltage comparator if the result is not 1,
If the actual battery voltage Vbat is greater than the reference battery voltage Vbat_ref, the process branches to the first error generator storing the value (Vbat_ref-Vbat) in the register errror. If the actual battery voltage Vbat is not greater than the reference battery voltage Vbat_ref, To a second error generation unit (105) for storing a value (Ibat_ref - Ibat) obtained by subtracting the actual charge current from the charge current (Ibat_ref - Ibat)
And integrating a value stored in a register error transmitted from the first error generating unit or the second error generating unit and storing the integrated value in a register bat_Vdc_ctr_state,
And an integration limiting step of limiting the value stored in the register bat_Vdc_ctr_state of the error integration step from being saturated,
And a duty generating step of storing a result obtained by multiplying the value stored in the register bat_Vdc_ctr_state by an integral constant Ki in a duty register chrg_duty,
And restricting the value stored in the register chrg_duty from being saturated,
If the actual value of the DC link voltage is smaller than the DC link voltage of 95% of the set DC link voltage, 1 is stored in the register dchg_mode, a zero value is stored in the duty register chrg_duty, the actual DC link voltage Vdc is stored in the register dchg_Vdc_ref And a second charge / discharge determination unit for storing a zero value in the register bat_Vdc_ctr_state and branching to a PWM synthesis unit when the actual value of the DC link voltage is equal to or higher than a DC link voltage of 95% of the set DC link voltage,
The value stored in the duty register chrg_duty is stored in the register Q1R, the value stored in the duty register chrg_duty is stored in the register Q2R, the phase of the PWM generated in the register Q1R is smaller than the phase of the PWM generated in the register Q2R, And a PWM synthesizer for setting a half value of the PWM signal to be higher than a half value of the PWM signal.

A second capacitor connected between the neutral line and the DC parent line; a second capacitor connected between the neutral line and the DC parent line;
A 3-level PWM rectifier connected to the DC common bus, the DC parent line, and the neutral line to convert AC power to DC power from an AC power source;
A three-level PWM inverter connected to the DC common bus, the DC parent line, and the neutral line to convert DC power to AC power from a DC power source; And
A first charging unit switching element connected in series to the DC rectifying line, a first discharging unit switching element connected between the first charging unit switching element and the heavy line, a second discharging unit switching element connected in series to the neutral line, A second charging part switching element connected in series between the second discharging part switching element and the direct current parent line, and a second charging part switching element connected between the connection point of the first charging part switching element and the battery side (+ A second inductor connected between a connection point of the second discharging part switching element and the battery side (-) terminal of the second discharging part switching element, a connection point between the battery side (+) terminal and the first inductor, A third capacitor connected between the neutral line and a third capacitor connected between the battery terminal (-) and a connection point of the second inductor and the neutral line, And also,
The operation of the 3-level charge / discharge unit may be based on a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the first capacitor, or a correlation between the magnitude of the battery voltage and the magnitude of the voltage of the second capacitor. Level charge / discharge unit of the interleaved type in which the path of the charge /
In the discharge mode of the 3-level charge / discharge unit,
When the magnitude of the battery voltage is greater than the magnitude of the voltage of each of the first capacitor and the second capacitor, the body diode of the first discharging portion switching element and the body diode of the first charging portion switching element and the body diode of the second charging portion switching element, The first capacitor and the second capacitor are charged using a voltage obtained by adding a voltage of the second capacitor to the first capacitor and a body diode of the body diode of the first charging part switching device and the body diode of the second charging part switching device charges the battery voltage The first capacitor and the second capacitor are charged using the sum of the first capacitor voltage and the first capacitor voltage,
The first and second discharging unit switching elements and the body diode of the first charging unit switching element and the second charging unit switching element, respectively, when the magnitude of the battery voltage is smaller than the magnitude of the voltages of the first capacitor and the second capacitor, The body diode of the switching element simultaneously charges the first capacitor and the second capacitor using only the battery voltage,
Wherein when the magnitude of the voltage of the first capacitor is greater than the voltage of the second capacitor, an offset value is added to the PWM duty ratio applied to the first discharging portion switching device, and the magnitude of the voltage of the first capacitor, The magnitude of the voltage is controlled to be the same,
When the magnitude of the voltage of the first capacitor is smaller than the voltage of the second capacitor, an offset value is added to the PWM duty ratio applied to the second discharging portion switching device to change the magnitude of the voltage of the first capacitor, And a discharge control means for making the magnitudes of the voltages the same.

6. The method of claim 5,
The discharge control means
The value stored in the register dsch_mode is determined at the start of the system, and when the result is 1, a branch is made to a softstart step of incrementing the value of the discharge reference register dchg_Vdc_ref by 1. The value stored in the register dsch_mode is determined at the start of the system, And a charging / discharging judging unit for branching to the charging step if not 1,
And a discharge reference voltage limiting step of limiting the value of the increased discharge reference register dchg_Vdc_ref in the soft start step to a minimum value,
(IBAT_LIMT + Ibat) is stored in the register error if the value of the battery discharge current -Ibat is larger than the discharge limitation current value IBAT_LIMIT, and if the value of the battery discharge current -Ibat is less than the discharge limit current value IBAT_LIMIT And a second error generator for storing a value (dchg_Vdc_ref - Vdc) on the back side (dchg_Vdc_ref - Vdc) in a register error,
And a low pass filter unit for removing noise of a value stored in a register error transmitted from the first error generating unit or the second error generating unit,
And integrating a value stored in the register error removed from the noise and storing the integrated value in a register bat_Vdc_ctr_state,
And an integration limiting step of limiting the value stored in the register bat_Vdc_ctr_state of the error integration step from being saturated,
And a duty generator for adding the result of multiplying the register bat_Vdc_ctr_state by the integral constant Ki to a value obtained by multiplying the value stored in the register error by the proportional constant Kp and storing the sum in the discharge duty register dchg_vtg,
And restricting the value stored in the register dchg_vtg from being saturated,
If the average voltage avg_Vdc value of the DC link is equal to or greater than the DC link voltage Vdc which is 100% of the set DC link voltage, the flow branches to the second discharge suspend judgment section, and the average value of the DC link avg_Vdc is 100% And a first discharge stop determination unit that branches to an offset voltage calculation unit if the voltage is less than Vdc,
If the value stored in the register bat_Vdc_ctr_state is zero, stores a zero in the register dchg_mode to declare a discharge stop and branches to the offset voltage calculator if the value stored in the bat_Vdc_ctr_state is not zero,
And calculates an offset voltage Vdcp-Vdcn of the DC link voltage and stores it in a register offset_dc,
And an offset code determiner for branching to the first PWM combiner if the sign of the value stored in the register offset_dc is zero or more and for branching to the second PWM combiner if the sign of the value stored in the register offset_dc is less than zero,
A value stored in the discharge duty register dchg_vtg is added to a value stored in the register offset_dc by a constant k and stored in the register Q3R, a value stored in the discharge duty register dchg_vtg is stored in the register Q4R, 1 PWM combiner,
Stores the value stored in the discharge duty register dchg_vtg in the register Q3R, subtracts the value stored in the discharge duty register dchg_vtg by the value stored in the register offset_dc by a constant k, stores the value in the register Q4R, 2 PWM combiner,
The phase of the PWM of the Q3R calculated by the first PWM combining unit or the second PWM combining unit is higher than the half of the switching period of the PWM of the Q4R so that the Q3R is converted into the PWM signal Q3, And a gate driver for converting the signal to a signal Q4 to supply the gate driver with a phase transfer portion and a PWM driver for electrically isolating the PWM signals Q3 and Q4 and supplying the same to the switching element.

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